* [Intel-gfx] [PATCH 01/12] drm/i915: Add more AUX CHs to the enum
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-08 16:21 ` [Intel-gfx] [01/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 02/12] drm/i915: Add PORT_{H, I} to intel_port_to_power_domain() Ville Syrjala
` (13 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We need to go up to AUX_CH_I (aka. AUX CH USBC6) these days.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index f68007ff8a13..5b736883cd11 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -282,6 +282,8 @@ enum aux_ch {
AUX_CH_E, /* ICL+ */
AUX_CH_F,
AUX_CH_G,
+ AUX_CH_H,
+ AUX_CH_I,
};
#define aux_ch_name(a) ((a) + 'A')
--
2.26.2
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [01/12] drm/i915: Add more AUX CHs to the enum
2020-06-30 21:55 ` [Intel-gfx] [PATCH 01/12] drm/i915: Add more AUX CHs to the enum Ville Syrjala
@ 2020-09-08 16:21 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 16:21 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> We need to go up to AUX_CH_I (aka. AUX CH USBC6) these days.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/display/intel_display.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index f68007ff8a13..5b736883cd11 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -282,6 +282,8 @@ enum aux_ch {
> AUX_CH_E, /* ICL+ */
> AUX_CH_F,
> AUX_CH_G,
> + AUX_CH_H,
> + AUX_CH_I,
> };
>
> #define aux_ch_name(a) ((a) + 'A')
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 02/12] drm/i915: Add PORT_{H, I} to intel_port_to_power_domain()
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
2020-06-30 21:55 ` [Intel-gfx] [PATCH 01/12] drm/i915: Add more AUX CHs to the enum Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-08 16:21 ` [Intel-gfx] [02/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 03/12] drm/i915: Add AUX_CH_{H, I} power domain handling Ville Syrjala
` (12 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We need to go up to PORT_I (aka. TC6) these days.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 182cef0dc2fd..665aa4283fb9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7289,6 +7289,10 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port)
return POWER_DOMAIN_PORT_DDI_F_LANES;
case PORT_G:
return POWER_DOMAIN_PORT_DDI_G_LANES;
+ case PORT_H:
+ return POWER_DOMAIN_PORT_DDI_H_LANES;
+ case PORT_I:
+ return POWER_DOMAIN_PORT_DDI_I_LANES;
default:
MISSING_CASE(port);
return POWER_DOMAIN_PORT_OTHER;
--
2.26.2
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^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [02/12] drm/i915: Add PORT_{H, I} to intel_port_to_power_domain()
2020-06-30 21:55 ` [Intel-gfx] [PATCH 02/12] drm/i915: Add PORT_{H, I} to intel_port_to_power_domain() Ville Syrjala
@ 2020-09-08 16:21 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 16:21 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> We need to go up to PORT_I (aka. TC6) these days.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 182cef0dc2fd..665aa4283fb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7289,6 +7289,10 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port)
> return POWER_DOMAIN_PORT_DDI_F_LANES;
> case PORT_G:
> return POWER_DOMAIN_PORT_DDI_G_LANES;
> + case PORT_H:
> + return POWER_DOMAIN_PORT_DDI_H_LANES;
> + case PORT_I:
> + return POWER_DOMAIN_PORT_DDI_I_LANES;
> default:
> MISSING_CASE(port);
> return POWER_DOMAIN_PORT_OTHER;
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 03/12] drm/i915: Add AUX_CH_{H, I} power domain handling
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
2020-06-30 21:55 ` [Intel-gfx] [PATCH 01/12] drm/i915: Add more AUX CHs to the enum Ville Syrjala
2020-06-30 21:55 ` [Intel-gfx] [PATCH 02/12] drm/i915: Add PORT_{H, I} to intel_port_to_power_domain() Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-08 16:23 ` [Intel-gfx] [03/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 04/12] drm/i915: Add VBT DVO ports H and I Ville Syrjala
` (11 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
AUX CH H/I need their power domains too.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 665aa4283fb9..87831fd9e1e1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7318,6 +7318,10 @@ intel_aux_power_domain(struct intel_digital_port *dig_port)
return POWER_DOMAIN_AUX_F_TBT;
case AUX_CH_G:
return POWER_DOMAIN_AUX_G_TBT;
+ case AUX_CH_H:
+ return POWER_DOMAIN_AUX_H_TBT;
+ case AUX_CH_I:
+ return POWER_DOMAIN_AUX_I_TBT;
default:
MISSING_CASE(dig_port->aux_ch);
return POWER_DOMAIN_AUX_C_TBT;
@@ -7349,6 +7353,10 @@ intel_legacy_aux_to_power_domain(enum aux_ch aux_ch)
return POWER_DOMAIN_AUX_F;
case AUX_CH_G:
return POWER_DOMAIN_AUX_G;
+ case AUX_CH_H:
+ return POWER_DOMAIN_AUX_H;
+ case AUX_CH_I:
+ return POWER_DOMAIN_AUX_I;
default:
MISSING_CASE(aux_ch);
return POWER_DOMAIN_AUX_A;
--
2.26.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [03/12] drm/i915: Add AUX_CH_{H, I} power domain handling
2020-06-30 21:55 ` [Intel-gfx] [PATCH 03/12] drm/i915: Add AUX_CH_{H, I} power domain handling Ville Syrjala
@ 2020-09-08 16:23 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 16:23 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> AUX CH H/I need their power domains too.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 665aa4283fb9..87831fd9e1e1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7318,6 +7318,10 @@ intel_aux_power_domain(struct intel_digital_port *dig_port)
> return POWER_DOMAIN_AUX_F_TBT;
> case AUX_CH_G:
> return POWER_DOMAIN_AUX_G_TBT;
> + case AUX_CH_H:
> + return POWER_DOMAIN_AUX_H_TBT;
> + case AUX_CH_I:
> + return POWER_DOMAIN_AUX_I_TBT;
> default:
> MISSING_CASE(dig_port->aux_ch);
> return POWER_DOMAIN_AUX_C_TBT;
> @@ -7349,6 +7353,10 @@ intel_legacy_aux_to_power_domain(enum aux_ch aux_ch)
> return POWER_DOMAIN_AUX_F;
> case AUX_CH_G:
> return POWER_DOMAIN_AUX_G;
> + case AUX_CH_H:
> + return POWER_DOMAIN_AUX_H;
> + case AUX_CH_I:
> + return POWER_DOMAIN_AUX_I;
> default:
> MISSING_CASE(aux_ch);
> return POWER_DOMAIN_AUX_A;
>
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 04/12] drm/i915: Add VBT DVO ports H and I
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (2 preceding siblings ...)
2020-06-30 21:55 ` [Intel-gfx] [PATCH 03/12] drm/i915: Add AUX_CH_{H, I} power domain handling Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-08 16:37 ` [Intel-gfx] [04/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 05/12] drm/i915: Add VBT AUX CH " Ville Syrjala
` (10 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
VBT has ports H and I since version 217.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 ++
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 8 ++++++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 6593e2c38043..2bf0bc0deee8 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1653,6 +1653,8 @@ static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
[PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
+ [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
+ [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
};
/*
* Bspec lists the ports as A, B, C, D - however internally in our
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index aef7fe932d1a..e502d65300fa 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -293,8 +293,12 @@ struct bdb_general_features {
#define DVO_PORT_HDMIE 12 /* 193 */
#define DVO_PORT_DPF 13 /* N/A */
#define DVO_PORT_HDMIF 14 /* N/A */
-#define DVO_PORT_DPG 15
-#define DVO_PORT_HDMIG 16
+#define DVO_PORT_DPG 15 /* 217 */
+#define DVO_PORT_HDMIG 16 /* 217 */
+#define DVO_PORT_DPH 17 /* 217 */
+#define DVO_PORT_HDMIH 18 /* 217 */
+#define DVO_PORT_DPI 19 /* 217 */
+#define DVO_PORT_HDMII 20 /* 217 */
#define DVO_PORT_MIPIA 21 /* 171 */
#define DVO_PORT_MIPIB 22 /* 171 */
#define DVO_PORT_MIPIC 23 /* 171 */
--
2.26.2
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^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [04/12] drm/i915: Add VBT DVO ports H and I
2020-06-30 21:55 ` [Intel-gfx] [PATCH 04/12] drm/i915: Add VBT DVO ports H and I Ville Syrjala
@ 2020-09-08 16:37 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 16:37 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> VBT has ports H and I since version 217.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 2 ++
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 8 ++++++--
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 6593e2c38043..2bf0bc0deee8 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1653,6 +1653,8 @@ static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
> [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
> [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
> [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
> + [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
> + [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
> };
> /*
> * Bspec lists the ports as A, B, C, D - however internally in our
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index aef7fe932d1a..e502d65300fa 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -293,8 +293,12 @@ struct bdb_general_features {
> #define DVO_PORT_HDMIE 12 /* 193 */
> #define DVO_PORT_DPF 13 /* N/A */
> #define DVO_PORT_HDMIF 14 /* N/A */
> -#define DVO_PORT_DPG 15
> -#define DVO_PORT_HDMIG 16
> +#define DVO_PORT_DPG 15 /* 217 */
> +#define DVO_PORT_HDMIG 16 /* 217 */
> +#define DVO_PORT_DPH 17 /* 217 */
> +#define DVO_PORT_HDMIH 18 /* 217 */
> +#define DVO_PORT_DPI 19 /* 217 */
> +#define DVO_PORT_HDMII 20 /* 217 */
> #define DVO_PORT_MIPIA 21 /* 171 */
> #define DVO_PORT_MIPIB 22 /* 171 */
> #define DVO_PORT_MIPIC 23 /* 171 */
>
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^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 05/12] drm/i915: Add VBT AUX CH H and I
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (3 preceding siblings ...)
2020-06-30 21:55 ` [Intel-gfx] [PATCH 04/12] drm/i915: Add VBT DVO ports H and I Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-08 16:38 ` [Intel-gfx] [05/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 06/12] drm/i915: Nuke the redundant TC/TBT HPD bit defines Ville Syrjala
` (9 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
As with everything else VBT can now specify AUX CH H or I.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 6 ++++++
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 2bf0bc0deee8..05eb88ee73f8 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2649,6 +2649,12 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
case DP_AUX_G:
aux_ch = AUX_CH_G;
break;
+ case DP_AUX_H:
+ aux_ch = AUX_CH_H;
+ break;
+ case DP_AUX_I:
+ aux_ch = AUX_CH_I;
+ break;
default:
MISSING_CASE(info->alternate_aux_channel);
aux_ch = AUX_CH_A;
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index e502d65300fa..b5f7a52f751a 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -334,6 +334,8 @@ enum vbt_gmbus_ddi {
#define DP_AUX_E 0x50
#define DP_AUX_F 0x60
#define DP_AUX_G 0x70
+#define DP_AUX_H 0x80
+#define DP_AUX_I 0x90
#define VBT_DP_MAX_LINK_RATE_HBR3 0
#define VBT_DP_MAX_LINK_RATE_HBR2 1
--
2.26.2
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^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [05/12] drm/i915: Add VBT AUX CH H and I
2020-06-30 21:55 ` [Intel-gfx] [PATCH 05/12] drm/i915: Add VBT AUX CH " Ville Syrjala
@ 2020-09-08 16:38 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 16:38 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> As with everything else VBT can now specify AUX CH H or I.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 6 ++++++
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 2 ++
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 2bf0bc0deee8..05eb88ee73f8 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -2649,6 +2649,12 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
> case DP_AUX_G:
> aux_ch = AUX_CH_G;
> break;
> + case DP_AUX_H:
> + aux_ch = AUX_CH_H;
> + break;
> + case DP_AUX_I:
> + aux_ch = AUX_CH_I;
> + break;
> default:
> MISSING_CASE(info->alternate_aux_channel);
> aux_ch = AUX_CH_A;
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index e502d65300fa..b5f7a52f751a 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -334,6 +334,8 @@ enum vbt_gmbus_ddi {
> #define DP_AUX_E 0x50
> #define DP_AUX_F 0x60
> #define DP_AUX_G 0x70
> +#define DP_AUX_H 0x80
> +#define DP_AUX_I 0x90
>
> #define VBT_DP_MAX_LINK_RATE_HBR3 0
> #define VBT_DP_MAX_LINK_RATE_HBR2 1
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 06/12] drm/i915: Nuke the redundant TC/TBT HPD bit defines
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (4 preceding siblings ...)
2020-06-30 21:55 ` [Intel-gfx] [PATCH 05/12] drm/i915: Add VBT AUX CH " Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-08 16:41 ` [Intel-gfx] [06/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 07/12] drm/i915: Configure GEN11_{TBT, TC}_HOTPLUG_CTL for ports TC5/6 Ville Syrjala
` (8 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We have nice parametrized GEN11_{TC,TBT}_HOTPLUG() so nuke
the overlapping defines.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 20 +++++++++---------
drivers/gpu/drm/i915/i915_reg.h | 36 +++++++++++----------------------
2 files changed, 22 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 562b43ed077f..ad52109c747d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -131,19 +131,19 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
};
static const u32 hpd_gen11[HPD_NUM_PINS] = {
- [HPD_PORT_C] = GEN11_TC1_HOTPLUG | GEN11_TBT1_HOTPLUG,
- [HPD_PORT_D] = GEN11_TC2_HOTPLUG | GEN11_TBT2_HOTPLUG,
- [HPD_PORT_E] = GEN11_TC3_HOTPLUG | GEN11_TBT3_HOTPLUG,
- [HPD_PORT_F] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG,
+ [HPD_PORT_C] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
+ [HPD_PORT_D] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
+ [HPD_PORT_E] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
+ [HPD_PORT_F] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
};
static const u32 hpd_gen12[HPD_NUM_PINS] = {
- [HPD_PORT_D] = GEN11_TC1_HOTPLUG | GEN11_TBT1_HOTPLUG,
- [HPD_PORT_E] = GEN11_TC2_HOTPLUG | GEN11_TBT2_HOTPLUG,
- [HPD_PORT_F] = GEN11_TC3_HOTPLUG | GEN11_TBT3_HOTPLUG,
- [HPD_PORT_G] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG,
- [HPD_PORT_H] = GEN12_TC5_HOTPLUG | GEN12_TBT5_HOTPLUG,
- [HPD_PORT_I] = GEN12_TC6_HOTPLUG | GEN12_TBT6_HOTPLUG,
+ [HPD_PORT_D] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
+ [HPD_PORT_E] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
+ [HPD_PORT_F] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
+ [HPD_PORT_G] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
+ [HPD_PORT_H] = GEN11_TC_HOTPLUG(PORT_TC5) | GEN11_TBT_HOTPLUG(PORT_TC5),
+ [HPD_PORT_I] = GEN11_TC_HOTPLUG(PORT_TC6) | GEN11_TBT_HOTPLUG(PORT_TC6),
};
static const u32 hpd_icp[HPD_NUM_PINS] = {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2ecde5c2e357..d7359f3bbc64 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7681,32 +7681,20 @@ enum {
#define GEN11_DE_HPD_IMR _MMIO(0x44474)
#define GEN11_DE_HPD_IIR _MMIO(0x44478)
#define GEN11_DE_HPD_IER _MMIO(0x4447c)
-#define GEN12_TC6_HOTPLUG (1 << 21)
-#define GEN12_TC5_HOTPLUG (1 << 20)
-#define GEN11_TC4_HOTPLUG (1 << 19)
-#define GEN11_TC3_HOTPLUG (1 << 18)
-#define GEN11_TC2_HOTPLUG (1 << 17)
-#define GEN11_TC1_HOTPLUG (1 << 16)
#define GEN11_TC_HOTPLUG(tc_port) (1 << ((tc_port) + 16))
-#define GEN11_DE_TC_HOTPLUG_MASK (GEN12_TC6_HOTPLUG | \
- GEN12_TC5_HOTPLUG | \
- GEN11_TC4_HOTPLUG | \
- GEN11_TC3_HOTPLUG | \
- GEN11_TC2_HOTPLUG | \
- GEN11_TC1_HOTPLUG)
-#define GEN12_TBT6_HOTPLUG (1 << 5)
-#define GEN12_TBT5_HOTPLUG (1 << 4)
-#define GEN11_TBT4_HOTPLUG (1 << 3)
-#define GEN11_TBT3_HOTPLUG (1 << 2)
-#define GEN11_TBT2_HOTPLUG (1 << 1)
-#define GEN11_TBT1_HOTPLUG (1 << 0)
+#define GEN11_DE_TC_HOTPLUG_MASK (GEN11_TC_HOTPLUG(PORT_TC6) | \
+ GEN11_TC_HOTPLUG(PORT_TC5) | \
+ GEN11_TC_HOTPLUG(PORT_TC4) | \
+ GEN11_TC_HOTPLUG(PORT_TC3) | \
+ GEN11_TC_HOTPLUG(PORT_TC2) | \
+ GEN11_TC_HOTPLUG(PORT_TC1))
#define GEN11_TBT_HOTPLUG(tc_port) (1 << (tc_port))
-#define GEN11_DE_TBT_HOTPLUG_MASK (GEN12_TBT6_HOTPLUG | \
- GEN12_TBT5_HOTPLUG | \
- GEN11_TBT4_HOTPLUG | \
- GEN11_TBT3_HOTPLUG | \
- GEN11_TBT2_HOTPLUG | \
- GEN11_TBT1_HOTPLUG)
+#define GEN11_DE_TBT_HOTPLUG_MASK (GEN11_TBT_HOTPLUG(PORT_TC6) | \
+ GEN11_TBT_HOTPLUG(PORT_TC5) | \
+ GEN11_TBT_HOTPLUG(PORT_TC4) | \
+ GEN11_TBT_HOTPLUG(PORT_TC3) | \
+ GEN11_TBT_HOTPLUG(PORT_TC2) | \
+ GEN11_TBT_HOTPLUG(PORT_TC1))
#define GEN11_TBT_HOTPLUG_CTL _MMIO(0x44030)
#define GEN11_TC_HOTPLUG_CTL _MMIO(0x44038)
--
2.26.2
_______________________________________________
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^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [06/12] drm/i915: Nuke the redundant TC/TBT HPD bit defines
2020-06-30 21:55 ` [Intel-gfx] [PATCH 06/12] drm/i915: Nuke the redundant TC/TBT HPD bit defines Ville Syrjala
@ 2020-09-08 16:41 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 16:41 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> We have nice parametrized GEN11_{TC,TBT}_HOTPLUG() so nuke
> the overlapping defines.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/i915_irq.c | 20 +++++++++---------
> drivers/gpu/drm/i915/i915_reg.h | 36 +++++++++++----------------------
> 2 files changed, 22 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 562b43ed077f..ad52109c747d 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -131,19 +131,19 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
> };
>
> static const u32 hpd_gen11[HPD_NUM_PINS] = {
> - [HPD_PORT_C] = GEN11_TC1_HOTPLUG | GEN11_TBT1_HOTPLUG,
> - [HPD_PORT_D] = GEN11_TC2_HOTPLUG | GEN11_TBT2_HOTPLUG,
> - [HPD_PORT_E] = GEN11_TC3_HOTPLUG | GEN11_TBT3_HOTPLUG,
> - [HPD_PORT_F] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG,
> + [HPD_PORT_C] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
> + [HPD_PORT_D] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
> + [HPD_PORT_E] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
> + [HPD_PORT_F] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
> };
>
> static const u32 hpd_gen12[HPD_NUM_PINS] = {
> - [HPD_PORT_D] = GEN11_TC1_HOTPLUG | GEN11_TBT1_HOTPLUG,
> - [HPD_PORT_E] = GEN11_TC2_HOTPLUG | GEN11_TBT2_HOTPLUG,
> - [HPD_PORT_F] = GEN11_TC3_HOTPLUG | GEN11_TBT3_HOTPLUG,
> - [HPD_PORT_G] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG,
> - [HPD_PORT_H] = GEN12_TC5_HOTPLUG | GEN12_TBT5_HOTPLUG,
> - [HPD_PORT_I] = GEN12_TC6_HOTPLUG | GEN12_TBT6_HOTPLUG,
> + [HPD_PORT_D] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
> + [HPD_PORT_E] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
> + [HPD_PORT_F] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
> + [HPD_PORT_G] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
> + [HPD_PORT_H] = GEN11_TC_HOTPLUG(PORT_TC5) | GEN11_TBT_HOTPLUG(PORT_TC5),
> + [HPD_PORT_I] = GEN11_TC_HOTPLUG(PORT_TC6) | GEN11_TBT_HOTPLUG(PORT_TC6),
> };
>
> static const u32 hpd_icp[HPD_NUM_PINS] = {
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 2ecde5c2e357..d7359f3bbc64 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7681,32 +7681,20 @@ enum {
> #define GEN11_DE_HPD_IMR _MMIO(0x44474)
> #define GEN11_DE_HPD_IIR _MMIO(0x44478)
> #define GEN11_DE_HPD_IER _MMIO(0x4447c)
> -#define GEN12_TC6_HOTPLUG (1 << 21)
> -#define GEN12_TC5_HOTPLUG (1 << 20)
> -#define GEN11_TC4_HOTPLUG (1 << 19)
> -#define GEN11_TC3_HOTPLUG (1 << 18)
> -#define GEN11_TC2_HOTPLUG (1 << 17)
> -#define GEN11_TC1_HOTPLUG (1 << 16)
> #define GEN11_TC_HOTPLUG(tc_port) (1 << ((tc_port) + 16))
> -#define GEN11_DE_TC_HOTPLUG_MASK (GEN12_TC6_HOTPLUG | \
> - GEN12_TC5_HOTPLUG | \
> - GEN11_TC4_HOTPLUG | \
> - GEN11_TC3_HOTPLUG | \
> - GEN11_TC2_HOTPLUG | \
> - GEN11_TC1_HOTPLUG)
> -#define GEN12_TBT6_HOTPLUG (1 << 5)
> -#define GEN12_TBT5_HOTPLUG (1 << 4)
> -#define GEN11_TBT4_HOTPLUG (1 << 3)
> -#define GEN11_TBT3_HOTPLUG (1 << 2)
> -#define GEN11_TBT2_HOTPLUG (1 << 1)
> -#define GEN11_TBT1_HOTPLUG (1 << 0)
> +#define GEN11_DE_TC_HOTPLUG_MASK (GEN11_TC_HOTPLUG(PORT_TC6) | \
> + GEN11_TC_HOTPLUG(PORT_TC5) | \
> + GEN11_TC_HOTPLUG(PORT_TC4) | \
> + GEN11_TC_HOTPLUG(PORT_TC3) | \
> + GEN11_TC_HOTPLUG(PORT_TC2) | \
> + GEN11_TC_HOTPLUG(PORT_TC1))
> #define GEN11_TBT_HOTPLUG(tc_port) (1 << (tc_port))
> -#define GEN11_DE_TBT_HOTPLUG_MASK (GEN12_TBT6_HOTPLUG | \
> - GEN12_TBT5_HOTPLUG | \
> - GEN11_TBT4_HOTPLUG | \
> - GEN11_TBT3_HOTPLUG | \
> - GEN11_TBT2_HOTPLUG | \
> - GEN11_TBT1_HOTPLUG)
> +#define GEN11_DE_TBT_HOTPLUG_MASK (GEN11_TBT_HOTPLUG(PORT_TC6) | \
> + GEN11_TBT_HOTPLUG(PORT_TC5) | \
> + GEN11_TBT_HOTPLUG(PORT_TC4) | \
> + GEN11_TBT_HOTPLUG(PORT_TC3) | \
> + GEN11_TBT_HOTPLUG(PORT_TC2) | \
> + GEN11_TBT_HOTPLUG(PORT_TC1))
>
> #define GEN11_TBT_HOTPLUG_CTL _MMIO(0x44030)
> #define GEN11_TC_HOTPLUG_CTL _MMIO(0x44038)
>
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^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 07/12] drm/i915: Configure GEN11_{TBT, TC}_HOTPLUG_CTL for ports TC5/6
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (5 preceding siblings ...)
2020-06-30 21:55 ` [Intel-gfx] [PATCH 06/12] drm/i915: Nuke the redundant TC/TBT HPD bit defines Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-08 16:45 ` [Intel-gfx] [07/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 08/12] drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts Ville Syrjala
` (7 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
gen11_hpd_detection_setup() is missing ports TC5/6. Add them.
TODO: Might be nice to only enable the hpd detection logic
for ports we actually have. Should be rolled out for all
platforms if/when done...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index ad52109c747d..839ae674bc44 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3109,14 +3109,18 @@ static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC1) |
GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
- GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC5) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC6);
I915_WRITE(GEN11_TC_HOTPLUG_CTL, hotplug);
hotplug = I915_READ(GEN11_TBT_HOTPLUG_CTL);
hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC1) |
GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
- GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC5) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC6);
I915_WRITE(GEN11_TBT_HOTPLUG_CTL, hotplug);
}
--
2.26.2
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [07/12] drm/i915: Configure GEN11_{TBT, TC}_HOTPLUG_CTL for ports TC5/6
2020-06-30 21:55 ` [Intel-gfx] [PATCH 07/12] drm/i915: Configure GEN11_{TBT, TC}_HOTPLUG_CTL for ports TC5/6 Ville Syrjala
@ 2020-09-08 16:45 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 16:45 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> gen11_hpd_detection_setup() is missing ports TC5/6. Add them.
>
> TODO: Might be nice to only enable the hpd detection logic
> for ports we actually have. Should be rolled out for all
> platforms if/when done...
TC5 and TC6 don't exist in ICL but this is not a reserved register, should not cause any harm.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/i915_irq.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index ad52109c747d..839ae674bc44 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3109,14 +3109,18 @@ static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
> hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC1) |
> GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
> GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
> - GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
> + GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4) |
> + GEN11_HOTPLUG_CTL_ENABLE(PORT_TC5) |
> + GEN11_HOTPLUG_CTL_ENABLE(PORT_TC6);
> I915_WRITE(GEN11_TC_HOTPLUG_CTL, hotplug);
>
> hotplug = I915_READ(GEN11_TBT_HOTPLUG_CTL);
> hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC1) |
> GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
> GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
> - GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
> + GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4) |
> + GEN11_HOTPLUG_CTL_ENABLE(PORT_TC5) |
> + GEN11_HOTPLUG_CTL_ENABLE(PORT_TC6);
> I915_WRITE(GEN11_TBT_HOTPLUG_CTL, hotplug);
> }
>
>
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^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 08/12] drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (6 preceding siblings ...)
2020-06-30 21:55 ` [Intel-gfx] [PATCH 07/12] drm/i915: Configure GEN11_{TBT, TC}_HOTPLUG_CTL for ports TC5/6 Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-08 16:49 ` [Intel-gfx] [08/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 09/12] drm/i915: Move hpd_pin setup to encoder init Ville Syrjala
` (6 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
No reason to stuff both DDI and TC port handling into the same
function. Split it into two.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 48 ++++++++++++++++++---------------
1 file changed, 27 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 839ae674bc44..92d74448ee03 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3045,21 +3045,24 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
ibx_hpd_detection_setup(dev_priv);
}
-static void icp_hpd_detection_setup(struct drm_i915_private *dev_priv,
- u32 ddi_hotplug_enable_mask,
- u32 tc_hotplug_enable_mask)
+static void icp_ddi_hpd_detection_setup(struct drm_i915_private *dev_priv,
+ u32 enable_mask)
{
u32 hotplug;
hotplug = I915_READ(SHOTPLUG_CTL_DDI);
- hotplug |= ddi_hotplug_enable_mask;
+ hotplug |= enable_mask;
I915_WRITE(SHOTPLUG_CTL_DDI, hotplug);
+}
- if (tc_hotplug_enable_mask) {
- hotplug = I915_READ(SHOTPLUG_CTL_TC);
- hotplug |= tc_hotplug_enable_mask;
- I915_WRITE(SHOTPLUG_CTL_TC, hotplug);
- }
+static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv,
+ u32 enable_mask)
+{
+ u32 hotplug;
+
+ hotplug = I915_READ(SHOTPLUG_CTL_TC);
+ hotplug |= enable_mask;
+ I915_WRITE(SHOTPLUG_CTL_TC, hotplug);
}
static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
@@ -3075,7 +3078,9 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
- icp_hpd_detection_setup(dev_priv, ddi_enable_mask, tc_enable_mask);
+ icp_ddi_hpd_detection_setup(dev_priv, ddi_enable_mask);
+ if (tc_enable_mask)
+ icp_tc_hpd_detection_setup(dev_priv, tc_enable_mask);
}
/*
@@ -3493,17 +3498,18 @@ static void icp_irq_postinstall(struct drm_i915_private *dev_priv)
gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR);
I915_WRITE(SDEIMR, ~mask);
- if (HAS_PCH_TGP(dev_priv))
- icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK,
- TGP_TC_HPD_ENABLE_MASK);
- else if (HAS_PCH_JSP(dev_priv))
- icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK, 0);
- else if (HAS_PCH_MCC(dev_priv))
- icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,
- ICP_TC_HPD_ENABLE(PORT_TC1));
- else
- icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,
- ICP_TC_HPD_ENABLE_MASK);
+ if (HAS_PCH_TGP(dev_priv)) {
+ icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);
+ icp_tc_hpd_detection_setup(dev_priv, TGP_TC_HPD_ENABLE_MASK);
+ } else if (HAS_PCH_JSP(dev_priv)) {
+ icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);
+ } else if (HAS_PCH_MCC(dev_priv)) {
+ icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK);
+ icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE(PORT_TC1));
+ } else {
+ icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK);
+ icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE_MASK);
+ }
}
static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
--
2.26.2
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [08/12] drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts
2020-06-30 21:55 ` [Intel-gfx] [PATCH 08/12] drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts Ville Syrjala
@ 2020-09-08 16:49 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 16:49 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> No reason to stuff both DDI and TC port handling into the same
> function. Split it into two.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/i915_irq.c | 48 ++++++++++++++++++---------------
> 1 file changed, 27 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 839ae674bc44..92d74448ee03 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3045,21 +3045,24 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
> ibx_hpd_detection_setup(dev_priv);
> }
>
> -static void icp_hpd_detection_setup(struct drm_i915_private *dev_priv,
> - u32 ddi_hotplug_enable_mask,
> - u32 tc_hotplug_enable_mask)
> +static void icp_ddi_hpd_detection_setup(struct drm_i915_private *dev_priv,
> + u32 enable_mask)
> {
> u32 hotplug;
>
> hotplug = I915_READ(SHOTPLUG_CTL_DDI);
> - hotplug |= ddi_hotplug_enable_mask;
> + hotplug |= enable_mask;
> I915_WRITE(SHOTPLUG_CTL_DDI, hotplug);
> +}
>
> - if (tc_hotplug_enable_mask) {
> - hotplug = I915_READ(SHOTPLUG_CTL_TC);
> - hotplug |= tc_hotplug_enable_mask;
> - I915_WRITE(SHOTPLUG_CTL_TC, hotplug);
> - }
> +static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv,
> + u32 enable_mask)
> +{
> + u32 hotplug;
> +
> + hotplug = I915_READ(SHOTPLUG_CTL_TC);
> + hotplug |= enable_mask;
> + I915_WRITE(SHOTPLUG_CTL_TC, hotplug);
> }
>
> static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
> @@ -3075,7 +3078,9 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
>
> ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
>
> - icp_hpd_detection_setup(dev_priv, ddi_enable_mask, tc_enable_mask);
> + icp_ddi_hpd_detection_setup(dev_priv, ddi_enable_mask);
> + if (tc_enable_mask)
> + icp_tc_hpd_detection_setup(dev_priv, tc_enable_mask);
> }
>
> /*
> @@ -3493,17 +3498,18 @@ static void icp_irq_postinstall(struct drm_i915_private *dev_priv)
> gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR);
> I915_WRITE(SDEIMR, ~mask);
>
> - if (HAS_PCH_TGP(dev_priv))
> - icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK,
> - TGP_TC_HPD_ENABLE_MASK);
> - else if (HAS_PCH_JSP(dev_priv))
> - icp_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK, 0);
> - else if (HAS_PCH_MCC(dev_priv))
> - icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,
> - ICP_TC_HPD_ENABLE(PORT_TC1));
> - else
> - icp_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK,
> - ICP_TC_HPD_ENABLE_MASK);
> + if (HAS_PCH_TGP(dev_priv)) {
> + icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);
> + icp_tc_hpd_detection_setup(dev_priv, TGP_TC_HPD_ENABLE_MASK);
> + } else if (HAS_PCH_JSP(dev_priv)) {
> + icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);
> + } else if (HAS_PCH_MCC(dev_priv)) {
> + icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK);
> + icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE(PORT_TC1));
> + } else {
> + icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK);
> + icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE_MASK);
> + }
> }
>
> static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 09/12] drm/i915: Move hpd_pin setup to encoder init
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (7 preceding siblings ...)
2020-06-30 21:55 ` [Intel-gfx] [PATCH 08/12] drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-08 16:57 ` [Intel-gfx] [09/12] " Souza, Jose
2020-06-30 21:55 ` [Intel-gfx] [PATCH 10/12] drm/i915: Introduce HPD_PORT_TC<n> Ville Syrjala
` (5 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently DP/HDMI/DDI encoders init their hpd_pin from the
connector init. Let's move it to the encoder init so that
we don't need to add platform specific junk to the connector
init (which is shared by all g4x+ platforms).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
3 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 884b507c5f55..d024491738b3 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4907,6 +4907,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
encoder->port = port;
encoder->cloneable = 0;
encoder->pipe_mask = ~0;
+ encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
if (INTEL_GEN(dev_priv) >= 11)
intel_dig_port->saved_port_bits = intel_de_read(dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3df5d901dd9d..cd516cd8acb8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -8211,7 +8211,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
if (INTEL_GEN(dev_priv) >= 11)
connector->ycbcr_420_allowed = true;
- intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
intel_dp_aux_init(intel_dp);
@@ -8354,6 +8353,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
}
intel_encoder->cloneable = 0;
intel_encoder->port = port;
+ intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
intel_dig_port->hpd_pulse = intel_dp_hpd_pulse;
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 864a1642e81c..f515d0fce968 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3253,7 +3253,6 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
connector->ycbcr_420_allowed = true;
- intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
if (HAS_DDI(dev_priv))
@@ -3385,6 +3384,7 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
intel_encoder->pipe_mask = ~0;
}
intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG;
+ intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
/*
* BSpec is unclear about HDMI+HDMI cloning on g4x, but it seems
* to work on real hardware. And since g4x can send infoframes to
--
2.26.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [09/12] drm/i915: Move hpd_pin setup to encoder init
2020-06-30 21:55 ` [Intel-gfx] [PATCH 09/12] drm/i915: Move hpd_pin setup to encoder init Ville Syrjala
@ 2020-09-08 16:57 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 16:57 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> Currently DP/HDMI/DDI encoders init their hpd_pin from the
> connector init. Let's move it to the encoder init so that
> we don't need to add platform specific junk to the connector
> init (which is shared by all g4x+ platforms).
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
> 3 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 884b507c5f55..d024491738b3 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4907,6 +4907,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> encoder->port = port;
> encoder->cloneable = 0;
> encoder->pipe_mask = ~0;
> + encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
>
> if (INTEL_GEN(dev_priv) >= 11)
> intel_dig_port->saved_port_bits = intel_de_read(dev_priv,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3df5d901dd9d..cd516cd8acb8 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -8211,7 +8211,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> if (INTEL_GEN(dev_priv) >= 11)
> connector->ycbcr_420_allowed = true;
>
> - intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
> intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
>
> intel_dp_aux_init(intel_dp);
> @@ -8354,6 +8353,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
> }
> intel_encoder->cloneable = 0;
> intel_encoder->port = port;
> + intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
>
> intel_dig_port->hpd_pulse = intel_dp_hpd_pulse;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 864a1642e81c..f515d0fce968 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -3253,7 +3253,6 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
> if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> connector->ycbcr_420_allowed = true;
>
> - intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
> intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
>
> if (HAS_DDI(dev_priv))
> @@ -3385,6 +3384,7 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
> intel_encoder->pipe_mask = ~0;
> }
> intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG;
> + intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
> /*
> * BSpec is unclear about HDMI+HDMI cloning on g4x, but it seems
> * to work on real hardware. And since g4x can send infoframes to
>
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 10/12] drm/i915: Introduce HPD_PORT_TC<n>
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (8 preceding siblings ...)
2020-06-30 21:55 ` [Intel-gfx] [PATCH 09/12] drm/i915: Move hpd_pin setup to encoder init Ville Syrjala
@ 2020-06-30 21:55 ` Ville Syrjala
2020-09-12 1:30 ` [Intel-gfx] [10/12] " Souza, Jose
2020-06-30 21:56 ` [Intel-gfx] [PATCH 11/12] drm/i915: Introduce intel_hpd_hotplug_irqs() Ville Syrjala
` (4 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:55 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make a clean split between hpd pins for DDI vs. TC. This matches
how the actual hardware is split.
And with this we move the DDI/PHY->HPD pin mapping into the encoder
init instead of having to remap yet again in the interrupt code.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 65 +++++++++-
drivers/gpu/drm/i915/display/intel_hotplug.c | 25 +---
drivers/gpu/drm/i915/i915_drv.h | 17 +--
drivers/gpu/drm/i915/i915_irq.c | 121 +++++--------------
4 files changed, 102 insertions(+), 126 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index d024491738b3..a2c9815c5abc 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4847,6 +4847,57 @@ intel_ddi_max_lanes(struct intel_digital_port *intel_dport)
return max_lanes;
}
+static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv,
+ enum port port)
+{
+ if (port >= PORT_D)
+ return HPD_PORT_TC1 + port - PORT_D;
+ else
+ return HPD_PORT_A + port - PORT_A;
+}
+
+static enum hpd_pin rkl_hpd_pin(struct drm_i915_private *dev_priv,
+ enum port port)
+{
+ if (HAS_PCH_TGP(dev_priv))
+ return tgl_hpd_pin(dev_priv, port);
+
+ if (port >= PORT_D)
+ return HPD_PORT_C + port - PORT_D;
+ else
+ return HPD_PORT_A + port - PORT_A;
+}
+
+static enum hpd_pin icl_hpd_pin(struct drm_i915_private *dev_priv,
+ enum port port)
+{
+ if (port >= PORT_C)
+ return HPD_PORT_TC1 + port - PORT_C;
+ else
+ return HPD_PORT_A + port - PORT_A;
+}
+
+static enum hpd_pin ehl_hpd_pin(struct drm_i915_private *dev_priv,
+ enum port port)
+{
+ if (port == PORT_D)
+ return HPD_PORT_A;
+
+ if (HAS_PCH_MCC(dev_priv))
+ return icl_hpd_pin(dev_priv, port);
+
+ return HPD_PORT_A + port - PORT_A;
+}
+
+static enum hpd_pin cnl_hpd_pin(struct drm_i915_private *dev_priv,
+ enum port port)
+{
+ if (port == PORT_F)
+ return HPD_PORT_E;
+
+ return HPD_PORT_A + port - PORT_A;
+}
+
void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
{
struct intel_digital_port *intel_dig_port;
@@ -4907,7 +4958,19 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
encoder->port = port;
encoder->cloneable = 0;
encoder->pipe_mask = ~0;
- encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
+
+ if (IS_ROCKETLAKE(dev_priv))
+ encoder->hpd_pin = rkl_hpd_pin(dev_priv, port);
+ else if (INTEL_GEN(dev_priv) >= 12)
+ encoder->hpd_pin = tgl_hpd_pin(dev_priv, port);
+ else if (IS_ELKHARTLAKE(dev_priv))
+ encoder->hpd_pin = ehl_hpd_pin(dev_priv, port);
+ else if (IS_GEN(dev_priv, 11))
+ encoder->hpd_pin = icl_hpd_pin(dev_priv, port);
+ else if (IS_GEN(dev_priv, 10))
+ encoder->hpd_pin = cnl_hpd_pin(dev_priv, port);
+ else
+ encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
if (INTEL_GEN(dev_priv) >= 11)
intel_dig_port->saved_port_bits = intel_de_read(dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 80bcfff032e9..8a8e77314a4e 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -81,33 +81,12 @@
*
* It is only valid and used by digital port encoder.
*
- * Return pin that is associatade with @port and HDP_NONE if no pin is
- * hard associated with that @port.
+ * Return pin that is associatade with @port.
*/
enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
enum port port)
{
- enum phy phy = intel_port_to_phy(dev_priv, port);
-
- /*
- * RKL + TGP PCH is a special case; we effectively choose the hpd_pin
- * based on the DDI rather than the PHY (i.e., the last two outputs
- * shold be HPD_PORT_{D,E} rather than {C,D}. Note that this differs
- * from the behavior of both TGL+TGP and RKL+CMP.
- */
- if (IS_ROCKETLAKE(dev_priv) && HAS_PCH_TGP(dev_priv))
- return HPD_PORT_A + port - PORT_A;
-
- switch (phy) {
- case PHY_F:
- return IS_CNL_WITH_PORT_F(dev_priv) ? HPD_PORT_E : HPD_PORT_F;
- case PHY_A ... PHY_E:
- case PHY_G ... PHY_I:
- return HPD_PORT_A + phy - PHY_A;
- default:
- MISSING_CASE(phy);
- return HPD_NONE;
- }
+ return HPD_PORT_A + port - PORT_A;
}
#define HPD_STORM_DETECT_PERIOD 1000
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6e9072ab30a1..dcd35cd97f01 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -113,13 +113,6 @@
struct drm_i915_gem_object;
-/*
- * The code assumes that the hpd_pins below have consecutive values and
- * starting with HPD_PORT_A, the HPD pin associated with any port can be
- * retrieved by adding the corresponding port (or phy) enum value to
- * HPD_PORT_A in most cases. For example:
- * HPD_PORT_C = HPD_PORT_A + PHY_C - PHY_A
- */
enum hpd_pin {
HPD_NONE = 0,
HPD_TV = HPD_NONE, /* TV is known to be unreliable */
@@ -131,10 +124,12 @@ enum hpd_pin {
HPD_PORT_C,
HPD_PORT_D,
HPD_PORT_E,
- HPD_PORT_F,
- HPD_PORT_G,
- HPD_PORT_H,
- HPD_PORT_I,
+ HPD_PORT_TC1,
+ HPD_PORT_TC2,
+ HPD_PORT_TC3,
+ HPD_PORT_TC4,
+ HPD_PORT_TC5,
+ HPD_PORT_TC6,
HPD_NUM_PINS
};
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 92d74448ee03..95ab4432a87d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -131,40 +131,24 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
};
static const u32 hpd_gen11[HPD_NUM_PINS] = {
- [HPD_PORT_C] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
- [HPD_PORT_D] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
- [HPD_PORT_E] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
- [HPD_PORT_F] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
-};
-
-static const u32 hpd_gen12[HPD_NUM_PINS] = {
- [HPD_PORT_D] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
- [HPD_PORT_E] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
- [HPD_PORT_F] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
- [HPD_PORT_G] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
- [HPD_PORT_H] = GEN11_TC_HOTPLUG(PORT_TC5) | GEN11_TBT_HOTPLUG(PORT_TC5),
- [HPD_PORT_I] = GEN11_TC_HOTPLUG(PORT_TC6) | GEN11_TBT_HOTPLUG(PORT_TC6),
+ [HPD_PORT_TC1] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
+ [HPD_PORT_TC2] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
+ [HPD_PORT_TC3] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
+ [HPD_PORT_TC4] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
+ [HPD_PORT_TC5] = GEN11_TC_HOTPLUG(PORT_TC5) | GEN11_TBT_HOTPLUG(PORT_TC5),
+ [HPD_PORT_TC6] = GEN11_TC_HOTPLUG(PORT_TC6) | GEN11_TBT_HOTPLUG(PORT_TC6),
};
static const u32 hpd_icp[HPD_NUM_PINS] = {
- [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A),
- [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B),
- [HPD_PORT_C] = SDE_TC_HOTPLUG_ICP(PORT_TC1),
- [HPD_PORT_D] = SDE_TC_HOTPLUG_ICP(PORT_TC2),
- [HPD_PORT_E] = SDE_TC_HOTPLUG_ICP(PORT_TC3),
- [HPD_PORT_F] = SDE_TC_HOTPLUG_ICP(PORT_TC4),
-};
-
-static const u32 hpd_tgp[HPD_NUM_PINS] = {
[HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A),
[HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B),
[HPD_PORT_C] = SDE_DDI_HOTPLUG_ICP(PORT_C),
- [HPD_PORT_D] = SDE_TC_HOTPLUG_ICP(PORT_TC1),
- [HPD_PORT_E] = SDE_TC_HOTPLUG_ICP(PORT_TC2),
- [HPD_PORT_F] = SDE_TC_HOTPLUG_ICP(PORT_TC3),
- [HPD_PORT_G] = SDE_TC_HOTPLUG_ICP(PORT_TC4),
- [HPD_PORT_H] = SDE_TC_HOTPLUG_ICP(PORT_TC5),
- [HPD_PORT_I] = SDE_TC_HOTPLUG_ICP(PORT_TC6),
+ [HPD_PORT_TC1] = SDE_TC_HOTPLUG_ICP(PORT_TC1),
+ [HPD_PORT_TC2] = SDE_TC_HOTPLUG_ICP(PORT_TC2),
+ [HPD_PORT_TC3] = SDE_TC_HOTPLUG_ICP(PORT_TC3),
+ [HPD_PORT_TC4] = SDE_TC_HOTPLUG_ICP(PORT_TC4),
+ [HPD_PORT_TC5] = SDE_TC_HOTPLUG_ICP(PORT_TC5),
+ [HPD_PORT_TC6] = SDE_TC_HOTPLUG_ICP(PORT_TC6),
};
static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
@@ -180,9 +164,7 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
return;
}
- if (INTEL_GEN(dev_priv) >= 12)
- hpd->hpd = hpd_gen12;
- else if (INTEL_GEN(dev_priv) >= 11)
+ if (INTEL_GEN(dev_priv) >= 11)
hpd->hpd = hpd_gen11;
else if (IS_GEN9_LP(dev_priv))
hpd->hpd = hpd_bxt;
@@ -196,9 +178,8 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
if (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv))
return;
- if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv))
- hpd->pch_hpd = hpd_tgp;
- else if (HAS_PCH_ICP(dev_priv) || HAS_PCH_MCC(dev_priv))
+ if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv) ||
+ HAS_PCH_ICP(dev_priv) || HAS_PCH_MCC(dev_priv))
hpd->pch_hpd = hpd_icp;
else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_SPT(dev_priv))
hpd->pch_hpd = hpd_spt;
@@ -1048,33 +1029,17 @@ static void ivb_parity_work(struct work_struct *work)
static bool gen11_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
{
switch (pin) {
- case HPD_PORT_C:
+ case HPD_PORT_TC1:
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);
- case HPD_PORT_D:
+ case HPD_PORT_TC2:
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC2);
- case HPD_PORT_E:
+ case HPD_PORT_TC3:
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC3);
- case HPD_PORT_F:
+ case HPD_PORT_TC4:
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
- default:
- return false;
- }
-}
-
-static bool gen12_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
-{
- switch (pin) {
- case HPD_PORT_D:
- return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);
- case HPD_PORT_E:
- return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC2);
- case HPD_PORT_F:
- return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC3);
- case HPD_PORT_G:
- return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
- case HPD_PORT_H:
+ case HPD_PORT_TC5:
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC5);
- case HPD_PORT_I:
+ case HPD_PORT_TC6:
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC6);
default:
return false;
@@ -1112,33 +1077,17 @@ static bool icp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
static bool icp_tc_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
{
switch (pin) {
- case HPD_PORT_C:
+ case HPD_PORT_TC1:
return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
- case HPD_PORT_D:
+ case HPD_PORT_TC2:
return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
- case HPD_PORT_E:
+ case HPD_PORT_TC3:
return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
- case HPD_PORT_F:
+ case HPD_PORT_TC4:
return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
- default:
- return false;
- }
-}
-
-static bool tgp_tc_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
-{
- switch (pin) {
- case HPD_PORT_D:
- return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
- case HPD_PORT_E:
- return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
- case HPD_PORT_F:
- return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
- case HPD_PORT_G:
- return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
- case HPD_PORT_H:
+ case HPD_PORT_TC5:
return val & ICP_TC_HPD_LONG_DETECT(PORT_TC5);
- case HPD_PORT_I:
+ case HPD_PORT_TC6:
return val & ICP_TC_HPD_LONG_DETECT(PORT_TC6);
default:
return false;
@@ -1892,19 +1841,16 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
{
u32 ddi_hotplug_trigger, tc_hotplug_trigger;
u32 pin_mask = 0, long_mask = 0;
- bool (*tc_port_hotplug_long_detect)(enum hpd_pin pin, u32 val);
if (HAS_PCH_TGP(dev_priv)) {
ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP;
tc_hotplug_trigger = pch_iir & SDE_TC_MASK_TGP;
- tc_port_hotplug_long_detect = tgp_tc_port_hotplug_long_detect;
} else if (HAS_PCH_JSP(dev_priv)) {
ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP;
tc_hotplug_trigger = 0;
} else if (HAS_PCH_MCC(dev_priv)) {
ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
tc_hotplug_trigger = pch_iir & SDE_TC_HOTPLUG_ICP(PORT_TC1);
- tc_port_hotplug_long_detect = icp_tc_port_hotplug_long_detect;
} else {
drm_WARN(&dev_priv->drm, !HAS_PCH_ICP(dev_priv),
"Unrecognized PCH type 0x%x\n",
@@ -1912,7 +1858,6 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
- tc_port_hotplug_long_detect = icp_tc_port_hotplug_long_detect;
}
if (ddi_hotplug_trigger) {
@@ -1936,7 +1881,7 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
tc_hotplug_trigger, dig_hotplug_reg,
dev_priv->hotplug.pch_hpd,
- tc_port_hotplug_long_detect);
+ icp_tc_port_hotplug_long_detect);
}
if (pin_mask)
@@ -2184,12 +2129,6 @@ static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
u32 pin_mask = 0, long_mask = 0;
u32 trigger_tc = iir & GEN11_DE_TC_HOTPLUG_MASK;
u32 trigger_tbt = iir & GEN11_DE_TBT_HOTPLUG_MASK;
- long_pulse_detect_func long_pulse_detect;
-
- if (INTEL_GEN(dev_priv) >= 12)
- long_pulse_detect = gen12_port_hotplug_long_detect;
- else
- long_pulse_detect = gen11_port_hotplug_long_detect;
if (trigger_tc) {
u32 dig_hotplug_reg;
@@ -2200,7 +2139,7 @@ static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
trigger_tc, dig_hotplug_reg,
dev_priv->hotplug.hpd,
- long_pulse_detect);
+ gen11_port_hotplug_long_detect);
}
if (trigger_tbt) {
@@ -2212,7 +2151,7 @@ static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
trigger_tbt, dig_hotplug_reg,
dev_priv->hotplug.hpd,
- long_pulse_detect);
+ gen11_port_hotplug_long_detect);
}
if (pin_mask)
--
2.26.2
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^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [10/12] drm/i915: Introduce HPD_PORT_TC<n>
2020-06-30 21:55 ` [Intel-gfx] [PATCH 10/12] drm/i915: Introduce HPD_PORT_TC<n> Ville Syrjala
@ 2020-09-12 1:30 ` Souza, Jose
2020-09-14 14:48 ` Ville Syrjälä
0 siblings, 1 reply; 32+ messages in thread
From: Souza, Jose @ 2020-09-12 1:30 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> Make a clean split between hpd pins for DDI vs. TC. This matches
> how the actual hardware is split.
>
> And with this we move the DDI/PHY->HPD pin mapping into the encoder
> init instead of having to remap yet again in the interrupt code.
>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 65 +++++++++-
> drivers/gpu/drm/i915/display/intel_hotplug.c | 25 +---
> drivers/gpu/drm/i915/i915_drv.h | 17 +--
> drivers/gpu/drm/i915/i915_irq.c | 121 +++++--------------
> 4 files changed, 102 insertions(+), 126 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index d024491738b3..a2c9815c5abc 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4847,6 +4847,57 @@ intel_ddi_max_lanes(struct intel_digital_port *intel_dport)
> return max_lanes;
> }
>
> +static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv,
> + enum port port)
> +{
> + if (port >= PORT_D)
> + return HPD_PORT_TC1 + port - PORT_D;
> + else
> + return HPD_PORT_A + port - PORT_A;
> +}
> +
> +static enum hpd_pin rkl_hpd_pin(struct drm_i915_private *dev_priv,
> + enum port port)
> +{
> + if (HAS_PCH_TGP(dev_priv))
> + return tgl_hpd_pin(dev_priv, port);
> +
> + if (port >= PORT_D)
> + return HPD_PORT_C + port - PORT_D;
The above looks wrong, for it would match with only the return bellow.
> + else
> + return HPD_PORT_A + port - PORT_A;
> +}
> +
> +static enum hpd_pin icl_hpd_pin(struct drm_i915_private *dev_priv,
> + enum port port)
> +{
> + if (port >= PORT_C)
> + return HPD_PORT_TC1 + port - PORT_C;
> + else
> + return HPD_PORT_A + port - PORT_A;
> +}
> +
> +static enum hpd_pin ehl_hpd_pin(struct drm_i915_private *dev_priv,
> + enum port port)
> +{
> + if (port == PORT_D)
> + return HPD_PORT_A;
> +
> + if (HAS_PCH_MCC(dev_priv))
> + return icl_hpd_pin(dev_priv, port);
Maybe call tgl_hpd_pin() for HAS_PCH_MCC()? The code bellow will match but just for consistency.
Other than the RKL comment it looks good to me.
> +
> + return HPD_PORT_A + port - PORT_A;
> +}
> +
> +static enum hpd_pin cnl_hpd_pin(struct drm_i915_private *dev_priv,
> + enum port port)
> +{
> + if (port == PORT_F)
> + return HPD_PORT_E;
> +
> + return HPD_PORT_A + port - PORT_A;
> +}
> +
> void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> {
> struct intel_digital_port *intel_dig_port;
> @@ -4907,7 +4958,19 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> encoder->port = port;
> encoder->cloneable = 0;
> encoder->pipe_mask = ~0;
> - encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
> +
> + if (IS_ROCKETLAKE(dev_priv))
> + encoder->hpd_pin = rkl_hpd_pin(dev_priv, port);
> + else if (INTEL_GEN(dev_priv) >= 12)
> + encoder->hpd_pin = tgl_hpd_pin(dev_priv, port);
> + else if (IS_ELKHARTLAKE(dev_priv))
> + encoder->hpd_pin = ehl_hpd_pin(dev_priv, port);
> + else if (IS_GEN(dev_priv, 11))
> + encoder->hpd_pin = icl_hpd_pin(dev_priv, port);
> + else if (IS_GEN(dev_priv, 10))
> + encoder->hpd_pin = cnl_hpd_pin(dev_priv, port);
> + else
> + encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
>
> if (INTEL_GEN(dev_priv) >= 11)
> intel_dig_port->saved_port_bits = intel_de_read(dev_priv,
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
> index 80bcfff032e9..8a8e77314a4e 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> @@ -81,33 +81,12 @@
> *
> * It is only valid and used by digital port encoder.
> *
> - * Return pin that is associatade with @port and HDP_NONE if no pin is
> - * hard associated with that @port.
> + * Return pin that is associatade with @port.
> */
> enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
> enum port port)
> {
> - enum phy phy = intel_port_to_phy(dev_priv, port);
> -
> - /*
> - * RKL + TGP PCH is a special case; we effectively choose the hpd_pin
> - * based on the DDI rather than the PHY (i.e., the last two outputs
> - * shold be HPD_PORT_{D,E} rather than {C,D}. Note that this differs
> - * from the behavior of both TGL+TGP and RKL+CMP.
> - */
> - if (IS_ROCKETLAKE(dev_priv) && HAS_PCH_TGP(dev_priv))
> - return HPD_PORT_A + port - PORT_A;
> -
> - switch (phy) {
> - case PHY_F:
> - return IS_CNL_WITH_PORT_F(dev_priv) ? HPD_PORT_E : HPD_PORT_F;
> - case PHY_A ... PHY_E:
> - case PHY_G ... PHY_I:
> - return HPD_PORT_A + phy - PHY_A;
> - default:
> - MISSING_CASE(phy);
> - return HPD_NONE;
> - }
> + return HPD_PORT_A + port - PORT_A;
> }
>
> #define HPD_STORM_DETECT_PERIOD 1000
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6e9072ab30a1..dcd35cd97f01 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -113,13 +113,6 @@
>
> struct drm_i915_gem_object;
>
> -/*
> - * The code assumes that the hpd_pins below have consecutive values and
> - * starting with HPD_PORT_A, the HPD pin associated with any port can be
> - * retrieved by adding the corresponding port (or phy) enum value to
> - * HPD_PORT_A in most cases. For example:
> - * HPD_PORT_C = HPD_PORT_A + PHY_C - PHY_A
> - */
> enum hpd_pin {
> HPD_NONE = 0,
> HPD_TV = HPD_NONE, /* TV is known to be unreliable */
> @@ -131,10 +124,12 @@ enum hpd_pin {
> HPD_PORT_C,
> HPD_PORT_D,
> HPD_PORT_E,
> - HPD_PORT_F,
> - HPD_PORT_G,
> - HPD_PORT_H,
> - HPD_PORT_I,
> + HPD_PORT_TC1,
> + HPD_PORT_TC2,
> + HPD_PORT_TC3,
> + HPD_PORT_TC4,
> + HPD_PORT_TC5,
> + HPD_PORT_TC6,
>
> HPD_NUM_PINS
> };
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 92d74448ee03..95ab4432a87d 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -131,40 +131,24 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
> };
>
> static const u32 hpd_gen11[HPD_NUM_PINS] = {
> - [HPD_PORT_C] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
> - [HPD_PORT_D] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
> - [HPD_PORT_E] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
> - [HPD_PORT_F] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
> -};
> -
> -static const u32 hpd_gen12[HPD_NUM_PINS] = {
> - [HPD_PORT_D] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
> - [HPD_PORT_E] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
> - [HPD_PORT_F] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
> - [HPD_PORT_G] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
> - [HPD_PORT_H] = GEN11_TC_HOTPLUG(PORT_TC5) | GEN11_TBT_HOTPLUG(PORT_TC5),
> - [HPD_PORT_I] = GEN11_TC_HOTPLUG(PORT_TC6) | GEN11_TBT_HOTPLUG(PORT_TC6),
> + [HPD_PORT_TC1] = GEN11_TC_HOTPLUG(PORT_TC1) | GEN11_TBT_HOTPLUG(PORT_TC1),
> + [HPD_PORT_TC2] = GEN11_TC_HOTPLUG(PORT_TC2) | GEN11_TBT_HOTPLUG(PORT_TC2),
> + [HPD_PORT_TC3] = GEN11_TC_HOTPLUG(PORT_TC3) | GEN11_TBT_HOTPLUG(PORT_TC3),
> + [HPD_PORT_TC4] = GEN11_TC_HOTPLUG(PORT_TC4) | GEN11_TBT_HOTPLUG(PORT_TC4),
> + [HPD_PORT_TC5] = GEN11_TC_HOTPLUG(PORT_TC5) | GEN11_TBT_HOTPLUG(PORT_TC5),
> + [HPD_PORT_TC6] = GEN11_TC_HOTPLUG(PORT_TC6) | GEN11_TBT_HOTPLUG(PORT_TC6),
> };
>
> static const u32 hpd_icp[HPD_NUM_PINS] = {
> - [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A),
> - [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B),
> - [HPD_PORT_C] = SDE_TC_HOTPLUG_ICP(PORT_TC1),
> - [HPD_PORT_D] = SDE_TC_HOTPLUG_ICP(PORT_TC2),
> - [HPD_PORT_E] = SDE_TC_HOTPLUG_ICP(PORT_TC3),
> - [HPD_PORT_F] = SDE_TC_HOTPLUG_ICP(PORT_TC4),
> -};
> -
> -static const u32 hpd_tgp[HPD_NUM_PINS] = {
> [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A),
> [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B),
> [HPD_PORT_C] = SDE_DDI_HOTPLUG_ICP(PORT_C),
> - [HPD_PORT_D] = SDE_TC_HOTPLUG_ICP(PORT_TC1),
> - [HPD_PORT_E] = SDE_TC_HOTPLUG_ICP(PORT_TC2),
> - [HPD_PORT_F] = SDE_TC_HOTPLUG_ICP(PORT_TC3),
> - [HPD_PORT_G] = SDE_TC_HOTPLUG_ICP(PORT_TC4),
> - [HPD_PORT_H] = SDE_TC_HOTPLUG_ICP(PORT_TC5),
> - [HPD_PORT_I] = SDE_TC_HOTPLUG_ICP(PORT_TC6),
> + [HPD_PORT_TC1] = SDE_TC_HOTPLUG_ICP(PORT_TC1),
> + [HPD_PORT_TC2] = SDE_TC_HOTPLUG_ICP(PORT_TC2),
> + [HPD_PORT_TC3] = SDE_TC_HOTPLUG_ICP(PORT_TC3),
> + [HPD_PORT_TC4] = SDE_TC_HOTPLUG_ICP(PORT_TC4),
> + [HPD_PORT_TC5] = SDE_TC_HOTPLUG_ICP(PORT_TC5),
> + [HPD_PORT_TC6] = SDE_TC_HOTPLUG_ICP(PORT_TC6),
> };
>
> static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
> @@ -180,9 +164,7 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
> return;
> }
>
> - if (INTEL_GEN(dev_priv) >= 12)
> - hpd->hpd = hpd_gen12;
> - else if (INTEL_GEN(dev_priv) >= 11)
> + if (INTEL_GEN(dev_priv) >= 11)
> hpd->hpd = hpd_gen11;
> else if (IS_GEN9_LP(dev_priv))
> hpd->hpd = hpd_bxt;
> @@ -196,9 +178,8 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
> if (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv))
> return;
>
> - if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv))
> - hpd->pch_hpd = hpd_tgp;
> - else if (HAS_PCH_ICP(dev_priv) || HAS_PCH_MCC(dev_priv))
> + if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv) ||
> + HAS_PCH_ICP(dev_priv) || HAS_PCH_MCC(dev_priv))
> hpd->pch_hpd = hpd_icp;
> else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_SPT(dev_priv))
> hpd->pch_hpd = hpd_spt;
> @@ -1048,33 +1029,17 @@ static void ivb_parity_work(struct work_struct *work)
> static bool gen11_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> {
> switch (pin) {
> - case HPD_PORT_C:
> + case HPD_PORT_TC1:
> return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);
> - case HPD_PORT_D:
> + case HPD_PORT_TC2:
> return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC2);
> - case HPD_PORT_E:
> + case HPD_PORT_TC3:
> return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC3);
> - case HPD_PORT_F:
> + case HPD_PORT_TC4:
> return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
> - default:
> - return false;
> - }
> -}
> -
> -static bool gen12_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> -{
> - switch (pin) {
> - case HPD_PORT_D:
> - return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);
> - case HPD_PORT_E:
> - return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC2);
> - case HPD_PORT_F:
> - return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC3);
> - case HPD_PORT_G:
> - return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
> - case HPD_PORT_H:
> + case HPD_PORT_TC5:
> return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC5);
> - case HPD_PORT_I:
> + case HPD_PORT_TC6:
> return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC6);
> default:
> return false;
> @@ -1112,33 +1077,17 @@ static bool icp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> static bool icp_tc_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> {
> switch (pin) {
> - case HPD_PORT_C:
> + case HPD_PORT_TC1:
> return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
> - case HPD_PORT_D:
> + case HPD_PORT_TC2:
> return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
> - case HPD_PORT_E:
> + case HPD_PORT_TC3:
> return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
> - case HPD_PORT_F:
> + case HPD_PORT_TC4:
> return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
> - default:
> - return false;
> - }
> -}
> -
> -static bool tgp_tc_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> -{
> - switch (pin) {
> - case HPD_PORT_D:
> - return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
> - case HPD_PORT_E:
> - return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
> - case HPD_PORT_F:
> - return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
> - case HPD_PORT_G:
> - return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
> - case HPD_PORT_H:
> + case HPD_PORT_TC5:
> return val & ICP_TC_HPD_LONG_DETECT(PORT_TC5);
> - case HPD_PORT_I:
> + case HPD_PORT_TC6:
> return val & ICP_TC_HPD_LONG_DETECT(PORT_TC6);
> default:
> return false;
> @@ -1892,19 +1841,16 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
> {
> u32 ddi_hotplug_trigger, tc_hotplug_trigger;
> u32 pin_mask = 0, long_mask = 0;
> - bool (*tc_port_hotplug_long_detect)(enum hpd_pin pin, u32 val);
>
> if (HAS_PCH_TGP(dev_priv)) {
> ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP;
> tc_hotplug_trigger = pch_iir & SDE_TC_MASK_TGP;
> - tc_port_hotplug_long_detect = tgp_tc_port_hotplug_long_detect;
> } else if (HAS_PCH_JSP(dev_priv)) {
> ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP;
> tc_hotplug_trigger = 0;
> } else if (HAS_PCH_MCC(dev_priv)) {
> ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
> tc_hotplug_trigger = pch_iir & SDE_TC_HOTPLUG_ICP(PORT_TC1);
> - tc_port_hotplug_long_detect = icp_tc_port_hotplug_long_detect;
> } else {
> drm_WARN(&dev_priv->drm, !HAS_PCH_ICP(dev_priv),
> "Unrecognized PCH type 0x%x\n",
> @@ -1912,7 +1858,6 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
>
> ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
> tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
> - tc_port_hotplug_long_detect = icp_tc_port_hotplug_long_detect;
> }
>
> if (ddi_hotplug_trigger) {
> @@ -1936,7 +1881,7 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
> intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
> tc_hotplug_trigger, dig_hotplug_reg,
> dev_priv->hotplug.pch_hpd,
> - tc_port_hotplug_long_detect);
> + icp_tc_port_hotplug_long_detect);
> }
>
> if (pin_mask)
> @@ -2184,12 +2129,6 @@ static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
> u32 pin_mask = 0, long_mask = 0;
> u32 trigger_tc = iir & GEN11_DE_TC_HOTPLUG_MASK;
> u32 trigger_tbt = iir & GEN11_DE_TBT_HOTPLUG_MASK;
> - long_pulse_detect_func long_pulse_detect;
> -
> - if (INTEL_GEN(dev_priv) >= 12)
> - long_pulse_detect = gen12_port_hotplug_long_detect;
> - else
> - long_pulse_detect = gen11_port_hotplug_long_detect;
>
> if (trigger_tc) {
> u32 dig_hotplug_reg;
> @@ -2200,7 +2139,7 @@ static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
> intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
> trigger_tc, dig_hotplug_reg,
> dev_priv->hotplug.hpd,
> - long_pulse_detect);
> + gen11_port_hotplug_long_detect);
> }
>
> if (trigger_tbt) {
> @@ -2212,7 +2151,7 @@ static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
> intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
> trigger_tbt, dig_hotplug_reg,
> dev_priv->hotplug.hpd,
> - long_pulse_detect);
> + gen11_port_hotplug_long_detect);
> }
>
> if (pin_mask)
>
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^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [10/12] drm/i915: Introduce HPD_PORT_TC<n>
2020-09-12 1:30 ` [Intel-gfx] [10/12] " Souza, Jose
@ 2020-09-14 14:48 ` Ville Syrjälä
2020-09-14 16:58 ` Souza, Jose
0 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjälä @ 2020-09-14 14:48 UTC (permalink / raw)
To: Souza, Jose; +Cc: intel-gfx
On Sat, Sep 12, 2020 at 01:30:23AM +0000, Souza, Jose wrote:
> On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <
> > ville.syrjala@linux.intel.com
> > >
> >
> > Make a clean split between hpd pins for DDI vs. TC. This matches
> > how the actual hardware is split.
> >
> > And with this we move the DDI/PHY->HPD pin mapping into the encoder
> > init instead of having to remap yet again in the interrupt code.
> >
> > Signed-off-by: Ville Syrjälä <
> > ville.syrjala@linux.intel.com
> > >
> > ---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 65 +++++++++-
> > drivers/gpu/drm/i915/display/intel_hotplug.c | 25 +---
> > drivers/gpu/drm/i915/i915_drv.h | 17 +--
> > drivers/gpu/drm/i915/i915_irq.c | 121 +++++--------------
> > 4 files changed, 102 insertions(+), 126 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index d024491738b3..a2c9815c5abc 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -4847,6 +4847,57 @@ intel_ddi_max_lanes(struct intel_digital_port *intel_dport)
> > return max_lanes;
> > }
> >
> > +static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv,
> > + enum port port)
> > +{
> > + if (port >= PORT_D)
> > + return HPD_PORT_TC1 + port - PORT_D;
> > + else
> > + return HPD_PORT_A + port - PORT_A;
> > +}
> > +
> > +static enum hpd_pin rkl_hpd_pin(struct drm_i915_private *dev_priv,
> > + enum port port)
> > +{
> > + if (HAS_PCH_TGP(dev_priv))
> > + return tgl_hpd_pin(dev_priv, port);
> > +
> > + if (port >= PORT_D)
> > + return HPD_PORT_C + port - PORT_D;
>
> The above looks wrong, for it would match with only the return bellow.
On rkl+tgp we want:
PORT_A (DDI A) -> HPD_PORT_A
PORT_B (DDI B) -> HPD_PORT_B
PORT_D (DDI TC1) -> HPD_PORT_TC1
PORT_E (DDI TC2) -> HPD_PORT_TC2
On rkl+cmp we want:
PORT_A (DDI A) -> HPD_PORT_A
PORT_B (DDI B) -> HPD_PORT_B
PORT_D (DDI TC1) -> HPD_PORT_C
PORT_E (DDI TC2) -> HPD_PORT_D
>
> > + else
> > + return HPD_PORT_A + port - PORT_A;
> > +}
> > +
> > +static enum hpd_pin icl_hpd_pin(struct drm_i915_private *dev_priv,
> > + enum port port)
> > +{
> > + if (port >= PORT_C)
> > + return HPD_PORT_TC1 + port - PORT_C;
> > + else
> > + return HPD_PORT_A + port - PORT_A;
> > +}
> > +
> > +static enum hpd_pin ehl_hpd_pin(struct drm_i915_private *dev_priv,
> > + enum port port)
> > +{
> > + if (port == PORT_D)
> > + return HPD_PORT_A;
> > +
> > + if (HAS_PCH_MCC(dev_priv))
> > + return icl_hpd_pin(dev_priv, port);
>
> Maybe call tgl_hpd_pin() for HAS_PCH_MCC()? The code bellow will match but just for consistency.
On jsl+mcc we want:
PORT_A/D (DDI A/D) -> HPD_PORT_A
PORT_B (DDI B) -> HPD_PORT_B
PORT_C (DDI C) -> HPD_PORT_TC1
on jsl+icp we want:
PORT_A/D (DDI A/D) -> HPD_PORT_A
PORT_B (DDI B) -> HPD_PORT_B
PORT_C (DDI C) -> HPD_PORT_C
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [10/12] drm/i915: Introduce HPD_PORT_TC<n>
2020-09-14 14:48 ` Ville Syrjälä
@ 2020-09-14 16:58 ` Souza, Jose
2020-09-14 17:06 ` Ville Syrjälä
0 siblings, 1 reply; 32+ messages in thread
From: Souza, Jose @ 2020-09-14 16:58 UTC (permalink / raw)
To: ville.syrjala; +Cc: intel-gfx
On Mon, 2020-09-14 at 17:48 +0300, Ville Syrjälä wrote:
> On Sat, Sep 12, 2020 at 01:30:23AM +0000, Souza, Jose wrote:
> > On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä <
> > > ville.syrjala@linux.intel.com
> > >
> > >
> > > Make a clean split between hpd pins for DDI vs. TC. This matches
> > > how the actual hardware is split.
> > >
> > > And with this we move the DDI/PHY->HPD pin mapping into the encoder
> > > init instead of having to remap yet again in the interrupt code.
> > >
> > > Signed-off-by: Ville Syrjälä <
> > > ville.syrjala@linux.intel.com
> > >
> > >
> > > ---
> > > drivers/gpu/drm/i915/display/intel_ddi.c | 65 +++++++++-
> > > drivers/gpu/drm/i915/display/intel_hotplug.c | 25 +---
> > > drivers/gpu/drm/i915/i915_drv.h | 17 +--
> > > drivers/gpu/drm/i915/i915_irq.c | 121 +++++--------------
> > > 4 files changed, 102 insertions(+), 126 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > index d024491738b3..a2c9815c5abc 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > @@ -4847,6 +4847,57 @@ intel_ddi_max_lanes(struct intel_digital_port *intel_dport)
> > > return max_lanes;
> > > }
> > >
> > > +static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv,
> > > + enum port port)
> > > +{
> > > + if (port >= PORT_D)
> > > + return HPD_PORT_TC1 + port - PORT_D;
> > > + else
> > > + return HPD_PORT_A + port - PORT_A;
> > > +}
> > > +
> > > +static enum hpd_pin rkl_hpd_pin(struct drm_i915_private *dev_priv,
> > > + enum port port)
> > > +{
> > > + if (HAS_PCH_TGP(dev_priv))
> > > + return tgl_hpd_pin(dev_priv, port);
> > > +
> > > + if (port >= PORT_D)
> > > + return HPD_PORT_C + port - PORT_D;
> >
> > The above looks wrong, for it would match with only the return bellow.
>
> On rkl+tgp we want:
> PORT_A (DDI A) -> HPD_PORT_A
> PORT_B (DDI B) -> HPD_PORT_B
> PORT_D (DDI TC1) -> HPD_PORT_TC1
> PORT_E (DDI TC2) -> HPD_PORT_TC2
>
> On rkl+cmp we want:
> PORT_A (DDI A) -> HPD_PORT_A
> PORT_B (DDI B) -> HPD_PORT_B
> PORT_D (DDI TC1) -> HPD_PORT_C
> PORT_E (DDI TC2) -> HPD_PORT_D
oohh okay, missed this.
>
> > > + else
> > > + return HPD_PORT_A + port - PORT_A;
> > > +}
> > > +
> > > +static enum hpd_pin icl_hpd_pin(struct drm_i915_private *dev_priv,
> > > + enum port port)
> > > +{
> > > + if (port >= PORT_C)
> > > + return HPD_PORT_TC1 + port - PORT_C;
> > > + else
> > > + return HPD_PORT_A + port - PORT_A;
> > > +}
> > > +
> > > +static enum hpd_pin ehl_hpd_pin(struct drm_i915_private *dev_priv,
> > > + enum port port)
> > > +{
> > > + if (port == PORT_D)
> > > + return HPD_PORT_A;
> > > +
> > > + if (HAS_PCH_MCC(dev_priv))
> > > + return icl_hpd_pin(dev_priv, port);
> >
> > Maybe call tgl_hpd_pin() for HAS_PCH_MCC()? The code bellow will match but just for consistency.
>
> On jsl+mcc we want:
> PORT_A/D (DDI A/D) -> HPD_PORT_A
> PORT_B (DDI B) -> HPD_PORT_B
> PORT_C (DDI C) -> HPD_PORT_TC1
>
> on jsl+icp we want:
> PORT_A/D (DDI A/D) -> HPD_PORT_A
> PORT_B (DDI B) -> HPD_PORT_B
> PORT_C (DDI C) -> HPD_PORT_C
>
>
The above would be the output of tgl_hpd_pin() but okay as it can be associate with SPT, LPT, ICP and TGP better keep the current code.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [10/12] drm/i915: Introduce HPD_PORT_TC<n>
2020-09-14 16:58 ` Souza, Jose
@ 2020-09-14 17:06 ` Ville Syrjälä
0 siblings, 0 replies; 32+ messages in thread
From: Ville Syrjälä @ 2020-09-14 17:06 UTC (permalink / raw)
To: Souza, Jose; +Cc: intel-gfx
On Mon, Sep 14, 2020 at 04:58:33PM +0000, Souza, Jose wrote:
> On Mon, 2020-09-14 at 17:48 +0300, Ville Syrjälä wrote:
> > On Sat, Sep 12, 2020 at 01:30:23AM +0000, Souza, Jose wrote:
> > > On Wed, 2020-07-01 at 00:55 +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä <
> > > > ville.syrjala@linux.intel.com
> > > >
> > > >
> > > > Make a clean split between hpd pins for DDI vs. TC. This matches
> > > > how the actual hardware is split.
> > > >
> > > > And with this we move the DDI/PHY->HPD pin mapping into the encoder
> > > > init instead of having to remap yet again in the interrupt code.
> > > >
> > > > Signed-off-by: Ville Syrjälä <
> > > > ville.syrjala@linux.intel.com
> > > >
> > > >
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_ddi.c | 65 +++++++++-
> > > > drivers/gpu/drm/i915/display/intel_hotplug.c | 25 +---
> > > > drivers/gpu/drm/i915/i915_drv.h | 17 +--
> > > > drivers/gpu/drm/i915/i915_irq.c | 121 +++++--------------
> > > > 4 files changed, 102 insertions(+), 126 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > index d024491738b3..a2c9815c5abc 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > @@ -4847,6 +4847,57 @@ intel_ddi_max_lanes(struct intel_digital_port *intel_dport)
> > > > return max_lanes;
> > > > }
> > > >
> > > > +static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv,
> > > > + enum port port)
> > > > +{
> > > > + if (port >= PORT_D)
> > > > + return HPD_PORT_TC1 + port - PORT_D;
> > > > + else
> > > > + return HPD_PORT_A + port - PORT_A;
> > > > +}
> > > > +
> > > > +static enum hpd_pin rkl_hpd_pin(struct drm_i915_private *dev_priv,
> > > > + enum port port)
> > > > +{
> > > > + if (HAS_PCH_TGP(dev_priv))
> > > > + return tgl_hpd_pin(dev_priv, port);
> > > > +
> > > > + if (port >= PORT_D)
> > > > + return HPD_PORT_C + port - PORT_D;
> > >
> > > The above looks wrong, for it would match with only the return bellow.
> >
> > On rkl+tgp we want:
> > PORT_A (DDI A) -> HPD_PORT_A
> > PORT_B (DDI B) -> HPD_PORT_B
> > PORT_D (DDI TC1) -> HPD_PORT_TC1
> > PORT_E (DDI TC2) -> HPD_PORT_TC2
> >
> > On rkl+cmp we want:
> > PORT_A (DDI A) -> HPD_PORT_A
> > PORT_B (DDI B) -> HPD_PORT_B
> > PORT_D (DDI TC1) -> HPD_PORT_C
> > PORT_E (DDI TC2) -> HPD_PORT_D
>
> oohh okay, missed this.
>
> >
> > > > + else
> > > > + return HPD_PORT_A + port - PORT_A;
> > > > +}
> > > > +
> > > > +static enum hpd_pin icl_hpd_pin(struct drm_i915_private *dev_priv,
> > > > + enum port port)
> > > > +{
> > > > + if (port >= PORT_C)
> > > > + return HPD_PORT_TC1 + port - PORT_C;
> > > > + else
> > > > + return HPD_PORT_A + port - PORT_A;
> > > > +}
> > > > +
> > > > +static enum hpd_pin ehl_hpd_pin(struct drm_i915_private *dev_priv,
> > > > + enum port port)
> > > > +{
> > > > + if (port == PORT_D)
> > > > + return HPD_PORT_A;
> > > > +
> > > > + if (HAS_PCH_MCC(dev_priv))
> > > > + return icl_hpd_pin(dev_priv, port);
> > >
> > > Maybe call tgl_hpd_pin() for HAS_PCH_MCC()? The code bellow will match but just for consistency.
> >
> > On jsl+mcc we want:
> > PORT_A/D (DDI A/D) -> HPD_PORT_A
> > PORT_B (DDI B) -> HPD_PORT_B
> > PORT_C (DDI C) -> HPD_PORT_TC1
> >
> > on jsl+icp we want:
> > PORT_A/D (DDI A/D) -> HPD_PORT_A
> > PORT_B (DDI B) -> HPD_PORT_B
> > PORT_C (DDI C) -> HPD_PORT_C
> >
> >
>
> The above would be the output of tgl_hpd_pin() but okay as it can be associate with SPT, LPT, ICP and TGP better keep the current code.
I suspect we probably want to change this to the already discussed
more declarative approach at some point, so it'll be easier to see
what maps to what. But in the meantime this at least gets this
hpd pin mapping stuff out from the guts of the irq code.
>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Ta.
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 11/12] drm/i915: Introduce intel_hpd_hotplug_irqs()
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (9 preceding siblings ...)
2020-06-30 21:55 ` [Intel-gfx] [PATCH 10/12] drm/i915: Introduce HPD_PORT_TC<n> Ville Syrjala
@ 2020-06-30 21:56 ` Ville Syrjala
2020-09-09 0:46 ` [Intel-gfx] [11/12] " Souza, Jose
2020-06-30 21:56 ` [Intel-gfx] [PATCH 12/12] drm/i915: Nuke pointless variable Ville Syrjala
` (3 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Introduce intel_hpd_hotplug_irqs() as a partner to
intel_hpd_enabled_irqs(). There's no need to care about the
encoders which we're not exposing, so we can avoid hardocoding
the masks in various places.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 50 +++++++++++++++------------------
1 file changed, 23 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 95ab4432a87d..b8a6a21f4c54 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2943,6 +2943,18 @@ static u32 intel_hpd_enabled_irqs(struct drm_i915_private *dev_priv,
return enabled_irqs;
}
+static u32 intel_hpd_hotplug_irqs(struct drm_i915_private *dev_priv,
+ const u32 hpd[HPD_NUM_PINS])
+{
+ struct intel_encoder *encoder;
+ u32 hotplug_irqs = 0;
+
+ for_each_intel_encoder(&dev_priv->drm, encoder)
+ hotplug_irqs |= hpd[encoder->hpd_pin];
+
+ return hotplug_irqs;
+}
+
static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug;
@@ -2972,12 +2984,8 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug_irqs, enabled_irqs;
- if (HAS_PCH_IBX(dev_priv))
- hotplug_irqs = SDE_HOTPLUG_MASK;
- else
- hotplug_irqs = SDE_HOTPLUG_MASK_CPT;
-
enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
+ hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
@@ -3005,13 +3013,12 @@ static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv,
}
static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
- u32 sde_ddi_mask, u32 sde_tc_mask,
u32 ddi_enable_mask, u32 tc_enable_mask)
{
u32 hotplug_irqs, enabled_irqs;
- hotplug_irqs = sde_ddi_mask | sde_tc_mask;
enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
+ hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
I915_WRITE(SHPD_FILTER_CNT, SHPD_FILTER_CNT_500_ADJ);
@@ -3029,7 +3036,6 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
icp_hpd_irq_setup(dev_priv,
- SDE_DDI_MASK_ICP, SDE_TC_HOTPLUG_ICP(PORT_TC1),
ICP_DDI_HPD_ENABLE_MASK, ICP_TC_HPD_ENABLE(PORT_TC1));
}
@@ -3041,7 +3047,6 @@ static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv)
static void jsp_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
icp_hpd_irq_setup(dev_priv,
- SDE_DDI_MASK_TGP, 0,
TGP_DDI_HPD_ENABLE_MASK, 0);
}
@@ -3074,7 +3079,7 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
u32 val;
enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
- hotplug_irqs = GEN11_DE_TC_HOTPLUG_MASK | GEN11_DE_TBT_HOTPLUG_MASK;
+ hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.hpd);
val = I915_READ(GEN11_DE_HPD_IMR);
val &= ~hotplug_irqs;
@@ -3085,10 +3090,10 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
gen11_hpd_detection_setup(dev_priv);
if (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP)
- icp_hpd_irq_setup(dev_priv, SDE_DDI_MASK_TGP, SDE_TC_MASK_TGP,
+ icp_hpd_irq_setup(dev_priv,
TGP_DDI_HPD_ENABLE_MASK, TGP_TC_HPD_ENABLE_MASK);
else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
- icp_hpd_irq_setup(dev_priv, SDE_DDI_MASK_ICP, SDE_TC_MASK_ICP,
+ icp_hpd_irq_setup(dev_priv,
ICP_DDI_HPD_ENABLE_MASK, ICP_TC_HPD_ENABLE_MASK);
}
@@ -3124,8 +3129,8 @@ static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv)
if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
I915_WRITE(SHPD_FILTER_CNT, SHPD_FILTER_CNT_500_ADJ);
- hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
+ hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
@@ -3152,22 +3157,13 @@ static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv)
{
u32 hotplug_irqs, enabled_irqs;
- if (INTEL_GEN(dev_priv) >= 8) {
- hotplug_irqs = GEN8_PORT_DP_A_HOTPLUG;
- enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
+ enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
+ hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.hpd);
+ if (INTEL_GEN(dev_priv) >= 8)
bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
- } else if (INTEL_GEN(dev_priv) >= 7) {
- hotplug_irqs = DE_DP_A_HOTPLUG_IVB;
- enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
-
+ else
ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
- } else {
- hotplug_irqs = DE_DP_A_HOTPLUG;
- enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
-
- ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
- }
ilk_hpd_detection_setup(dev_priv);
@@ -3216,7 +3212,7 @@ static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv)
u32 hotplug_irqs, enabled_irqs;
enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
- hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK;
+ hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.hpd);
bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
--
2.26.2
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^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [11/12] drm/i915: Introduce intel_hpd_hotplug_irqs()
2020-06-30 21:56 ` [Intel-gfx] [PATCH 11/12] drm/i915: Introduce intel_hpd_hotplug_irqs() Ville Syrjala
@ 2020-09-09 0:46 ` Souza, Jose
2020-09-09 19:17 ` Ville Syrjälä
0 siblings, 1 reply; 32+ messages in thread
From: Souza, Jose @ 2020-09-09 0:46 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:56 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> Introduce intel_hpd_hotplug_irqs() as a partner to
> intel_hpd_enabled_irqs(). There's no need to care about the
> encoders which we're not exposing, so we can avoid hardocoding
hard-coding
> the masks in various places.
Pretty nice patch, you only missed to do this change in the irq_handlers so we could nuke the SDE_DDI_MASKs, or are you planning to do this in a
follow up patch? If later consider this
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/i915_irq.c | 50 +++++++++++++++------------------
> 1 file changed, 23 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 95ab4432a87d..b8a6a21f4c54 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2943,6 +2943,18 @@ static u32 intel_hpd_enabled_irqs(struct drm_i915_private *dev_priv,
> return enabled_irqs;
> }
>
> +static u32 intel_hpd_hotplug_irqs(struct drm_i915_private *dev_priv,
> + const u32 hpd[HPD_NUM_PINS])
> +{
> + struct intel_encoder *encoder;
> + u32 hotplug_irqs = 0;
> +
> + for_each_intel_encoder(&dev_priv->drm, encoder)
> + hotplug_irqs |= hpd[encoder->hpd_pin];
> +
> + return hotplug_irqs;
> +}
> +
> static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug;
> @@ -2972,12 +2984,8 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug_irqs, enabled_irqs;
>
> - if (HAS_PCH_IBX(dev_priv))
> - hotplug_irqs = SDE_HOTPLUG_MASK;
> - else
> - hotplug_irqs = SDE_HOTPLUG_MASK_CPT;
> -
> enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
> + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
>
> ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
>
> @@ -3005,13 +3013,12 @@ static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv,
> }
>
> static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
> - u32 sde_ddi_mask, u32 sde_tc_mask,
> u32 ddi_enable_mask, u32 tc_enable_mask)
> {
> u32 hotplug_irqs, enabled_irqs;
>
> - hotplug_irqs = sde_ddi_mask | sde_tc_mask;
> enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
> + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
>
> I915_WRITE(SHPD_FILTER_CNT, SHPD_FILTER_CNT_500_ADJ);
>
> @@ -3029,7 +3036,6 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
> static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> icp_hpd_irq_setup(dev_priv,
> - SDE_DDI_MASK_ICP, SDE_TC_HOTPLUG_ICP(PORT_TC1),
> ICP_DDI_HPD_ENABLE_MASK, ICP_TC_HPD_ENABLE(PORT_TC1));
> }
>
> @@ -3041,7 +3047,6 @@ static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv)
> static void jsp_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> icp_hpd_irq_setup(dev_priv,
> - SDE_DDI_MASK_TGP, 0,
> TGP_DDI_HPD_ENABLE_MASK, 0);
> }
>
> @@ -3074,7 +3079,7 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
> u32 val;
>
> enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> - hotplug_irqs = GEN11_DE_TC_HOTPLUG_MASK | GEN11_DE_TBT_HOTPLUG_MASK;
> + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.hpd);
>
> val = I915_READ(GEN11_DE_HPD_IMR);
> val &= ~hotplug_irqs;
> @@ -3085,10 +3090,10 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
> gen11_hpd_detection_setup(dev_priv);
>
> if (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP)
> - icp_hpd_irq_setup(dev_priv, SDE_DDI_MASK_TGP, SDE_TC_MASK_TGP,
> + icp_hpd_irq_setup(dev_priv,
> TGP_DDI_HPD_ENABLE_MASK, TGP_TC_HPD_ENABLE_MASK);
> else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> - icp_hpd_irq_setup(dev_priv, SDE_DDI_MASK_ICP, SDE_TC_MASK_ICP,
> + icp_hpd_irq_setup(dev_priv,
> ICP_DDI_HPD_ENABLE_MASK, ICP_TC_HPD_ENABLE_MASK);
> }
>
> @@ -3124,8 +3129,8 @@ static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv)
> if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
> I915_WRITE(SHPD_FILTER_CNT, SHPD_FILTER_CNT_500_ADJ);
>
> - hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
> enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
> + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
>
> ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
>
> @@ -3152,22 +3157,13 @@ static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv)
> {
> u32 hotplug_irqs, enabled_irqs;
>
> - if (INTEL_GEN(dev_priv) >= 8) {
> - hotplug_irqs = GEN8_PORT_DP_A_HOTPLUG;
> - enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> + enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.hpd);
>
> + if (INTEL_GEN(dev_priv) >= 8)
> bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
> - } else if (INTEL_GEN(dev_priv) >= 7) {
> - hotplug_irqs = DE_DP_A_HOTPLUG_IVB;
> - enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> -
> + else
> ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
> - } else {
> - hotplug_irqs = DE_DP_A_HOTPLUG;
> - enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> -
> - ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
> - }
>
> ilk_hpd_detection_setup(dev_priv);
>
> @@ -3216,7 +3212,7 @@ static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv)
> u32 hotplug_irqs, enabled_irqs;
>
> enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> - hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK;
> + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.hpd);
>
> bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
>
>
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^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [11/12] drm/i915: Introduce intel_hpd_hotplug_irqs()
2020-09-09 0:46 ` [Intel-gfx] [11/12] " Souza, Jose
@ 2020-09-09 19:17 ` Ville Syrjälä
0 siblings, 0 replies; 32+ messages in thread
From: Ville Syrjälä @ 2020-09-09 19:17 UTC (permalink / raw)
To: Souza, Jose; +Cc: intel-gfx
On Wed, Sep 09, 2020 at 12:46:56AM +0000, Souza, Jose wrote:
> On Wed, 2020-07-01 at 00:56 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <
> > ville.syrjala@linux.intel.com
> > >
> >
> > Introduce intel_hpd_hotplug_irqs() as a partner to
> > intel_hpd_enabled_irqs(). There's no need to care about the
> > encoders which we're not exposing, so we can avoid hardocoding
>
> hard-coding
>
> > the masks in various places.
>
> Pretty nice patch, you only missed to do this change in the irq_handlers so we could nuke the SDE_DDI_MASKs, or are you planning to do this in a
> follow up patch? If later consider this
I didn't decide yet how to do that part. One option is to compute the
mask there too, but the other option to just use the full mask there
and rely on the fact that the IMR will keep the unused bits clear
in the IIR. Not sure if the latter approach is quite as scalable though.
Eg. in theory some new PCH type might repurpose some of the bits for
some totally different use.
>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> >
> > Signed-off-by: Ville Syrjälä <
> > ville.syrjala@linux.intel.com
> > >
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 50 +++++++++++++++------------------
> > 1 file changed, 23 insertions(+), 27 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 95ab4432a87d..b8a6a21f4c54 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -2943,6 +2943,18 @@ static u32 intel_hpd_enabled_irqs(struct drm_i915_private *dev_priv,
> > return enabled_irqs;
> > }
> >
> > +static u32 intel_hpd_hotplug_irqs(struct drm_i915_private *dev_priv,
> > + const u32 hpd[HPD_NUM_PINS])
> > +{
> > + struct intel_encoder *encoder;
> > + u32 hotplug_irqs = 0;
> > +
> > + for_each_intel_encoder(&dev_priv->drm, encoder)
> > + hotplug_irqs |= hpd[encoder->hpd_pin];
> > +
> > + return hotplug_irqs;
> > +}
> > +
> > static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
> > {
> > u32 hotplug;
> > @@ -2972,12 +2984,8 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
> > {
> > u32 hotplug_irqs, enabled_irqs;
> >
> > - if (HAS_PCH_IBX(dev_priv))
> > - hotplug_irqs = SDE_HOTPLUG_MASK;
> > - else
> > - hotplug_irqs = SDE_HOTPLUG_MASK_CPT;
> > -
> > enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
> > + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
> >
> > ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
> >
> > @@ -3005,13 +3013,12 @@ static void icp_tc_hpd_detection_setup(struct drm_i915_private *dev_priv,
> > }
> >
> > static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
> > - u32 sde_ddi_mask, u32 sde_tc_mask,
> > u32 ddi_enable_mask, u32 tc_enable_mask)
> > {
> > u32 hotplug_irqs, enabled_irqs;
> >
> > - hotplug_irqs = sde_ddi_mask | sde_tc_mask;
> > enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
> > + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
> >
> > I915_WRITE(SHPD_FILTER_CNT, SHPD_FILTER_CNT_500_ADJ);
> >
> > @@ -3029,7 +3036,6 @@ static void icp_hpd_irq_setup(struct drm_i915_private *dev_priv,
> > static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv)
> > {
> > icp_hpd_irq_setup(dev_priv,
> > - SDE_DDI_MASK_ICP, SDE_TC_HOTPLUG_ICP(PORT_TC1),
> > ICP_DDI_HPD_ENABLE_MASK, ICP_TC_HPD_ENABLE(PORT_TC1));
> > }
> >
> > @@ -3041,7 +3047,6 @@ static void mcc_hpd_irq_setup(struct drm_i915_private *dev_priv)
> > static void jsp_hpd_irq_setup(struct drm_i915_private *dev_priv)
> > {
> > icp_hpd_irq_setup(dev_priv,
> > - SDE_DDI_MASK_TGP, 0,
> > TGP_DDI_HPD_ENABLE_MASK, 0);
> > }
> >
> > @@ -3074,7 +3079,7 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
> > u32 val;
> >
> > enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> > - hotplug_irqs = GEN11_DE_TC_HOTPLUG_MASK | GEN11_DE_TBT_HOTPLUG_MASK;
> > + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.hpd);
> >
> > val = I915_READ(GEN11_DE_HPD_IMR);
> > val &= ~hotplug_irqs;
> > @@ -3085,10 +3090,10 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
> > gen11_hpd_detection_setup(dev_priv);
> >
> > if (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP)
> > - icp_hpd_irq_setup(dev_priv, SDE_DDI_MASK_TGP, SDE_TC_MASK_TGP,
> > + icp_hpd_irq_setup(dev_priv,
> > TGP_DDI_HPD_ENABLE_MASK, TGP_TC_HPD_ENABLE_MASK);
> > else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
> > - icp_hpd_irq_setup(dev_priv, SDE_DDI_MASK_ICP, SDE_TC_MASK_ICP,
> > + icp_hpd_irq_setup(dev_priv,
> > ICP_DDI_HPD_ENABLE_MASK, ICP_TC_HPD_ENABLE_MASK);
> > }
> >
> > @@ -3124,8 +3129,8 @@ static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv)
> > if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
> > I915_WRITE(SHPD_FILTER_CNT, SHPD_FILTER_CNT_500_ADJ);
> >
> > - hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
> > enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
> > + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.pch_hpd);
> >
> > ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
> >
> > @@ -3152,22 +3157,13 @@ static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv)
> > {
> > u32 hotplug_irqs, enabled_irqs;
> >
> > - if (INTEL_GEN(dev_priv) >= 8) {
> > - hotplug_irqs = GEN8_PORT_DP_A_HOTPLUG;
> > - enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> > + enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> > + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.hpd);
> >
> > + if (INTEL_GEN(dev_priv) >= 8)
> > bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
> > - } else if (INTEL_GEN(dev_priv) >= 7) {
> > - hotplug_irqs = DE_DP_A_HOTPLUG_IVB;
> > - enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> > -
> > + else
> > ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
> > - } else {
> > - hotplug_irqs = DE_DP_A_HOTPLUG;
> > - enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> > -
> > - ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
> > - }
> >
> > ilk_hpd_detection_setup(dev_priv);
> >
> > @@ -3216,7 +3212,7 @@ static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv)
> > u32 hotplug_irqs, enabled_irqs;
> >
> > enabled_irqs = intel_hpd_enabled_irqs(dev_priv, dev_priv->hotplug.hpd);
> > - hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK;
> > + hotplug_irqs = intel_hpd_hotplug_irqs(dev_priv, dev_priv->hotplug.hpd);
> >
> > bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
> >
> >
--
Ville Syrjälä
Intel
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] [PATCH 12/12] drm/i915: Nuke pointless variable
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (10 preceding siblings ...)
2020-06-30 21:56 ` [Intel-gfx] [PATCH 11/12] drm/i915: Introduce intel_hpd_hotplug_irqs() Ville Syrjala
@ 2020-06-30 21:56 ` Ville Syrjala
2020-09-08 17:00 ` [Intel-gfx] [12/12] " Souza, Jose
2020-06-30 22:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Futher hotplug cleanups Patchwork
` (2 subsequent siblings)
14 siblings, 1 reply; 32+ messages in thread
From: Ville Syrjala @ 2020-06-30 21:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
No point in assigning the function return value to a local
variable if we're just going to use it the one time.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_hotplug.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 8a8e77314a4e..938466b2c9d1 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -480,7 +480,6 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
* only the one of them (DP) will have ->hpd_pulse().
*/
for_each_intel_encoder(&dev_priv->drm, encoder) {
- bool has_hpd_pulse = intel_encoder_has_hpd_pulse(encoder);
enum port port = encoder->port;
bool long_hpd;
@@ -488,7 +487,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (!(BIT(pin) & pin_mask))
continue;
- if (!has_hpd_pulse)
+ if (!intel_encoder_has_hpd_pulse(encoder))
continue;
long_hpd = long_mask & BIT(pin);
--
2.26.2
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^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [Intel-gfx] [12/12] drm/i915: Nuke pointless variable
2020-06-30 21:56 ` [Intel-gfx] [PATCH 12/12] drm/i915: Nuke pointless variable Ville Syrjala
@ 2020-09-08 17:00 ` Souza, Jose
0 siblings, 0 replies; 32+ messages in thread
From: Souza, Jose @ 2020-09-08 17:00 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-07-01 at 00:56 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
>
> No point in assigning the function return value to a local
> variable if we're just going to use it the one time.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <
> ville.syrjala@linux.intel.com
> >
> ---
> drivers/gpu/drm/i915/display/intel_hotplug.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
> index 8a8e77314a4e..938466b2c9d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> @@ -480,7 +480,6 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
> * only the one of them (DP) will have ->hpd_pulse().
> */
> for_each_intel_encoder(&dev_priv->drm, encoder) {
> - bool has_hpd_pulse = intel_encoder_has_hpd_pulse(encoder);
> enum port port = encoder->port;
> bool long_hpd;
>
> @@ -488,7 +487,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
> if (!(BIT(pin) & pin_mask))
> continue;
>
> - if (!has_hpd_pulse)
> + if (!intel_encoder_has_hpd_pulse(encoder))
> continue;
>
> long_hpd = long_mask & BIT(pin);
>
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^ permalink raw reply [flat|nested] 32+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Futher hotplug cleanups
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (11 preceding siblings ...)
2020-06-30 21:56 ` [Intel-gfx] [PATCH 12/12] drm/i915: Nuke pointless variable Ville Syrjala
@ 2020-06-30 22:36 ` Patchwork
2020-07-01 3:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-01 6:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
14 siblings, 0 replies; 32+ messages in thread
From: Patchwork @ 2020-06-30 22:36 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Futher hotplug cleanups
URL : https://patchwork.freedesktop.org/series/78962/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_display.c:1222:22: error: Expected constant expression in case statement
+drivers/gpu/drm/i915/display/intel_display.c:1225:22: error: Expected constant expression in case statement
+drivers/gpu/drm/i915/display/intel_display.c:1228:22: error: Expected constant expression in case statement
+drivers/gpu/drm/i915/display/intel_display.c:1231:22: error: Expected constant expression in case statement
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2269:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2270:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2271:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2272:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2273:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2274:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gt/intel_lrc.c:2785:17: error: too long token expansion
+drivers/gpu/drm/i915/gt/intel_lrc.c:2785:17: error: too long token expansion
+drivers/gpu/drm/i915/gt/intel_reset.c:1310:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/sysfs_engines.c:61:10: error: bad integer constant expression
+drivers/gpu/drm/i915/gt/sysfs_engines.c:62:10: error: bad integer constant expression
+drivers/gpu/drm/i915/gt/sysfs_engines.c:66:10: error: bad integer constant expression
+drivers/gpu/drm/i915/gvt/mmio.c:287:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1425:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1479:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/intel_wakeref.c:137:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block
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^ permalink raw reply [flat|nested] 32+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher hotplug cleanups
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (12 preceding siblings ...)
2020-06-30 22:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Futher hotplug cleanups Patchwork
@ 2020-07-01 3:20 ` Patchwork
2020-07-01 6:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
14 siblings, 0 replies; 32+ messages in thread
From: Patchwork @ 2020-07-01 3:20 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Futher hotplug cleanups
URL : https://patchwork.freedesktop.org/series/78962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8679 -> Patchwork_18049
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/index.html
Known issues
------------
Here are the changes found in Patchwork_18049 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@blt:
- fi-tgl-y: [PASS][1] -> [INCOMPLETE][2] ([i915#750])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/fi-tgl-y/igt@i915_selftest@live@blt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/fi-tgl-y/igt@i915_selftest@live@blt.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/fi-tgl-y/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/fi-tgl-y/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- fi-icl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
* igt@vgem_basic@dmabuf-mmap:
- fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([i915#402]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/fi-tgl-y/igt@vgem_basic@dmabuf-mmap.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/fi-tgl-y/igt@vgem_basic@dmabuf-mmap.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2: [FAIL][9] ([i915#1888]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html
* igt@i915_module_load@reload:
- fi-tgl-y: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/fi-tgl-y/igt@i915_module_load@reload.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/fi-tgl-y/igt@i915_module_load@reload.html
* igt@i915_pm_rpm@module-reload:
- fi-glk-dsi: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/fi-glk-dsi/igt@i915_pm_rpm@module-reload.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/fi-glk-dsi/igt@i915_pm_rpm@module-reload.html
* igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling:
- fi-tgl-y: [DMESG-WARN][15] ([i915#402]) -> [PASS][16] +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/fi-tgl-y/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/fi-tgl-y/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html
#### Warnings ####
* igt@kms_flip@basic-plain-flip@a-dp1:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) -> [DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/fi-kbl-x1275/igt@kms_flip@basic-plain-flip@a-dp1.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/fi-kbl-x1275/igt@kms_flip@basic-plain-flip@a-dp1.html
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#750]: https://gitlab.freedesktop.org/drm/intel/issues/750
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (44 -> 37)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_8679 -> Patchwork_18049
CI-20190529: 20190529
CI_DRM_8679: 3e20fe558381bf798308d3a1171948676af22376 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5718: af1ef32bfae90bcdbaf1b5d84c61ff4e04368505 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18049: daa2f52f8cd4f248088025f30f7fb7503e459ceb @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
daa2f52f8cd4 drm/i915: Nuke pointless variable
a691b1214060 drm/i915: Introduce intel_hpd_hotplug_irqs()
cf21c3c5fe18 drm/i915: Introduce HPD_PORT_TC<n>
e5bfa5b8968d drm/i915: Move hpd_pin setup to encoder init
c1c0215eb376 drm/i915: Split icp_hpd_detection_setup() into ddi vs. tc parts
847c5d489df2 drm/i915: Configure GEN11_{TBT, TC}_HOTPLUG_CTL for ports TC5/6
f81ea6a7baff drm/i915: Nuke the redundant TC/TBT HPD bit defines
80cb007072a6 drm/i915: Add VBT AUX CH H and I
97778ded8f65 drm/i915: Add VBT DVO ports H and I
53cac5d8a4dd drm/i915: Add AUX_CH_{H, I} power domain handling
633b20e26ee2 drm/i915: Add PORT_{H, I} to intel_port_to_power_domain()
7a4d6f741a4e drm/i915: Add more AUX CHs to the enum
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 32+ messages in thread* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Futher hotplug cleanups
2020-06-30 21:55 [Intel-gfx] [PATCH 00/12] drm/i915: Futher hotplug cleanups Ville Syrjala
` (13 preceding siblings ...)
2020-07-01 3:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-07-01 6:53 ` Patchwork
14 siblings, 0 replies; 32+ messages in thread
From: Patchwork @ 2020-07-01 6:53 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Futher hotplug cleanups
URL : https://patchwork.freedesktop.org/series/78962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8679_full -> Patchwork_18049_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_18049_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_balancer@bonded-early:
- shard-kbl: [PASS][1] -> [FAIL][2] ([i915#2079])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-kbl4/igt@gem_exec_balancer@bonded-early.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-kbl4/igt@gem_exec_balancer@bonded-early.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [PASS][3] -> [INCOMPLETE][4] ([i915#1436] / [i915#58] / [k.org#198133])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-glk1/igt@gen9_exec_parse@allowed-single.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-glk4/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_rpm@system-suspend-execbuf:
- shard-skl: [PASS][5] -> [INCOMPLETE][6] ([i915#151] / [i915#69])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl7/igt@i915_pm_rpm@system-suspend-execbuf.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl10/igt@i915_pm_rpm@system-suspend-execbuf.html
* igt@i915_selftest@mock@requests:
- shard-skl: [PASS][7] -> [INCOMPLETE][8] ([i915#198] / [i915#2110])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl5/igt@i915_selftest@mock@requests.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl9/igt@i915_selftest@mock@requests.html
* igt@kms_addfb_basic@addfb25-modifier-no-flag:
- shard-apl: [PASS][9] -> [DMESG-WARN][10] ([i915#1635] / [i915#95]) +16 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-apl8/igt@kms_addfb_basic@addfb25-modifier-no-flag.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-apl1/igt@kms_addfb_basic@addfb25-modifier-no-flag.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-skl: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) +11 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl9/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl7/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_cursor_crc@pipe-b-cursor-64x64-random:
- shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#93] / [i915#95]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-kbl6/igt@kms_cursor_crc@pipe-b-cursor-64x64-random.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-64x64-random.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-skl: [PASS][15] -> [FAIL][16] ([i915#46])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl10/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-skl: [PASS][17] -> [FAIL][18] ([i915#79])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl10/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
- shard-tglb: [PASS][19] -> [DMESG-WARN][20] ([i915#402])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +3 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145] / [i915#265])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][25] -> [DMESG-FAIL][26] ([fdo#108145] / [i915#1982])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_prime@basic-crc@second-to-first:
- shard-kbl: [PASS][27] -> [DMESG-FAIL][28] ([i915#95])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-kbl1/igt@kms_prime@basic-crc@second-to-first.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-kbl3/igt@kms_prime@basic-crc@second-to-first.html
* igt@kms_psr@psr2_cursor_plane_move:
- shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-iclb7/igt@kms_psr@psr2_cursor_plane_move.html
* igt@kms_psr@suspend:
- shard-iclb: [PASS][31] -> [INCOMPLETE][32] ([i915#1185])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-iclb3/igt@kms_psr@suspend.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-iclb3/igt@kms_psr@suspend.html
* igt@kms_vblank@pipe-b-query-idle-hang:
- shard-apl: [PASS][33] -> [DMESG-WARN][34] ([i915#1982]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-apl3/igt@kms_vblank@pipe-b-query-idle-hang.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-apl1/igt@kms_vblank@pipe-b-query-idle-hang.html
#### Possible fixes ####
* igt@gem_exec_reloc@basic-concurrent0:
- shard-glk: [FAIL][35] ([i915#1930]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-glk8/igt@gem_exec_reloc@basic-concurrent0.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-glk7/igt@gem_exec_reloc@basic-concurrent0.html
* igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
- shard-snb: [TIMEOUT][37] ([i915#1958]) -> [PASS][38] +3 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-snb2/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-snb5/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html
* igt@gen9_exec_parse@allowed-all:
- shard-apl: [DMESG-WARN][39] ([i915#1436] / [i915#716]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-apl1/igt@gen9_exec_parse@allowed-all.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-apl2/igt@gen9_exec_parse@allowed-all.html
* igt@i915_module_load@reload:
- shard-tglb: [DMESG-WARN][41] ([i915#402]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-tglb8/igt@i915_module_load@reload.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-tglb8/igt@i915_module_load@reload.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [DMESG-WARN][43] ([i915#359]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][45] ([i915#79]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-skl: [FAIL][47] ([i915#79]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: [DMESG-WARN][49] ([i915#180]) -> [PASS][50] +7 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@flip-vs-suspend@b-edp1:
- shard-skl: [INCOMPLETE][51] ([i915#198]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl6/igt@kms_flip@flip-vs-suspend@b-edp1.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl4/igt@kms_flip@flip-vs-suspend@b-edp1.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack:
- shard-iclb: [DMESG-WARN][53] ([i915#1982]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html
* igt@kms_frontbuffer_tracking@psr-farfromfence:
- shard-tglb: [DMESG-WARN][55] ([i915#1982]) -> [PASS][56] +4 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-tglb7/igt@kms_frontbuffer_tracking@psr-farfromfence.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-tglb1/igt@kms_frontbuffer_tracking@psr-farfromfence.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][57] ([fdo#109642] / [fdo#111068]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-iclb6/igt@kms_psr2_su@frontbuffer.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][59] ([fdo#109441]) -> [PASS][60] +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-iclb6/igt@kms_psr@psr2_primary_mmap_cpu.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_vblank@pipe-b-query-idle:
- shard-skl: [DMESG-WARN][61] ([i915#1982]) -> [PASS][62] +10 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-skl10/igt@kms_vblank@pipe-b-query-idle.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-skl3/igt@kms_vblank@pipe-b-query-idle.html
* igt@perf@blocking:
- shard-glk: [DMESG-WARN][63] ([i915#118] / [i915#95]) -> [PASS][64] +1 similar issue
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-glk9/igt@perf@blocking.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-glk4/igt@perf@blocking.html
* igt@perf@invalid-oa-metric-set-id:
- shard-apl: [DMESG-WARN][65] ([i915#1635] / [i915#95]) -> [PASS][66] +13 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-apl3/igt@perf@invalid-oa-metric-set-id.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-apl4/igt@perf@invalid-oa-metric-set-id.html
#### Warnings ####
* igt@gem_exec_reloc@basic-concurrent16:
- shard-snb: [TIMEOUT][67] ([i915#1958]) -> [FAIL][68] ([i915#1930])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-snb2/igt@gem_exec_reloc@basic-concurrent16.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-snb5/igt@gem_exec_reloc@basic-concurrent16.html
* igt@gem_exec_reloc@basic-spin-others@vcs0:
- shard-snb: [WARN][69] ([i915#2036]) -> [WARN][70] ([i915#2021])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-snb1/igt@gem_exec_reloc@basic-spin-others@vcs0.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-snb6/igt@gem_exec_reloc@basic-spin-others@vcs0.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][71] ([i915#658]) -> [SKIP][72] ([i915#588])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-iclb6/igt@i915_pm_dc@dc3co-vpb-simulation.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@kms_color_chamelium@pipe-b-ctm-0-75:
- shard-apl: [SKIP][73] ([fdo#109271] / [fdo#111827]) -> [SKIP][74] ([fdo#109271] / [fdo#111827] / [i915#1635]) +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-apl8/igt@kms_color_chamelium@pipe-b-ctm-0-75.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-apl4/igt@kms_color_chamelium@pipe-b-ctm-0-75.html
* igt@kms_content_protection@atomic:
- shard-kbl: [TIMEOUT][75] ([i915#1319] / [i915#1958]) -> [TIMEOUT][76] ([i915#1319] / [i915#1958] / [i915#2119]) +4 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-kbl1/igt@kms_content_protection@atomic.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-kbl1/igt@kms_content_protection@atomic.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled:
- shard-snb: [TIMEOUT][77] ([i915#1958]) -> [SKIP][78] ([fdo#109271]) +1 similar issue
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-snb2/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-snb5/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-move:
- shard-apl: [SKIP][79] ([fdo#109271] / [i915#1635]) -> [SKIP][80] ([fdo#109271]) +6 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-apl4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-move.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-apl8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-render:
- shard-apl: [SKIP][81] ([fdo#109271]) -> [SKIP][82] ([fdo#109271] / [i915#1635]) +4 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-apl1/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-apl2/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant:
- shard-kbl: [DMESG-FAIL][83] ([fdo#108145] / [i915#1982] / [i915#95]) -> [DMESG-FAIL][84] ([fdo#108145] / [i915#95])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-kbl3/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-kbl3/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html
* igt@runner@aborted:
- shard-apl: ([FAIL][85], [FAIL][86]) ([fdo#109271] / [i915#1610] / [i915#1635] / [i915#716]) -> [FAIL][87] ([i915#1635])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-apl7/igt@runner@aborted.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-apl1/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-apl7/igt@runner@aborted.html
- shard-tglb: ([FAIL][88], [FAIL][89]) ([i915#1764] / [i915#2110]) -> [FAIL][90] ([i915#2110])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-tglb3/igt@runner@aborted.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8679/shard-tglb1/igt@runner@aborted.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/shard-tglb6/igt@runner@aborted.html
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1185]: https://gitlab.freedesktop.org/drm/intel/issues/1185
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#1764]: https://gitlab.freedesktop.org/drm/intel/issues/1764
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1930]: https://gitlab.freedesktop.org/drm/intel/issues/1930
[i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2021]: https://gitlab.freedesktop.org/drm/intel/issues/2021
[i915#2036]: https://gitlab.freedesktop.org/drm/intel/issues/2036
[i915#2079]: https://gitlab.freedesktop.org/drm/intel/issues/2079
[i915#2110]: https://gitlab.freedesktop.org/drm/intel/issues/2110
[i915#2119]: https://gitlab.freedesktop.org/drm/intel/issues/2119
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#359]: https://gitlab.freedesktop.org/drm/intel/issues/359
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#46]: https://gitlab.freedesktop.org/drm/intel/issues/46
[i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
[i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_8679 -> Patchwork_18049
CI-20190529: 20190529
CI_DRM_8679: 3e20fe558381bf798308d3a1171948676af22376 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5718: af1ef32bfae90bcdbaf1b5d84c61ff4e04368505 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18049: daa2f52f8cd4f248088025f30f7fb7503e459ceb @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18049/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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