* [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel
@ 2020-07-06 8:06 Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 1/5] net: ti: am65-cpsw-nuss: Remove dead code Vignesh Raghavendra
` (6 more replies)
0 siblings, 7 replies; 11+ messages in thread
From: Vignesh Raghavendra @ 2020-07-06 8:06 UTC (permalink / raw)
To: u-boot
Make necessary driver changes to sync DT nodes from kernel.
Depends on [1]
Due to the dependencies, I would like this entire series to be merged via TI
tree.
Tested on AM654 and J721e boards
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=186589
Vignesh Raghavendra (5):
net: ti: am65-cpsw-nuss: Remove dead code
net: ti: am65-cpsw-nuss: Set ALE default thread enable
net: ti: am65-cpsw-nuss: Update driver to use kernel DT
arm: dts: k3-j721e: Sync CPSW DT node from kernel
arm: dts: k3-am65: Sync CPSW DT node from kernel
arch/arm/dts/k3-am65-mcu.dtsi | 84 +++++++++++++++++++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 54 +-----------
.../k3-j721e-common-proc-board-u-boot.dtsi | 74 +---------------
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 74 ++++++++++++++++
drivers/net/ti/am65-cpsw-nuss.c | 15 ++--
5 files changed, 167 insertions(+), 134 deletions(-)
--
2.27.0
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 1/5] net: ti: am65-cpsw-nuss: Remove dead code
2020-07-06 8:06 [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel Vignesh Raghavendra
@ 2020-07-06 8:06 ` Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 2/5] net: ti: am65-cpsw-nuss: Set ALE default thread enable Vignesh Raghavendra
` (5 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Vignesh Raghavendra @ 2020-07-06 8:06 UTC (permalink / raw)
To: u-boot
MDIO node is not referenced further, therefore drop the dead code.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
drivers/net/ti/am65-cpsw-nuss.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 85f3e49c05..e8fe875e70 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -746,13 +746,6 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
goto out;
}
- node = dev_read_subnode(dev, "mdio");
- if (!ofnode_valid(node)) {
- dev_err(dev, "can't find mdio\n");
- ret = -ENOENT;
- goto out;
- }
-
cpsw_common->bus_freq =
dev_read_u32_default(dev, "bus_freq",
AM65_CPSW_MDIO_BUS_FREQ_DEF);
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/5] net: ti: am65-cpsw-nuss: Set ALE default thread enable
2020-07-06 8:06 [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 1/5] net: ti: am65-cpsw-nuss: Remove dead code Vignesh Raghavendra
@ 2020-07-06 8:06 ` Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 3/5] net: ti: am65-cpsw-nuss: Update driver to use kernel DT Vignesh Raghavendra
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Vignesh Raghavendra @ 2020-07-06 8:06 UTC (permalink / raw)
To: u-boot
Force default thread to be used for RX as ALE is anyways set to Bypass
mode.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
drivers/net/ti/am65-cpsw-nuss.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index e8fe875e70..753a117300 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -61,6 +61,9 @@
#define AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD 0x3
#define AM65_CPSW_ALE_PN_CTL_REG_MAC_ONLY BIT(11)
+#define AM65_CPSW_ALE_THREADMAPDEF_REG 0x134
+#define AM65_CPSW_ALE_DEFTHREAD_EN BIT(15)
+
#define AM65_CPSW_MACSL_CTL_REG 0x0
#define AM65_CPSW_MACSL_CTL_REG_IFCTL_A BIT(15)
#define AM65_CPSW_MACSL_CTL_EXT_EN BIT(18)
@@ -364,6 +367,9 @@ static int am65_cpsw_start(struct udevice *dev)
writel(AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD,
common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(0));
+ writel(AM65_CPSW_ALE_DEFTHREAD_EN,
+ common->ale_base + AM65_CPSW_ALE_THREADMAPDEF_REG);
+
/* PORT x configuration */
/* Port x Max length register */
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/5] net: ti: am65-cpsw-nuss: Update driver to use kernel DT
2020-07-06 8:06 [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 1/5] net: ti: am65-cpsw-nuss: Remove dead code Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 2/5] net: ti: am65-cpsw-nuss: Set ALE default thread enable Vignesh Raghavendra
@ 2020-07-06 8:06 ` Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 4/5] arm: dts: k3-j721e: Sync CPSW DT node from kernel Vignesh Raghavendra
` (3 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Vignesh Raghavendra @ 2020-07-06 8:06 UTC (permalink / raw)
To: u-boot
Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver
to look for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
drivers/net/ti/am65-cpsw-nuss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 753a117300..971bdcdfda 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -686,7 +686,7 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
AM65_CPSW_CPSW_NU_ALE_BASE;
cpsw_common->mdio_base = cpsw_common->ss_base + AM65_CPSW_MDIO_BASE;
- ports_np = dev_read_subnode(dev, "ports");
+ ports_np = dev_read_subnode(dev, "ethernet-ports");
if (!ofnode_valid(ports_np)) {
ret = -ENOENT;
goto out;
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/5] arm: dts: k3-j721e: Sync CPSW DT node from kernel
2020-07-06 8:06 [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel Vignesh Raghavendra
` (2 preceding siblings ...)
2020-07-06 8:06 ` [PATCH 3/5] net: ti: am65-cpsw-nuss: Update driver to use kernel DT Vignesh Raghavendra
@ 2020-07-06 8:06 ` Vignesh Raghavendra
2020-07-07 13:49 ` Grygorii Strashko
2020-07-06 8:06 ` [PATCH 5/5] arm: dts: k3-am65: " Vignesh Raghavendra
` (2 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Vignesh Raghavendra @ 2020-07-06 8:06 UTC (permalink / raw)
To: u-boot
Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
.../k3-j721e-common-proc-board-u-boot.dtsi | 74 +------------------
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 74 +++++++++++++++++++
2 files changed, 75 insertions(+), 73 deletions(-)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 6273133303..6e748bfebb 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -31,20 +31,6 @@
u-boot,dm-spl;
};
- mcu_conf: scm_conf at 40f00000 {
- compatible = "syscon", "simple-mfd";
- reg = <0x0 0x40f00000 0x0 0x20000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x40f00000 0x20000>;
-
- phy_sel: cpsw-phy-sel at 4040 {
- compatible = "ti,am654-cpsw-phy-sel";
- reg = <0x4040 0x4>;
- reg-names = "gmii-sel";
- };
- };
-
mcu_navss {
u-boot,dm-spl;
@@ -56,65 +42,6 @@
u-boot,dm-spl;
};
};
-
- mcu_cpsw: ethernet at 046000000 {
- compatible = "ti,j721e-cpsw-nuss";
- #address-cells = <2>;
- #size-cells = <2>;
- reg = <0x0 0x46000000 0x0 0x200000>;
- reg-names = "cpsw_nuss";
- ranges;
- dma-coherent;
- clocks = <&k3_clks 18 22>;
- clock-names = "fck";
- power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
- cpsw-phy-sel = <&phy_sel>;
-
- dmas = <&mcu_udmap 0xf000>,
- <&mcu_udmap 0xf001>,
- <&mcu_udmap 0xf002>,
- <&mcu_udmap 0xf003>,
- <&mcu_udmap 0xf004>,
- <&mcu_udmap 0xf005>,
- <&mcu_udmap 0xf006>,
- <&mcu_udmap 0xf007>,
- <&mcu_udmap 0x7000>;
- dma-names = "tx0", "tx1", "tx2", "tx3",
- "tx4", "tx5", "tx6", "tx7",
- "rx";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- host: host at 0 {
- reg = <0>;
- ti,label = "host";
- };
-
- cpsw_port1: port at 1 {
- reg = <1>;
- ti,mac-only;
- ti,label = "port1";
- ti,syscon-efuse = <&mcu_conf 0x200>;
- };
- };
-
- davinci_mdio: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- bus_freq = <1000000>;
- };
-
- cpts {
- clocks = <&k3_clks 18 2>;
- clock-names = "cpts";
- interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "cpts";
- ti,cpts-ext-ts-inputs = <4>;
- ti,cpts-periodic-outputs = <2>;
- };
- };
};
&secure_proxy_main {
@@ -224,6 +151,7 @@
reg = <0x0 0x46000000 0x0 0x200000>,
<0x0 0x40f00200 0x0 0x2>;
reg-names = "cpsw_nuss", "mac_efuse";
+ /delete-property/ ranges;
cpsw-phy-sel at 40f04040 {
compatible = "ti,am654-cpsw-phy-sel";
diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
index 70d5bcaa72..e6c99ab698 100644
--- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
@@ -35,6 +35,20 @@
};
};
+ mcu_conf: syscon at 40f00000 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x40f00000 0x0 0x20000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x40f00000 0x20000>;
+
+ phy_gmii_sel: phy at 4040 {
+ compatible = "ti,am654-phy-gmii-sel";
+ reg = <0x4040 0x4>;
+ #phy-cells = <1>;
+ };
+ };
+
wkup_pmx0: pinmux at 4301c000 {
compatible = "pinctrl-single";
/* Proxy 0 addressing */
@@ -242,4 +256,64 @@
ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
};
};
+
+ mcu_cpsw: ethernet at 46000000 {
+ compatible = "ti,j721e-cpsw-nuss";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0x0 0x46000000 0x0 0x200000>;
+ reg-names = "cpsw_nuss";
+ ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
+ dma-coherent;
+ clocks = <&k3_clks 18 22>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
+
+ dmas = <&mcu_udmap 0xf000>,
+ <&mcu_udmap 0xf001>,
+ <&mcu_udmap 0xf002>,
+ <&mcu_udmap 0xf003>,
+ <&mcu_udmap 0xf004>,
+ <&mcu_udmap 0xf005>,
+ <&mcu_udmap 0xf006>,
+ <&mcu_udmap 0xf007>,
+ <&mcu_udmap 0x7000>;
+ dma-names = "tx0", "tx1", "tx2", "tx3",
+ "tx4", "tx5", "tx6", "tx7",
+ "rx";
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpsw_port1: port at 1 {
+ reg = <1>;
+ ti,mac-only;
+ label = "port1";
+ ti,syscon-efuse = <&mcu_conf 0x200>;
+ phys = <&phy_gmii_sel 1>;
+ };
+ };
+
+ davinci_mdio: mdio at f00 {
+ compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+ reg = <0x0 0xf00 0x0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&k3_clks 18 22>;
+ clock-names = "fck";
+ bus_freq = <1000000>;
+ };
+
+ cpts at 3d000 {
+ compatible = "ti,am65-cpts";
+ reg = <0x0 0x3d000 0x0 0x400>;
+ clocks = <&k3_clks 18 2>;
+ clock-names = "cpts";
+ interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cpts";
+ ti,cpts-ext-ts-inputs = <4>;
+ ti,cpts-periodic-outputs = <2>;
+ };
+ };
};
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 5/5] arm: dts: k3-am65: Sync CPSW DT node from kernel
2020-07-06 8:06 [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel Vignesh Raghavendra
` (3 preceding siblings ...)
2020-07-06 8:06 ` [PATCH 4/5] arm: dts: k3-j721e: Sync CPSW DT node from kernel Vignesh Raghavendra
@ 2020-07-06 8:06 ` Vignesh Raghavendra
2020-07-07 13:50 ` [PATCH 0/5] TI: AM654/J721e: " Grygorii Strashko
2020-07-14 5:41 ` Lokesh Vutla
6 siblings, 0 replies; 11+ messages in thread
From: Vignesh Raghavendra @ 2020-07-06 8:06 UTC (permalink / raw)
To: u-boot
Sync CPSW DT node from kernel and move it out of -u-boot.dtsi file.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
arch/arm/dts/k3-am65-mcu.dtsi | 84 ++++++++++++++++++++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 54 +------------
2 files changed, 85 insertions(+), 53 deletions(-)
diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi
index d1a9fb5de6..1355685839 100644
--- a/arch/arm/dts/k3-am65-mcu.dtsi
+++ b/arch/arm/dts/k3-am65-mcu.dtsi
@@ -6,6 +6,20 @@
*/
&cbass_mcu {
+ mcu_conf: scm_conf at 40f00000 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x40f00000 0x0 0x20000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x40f00000 0x20000>;
+
+ phy_gmii_sel: phy at 4040 {
+ compatible = "ti,am654-phy-gmii-sel";
+ reg = <0x4040 0x4>;
+ #phy-cells = <1>;
+ };
+ };
+
mcu_uart0: serial at 40a00000 {
compatible = "ti,am654-uart";
reg = <0x00 0x40a00000 0x00 0x100>;
@@ -146,4 +160,74 @@
ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
};
};
+
+ mcu_cpsw: ethernet at 46000000 {
+ compatible = "ti,am654-cpsw-nuss";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0x0 0x46000000 0x0 0x200000>;
+ reg-names = "cpsw_nuss";
+ ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
+ dma-coherent;
+ clocks = <&k3_clks 5 10>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
+
+ dmas = <&mcu_udmap 0xf000>,
+ <&mcu_udmap 0xf001>,
+ <&mcu_udmap 0xf002>,
+ <&mcu_udmap 0xf003>,
+ <&mcu_udmap 0xf004>,
+ <&mcu_udmap 0xf005>,
+ <&mcu_udmap 0xf006>,
+ <&mcu_udmap 0xf007>,
+ <&mcu_udmap 0x7000>;
+ dma-names = "tx0", "tx1", "tx2", "tx3",
+ "tx4", "tx5", "tx6", "tx7",
+ "rx";
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpsw_port1: port at 1 {
+ reg = <1>;
+ ti,mac-only;
+ label = "port1";
+ ti,syscon-efuse = <&mcu_conf 0x200>;
+ phys = <&phy_gmii_sel 1>;
+ };
+ };
+
+ davinci_mdio: mdio at f00 {
+ compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+ reg = <0x0 0xf00 0x0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&k3_clks 5 10>;
+ clock-names = "fck";
+ bus_freq = <1000000>;
+ };
+
+ cpts at 3d000 {
+ compatible = "ti,am65-cpts";
+ reg = <0x0 0x3d000 0x0 0x400>;
+ clocks = <&mcu_cpsw_cpts_mux>;
+ clock-names = "cpts";
+ interrupts-extended = <&gic500 GIC_SPI 570 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cpts";
+ ti,cpts-ext-ts-inputs = <4>;
+ ti,cpts-periodic-outputs = <2>;
+
+ mcu_cpsw_cpts_mux: refclk-mux {
+ #clock-cells = <0>;
+ clocks = <&k3_clks 118 5>, <&k3_clks 118 11>,
+ <&k3_clks 118 6>, <&k3_clks 118 3>,
+ <&k3_clks 118 8>, <&k3_clks 118 14>,
+ <&k3_clks 120 3>, <&k3_clks 121 3>;
+ assigned-clocks = <&mcu_cpsw_cpts_mux>;
+ assigned-clock-parents = <&k3_clks 118 5>;
+ };
+ };
+ };
};
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 1a40fa12b7..d9ff3ed47b 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -57,59 +57,6 @@
u-boot,dm-spl;
};
};
-
- mcu_conf: scm_conf at 40f00000 {
- compatible = "syscon";
- reg = <0x0 0x40f00000 0x0 0x20000>;
- };
-
- mcu_cpsw: cpsw_nuss at 046000000 {
- compatible = "ti,am654-cpsw-nuss";
- #address-cells = <2>;
- #size-cells = <2>;
- reg = <0x0 0x46000000 0x0 0x200000>;
- reg-names = "cpsw_nuss";
- ranges;
- dma-coherent;
- clocks = <&k3_clks 5 10>;
- clock-names = "fck";
- power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
-
- dmas = <&mcu_udmap 0xf000>,
- <&mcu_udmap 0xf001>,
- <&mcu_udmap 0xf002>,
- <&mcu_udmap 0xf003>,
- <&mcu_udmap 0xf004>,
- <&mcu_udmap 0xf005>,
- <&mcu_udmap 0xf006>,
- <&mcu_udmap 0xf007>,
- <&mcu_udmap 0x7000>;
- dma-names = "tx0", "tx1", "tx2", "tx3",
- "tx4", "tx5", "tx6", "tx7",
- "rx";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- host: host at 0 {
- reg = <0>;
- ti,label = "host";
- };
-
- cpsw_port1: port at 1 {
- reg = <1>;
- ti,mac-only;
- ti,label = "port1";
- ti,syscon-efuse = <&mcu_conf 0x200>;
- };
- };
-
- davinci_mdio: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- bus_freq = <1000000>;
- };
- };
};
&cbass_wakeup {
@@ -271,6 +218,7 @@
reg = <0x0 0x46000000 0x0 0x200000>,
<0x0 0x40f00200 0x0 0x2>;
reg-names = "cpsw_nuss", "mac_efuse";
+ /delete-property/ ranges;
cpsw-phy-sel at 40f04040 {
compatible = "ti,am654-cpsw-phy-sel";
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/5] arm: dts: k3-j721e: Sync CPSW DT node from kernel
2020-07-06 8:06 ` [PATCH 4/5] arm: dts: k3-j721e: Sync CPSW DT node from kernel Vignesh Raghavendra
@ 2020-07-07 13:49 ` Grygorii Strashko
2020-07-07 14:15 ` Vignesh Raghavendra
0 siblings, 1 reply; 11+ messages in thread
From: Grygorii Strashko @ 2020-07-07 13:49 UTC (permalink / raw)
To: u-boot
On 06/07/2020 11:06, Vignesh Raghavendra wrote:
> Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
>
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
> .../k3-j721e-common-proc-board-u-boot.dtsi | 74 +------------------
> arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 74 +++++++++++++++++++
> 2 files changed, 75 insertions(+), 73 deletions(-)
>
> diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> index 6273133303..6e748bfebb 100644
> --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> @@ -31,20 +31,6 @@
> u-boot,dm-spl;
> };
>
> - mcu_conf: scm_conf at 40f00000 {
> - compatible = "syscon", "simple-mfd";
> - reg = <0x0 0x40f00000 0x0 0x20000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0x0 0x0 0x40f00000 0x20000>;
> -
> - phy_sel: cpsw-phy-sel at 4040 {
> - compatible = "ti,am654-cpsw-phy-sel";
> - reg = <0x4040 0x4>;
> - reg-names = "gmii-sel";
> - };
> - };
> -
> mcu_navss {
> u-boot,dm-spl;
>
> @@ -56,65 +42,6 @@
> u-boot,dm-spl;
> };
> };
> -
> - mcu_cpsw: ethernet at 046000000 {
> - compatible = "ti,j721e-cpsw-nuss";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - reg = <0x0 0x46000000 0x0 0x200000>;
> - reg-names = "cpsw_nuss";
> - ranges;
> - dma-coherent;
> - clocks = <&k3_clks 18 22>;
> - clock-names = "fck";
> - power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
> - cpsw-phy-sel = <&phy_sel>;
> -
> - dmas = <&mcu_udmap 0xf000>,
> - <&mcu_udmap 0xf001>,
> - <&mcu_udmap 0xf002>,
> - <&mcu_udmap 0xf003>,
> - <&mcu_udmap 0xf004>,
> - <&mcu_udmap 0xf005>,
> - <&mcu_udmap 0xf006>,
> - <&mcu_udmap 0xf007>,
> - <&mcu_udmap 0x7000>;
> - dma-names = "tx0", "tx1", "tx2", "tx3",
> - "tx4", "tx5", "tx6", "tx7",
> - "rx";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - host: host at 0 {
> - reg = <0>;
> - ti,label = "host";
> - };
> -
> - cpsw_port1: port at 1 {
> - reg = <1>;
> - ti,mac-only;
> - ti,label = "port1";
> - ti,syscon-efuse = <&mcu_conf 0x200>;
> - };
> - };
> -
> - davinci_mdio: mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - bus_freq = <1000000>;
> - };
> -
> - cpts {
> - clocks = <&k3_clks 18 2>;
> - clock-names = "cpts";
> - interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "cpts";
> - ti,cpts-ext-ts-inputs = <4>;
> - ti,cpts-periodic-outputs = <2>;
> - };
> - };
> };
>
> &secure_proxy_main {
> @@ -224,6 +151,7 @@
> reg = <0x0 0x46000000 0x0 0x200000>,
> <0x0 0x40f00200 0x0 0x2>;
> reg-names = "cpsw_nuss", "mac_efuse";
> + /delete-property/ ranges;
>
> cpsw-phy-sel at 40f04040 {
> compatible = "ti,am654-cpsw-phy-sel";
> diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
> index 70d5bcaa72..e6c99ab698 100644
> --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
> +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
> @@ -35,6 +35,20 @@
> };
> };
>
> + mcu_conf: syscon at 40f00000 {
> + compatible = "syscon", "simple-mfd";
> + reg = <0x0 0x40f00000 0x0 0x20000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x40f00000 0x20000>;
> +
> + phy_gmii_sel: phy at 4040 {
> + compatible = "ti,am654-phy-gmii-sel";
> + reg = <0x4040 0x4>;
> + #phy-cells = <1>;
> + };
> + };
> +
> wkup_pmx0: pinmux at 4301c000 {
> compatible = "pinctrl-single";
> /* Proxy 0 addressing */
> @@ -242,4 +256,64 @@
> ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
> };
> };
> +
> + mcu_cpsw: ethernet at 46000000 {
> + compatible = "ti,j721e-cpsw-nuss";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + reg = <0x0 0x46000000 0x0 0x200000>;
> + reg-names = "cpsw_nuss";
> + ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
> + dma-coherent;
> + clocks = <&k3_clks 18 22>;
> + clock-names = "fck";
> + power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
> +
> + dmas = <&mcu_udmap 0xf000>,
> + <&mcu_udmap 0xf001>,
> + <&mcu_udmap 0xf002>,
> + <&mcu_udmap 0xf003>,
> + <&mcu_udmap 0xf004>,
> + <&mcu_udmap 0xf005>,
> + <&mcu_udmap 0xf006>,
> + <&mcu_udmap 0xf007>,
> + <&mcu_udmap 0x7000>;
> + dma-names = "tx0", "tx1", "tx2", "tx3",
> + "tx4", "tx5", "tx6", "tx7",
> + "rx";
> +
> + ethernet-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpsw_port1: port at 1 {
> + reg = <1>;
> + ti,mac-only;
> + label = "port1";
> + ti,syscon-efuse = <&mcu_conf 0x200>;
> + phys = <&phy_gmii_sel 1>;
> + };
> + };
> +
> + davinci_mdio: mdio at f00 {
> + compatible = "ti,cpsw-mdio","ti,davinci_mdio";
> + reg = <0x0 0xf00 0x0 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&k3_clks 18 22>;
> + clock-names = "fck";
> + bus_freq = <1000000>;
> + };
> +
> + cpts at 3d000 {
> + compatible = "ti,am65-cpts";
> + reg = <0x0 0x3d000 0x0 0x400>;
> + clocks = <&k3_clks 18 2>;
> + clock-names = "cpts";
> + interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "cpts";
> + ti,cpts-ext-ts-inputs = <4>;
> + ti,cpts-periodic-outputs = <2>;
> + };
Can we drop cpts part while here - it is not used by u-boot?
> + };
> };
>
--
Best regards,
grygorii
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel
2020-07-06 8:06 [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel Vignesh Raghavendra
` (4 preceding siblings ...)
2020-07-06 8:06 ` [PATCH 5/5] arm: dts: k3-am65: " Vignesh Raghavendra
@ 2020-07-07 13:50 ` Grygorii Strashko
2020-07-14 5:41 ` Lokesh Vutla
6 siblings, 0 replies; 11+ messages in thread
From: Grygorii Strashko @ 2020-07-07 13:50 UTC (permalink / raw)
To: u-boot
On 06/07/2020 11:06, Vignesh Raghavendra wrote:
> Make necessary driver changes to sync DT nodes from kernel.
> Depends on [1]
>
> Due to the dependencies, I would like this entire series to be merged via TI
> tree.
>
> Tested on AM654 and J721e boards
>
> [1] https://patchwork.ozlabs.org/project/uboot/list/?series=186589
>
>
> Vignesh Raghavendra (5):
> net: ti: am65-cpsw-nuss: Remove dead code
> net: ti: am65-cpsw-nuss: Set ALE default thread enable
> net: ti: am65-cpsw-nuss: Update driver to use kernel DT
> arm: dts: k3-j721e: Sync CPSW DT node from kernel
> arm: dts: k3-am65: Sync CPSW DT node from kernel
>
> arch/arm/dts/k3-am65-mcu.dtsi | 84 +++++++++++++++++++
> arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 54 +-----------
> .../k3-j721e-common-proc-board-u-boot.dtsi | 74 +---------------
> arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 74 ++++++++++++++++
> drivers/net/ti/am65-cpsw-nuss.c | 15 ++--
> 5 files changed, 167 insertions(+), 134 deletions(-)
>
Thank you - minor coment.
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
--
Best regards,
grygorii
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 4/5] arm: dts: k3-j721e: Sync CPSW DT node from kernel
2020-07-07 13:49 ` Grygorii Strashko
@ 2020-07-07 14:15 ` Vignesh Raghavendra
2020-07-08 7:55 ` Lokesh Vutla
0 siblings, 1 reply; 11+ messages in thread
From: Vignesh Raghavendra @ 2020-07-07 14:15 UTC (permalink / raw)
To: u-boot
On 07/07/20 7:19 pm, Grygorii Strashko wrote:
>
>
> On 06/07/2020 11:06, Vignesh Raghavendra wrote:
>> Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>> ---
>> ? .../k3-j721e-common-proc-board-u-boot.dtsi??? | 74 +------------------
>> ? arch/arm/dts/k3-j721e-mcu-wakeup.dtsi???????? | 74 +++++++++++++++++++
>> ? 2 files changed, 75 insertions(+), 73 deletions(-)
>>
>> diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
>> b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
>> index 6273133303..6e748bfebb 100644
>> --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
>> +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
>> @@ -31,20 +31,6 @@
>> ????????? u-boot,dm-spl;
>> ????? };
>> ? -??? mcu_conf: scm_conf at 40f00000 {
>> -??????? compatible = "syscon", "simple-mfd";
>> -??????? reg = <0x0 0x40f00000 0x0 0x20000>;
>> -??????? #address-cells = <1>;
>> -??????? #size-cells = <1>;
>> -??????? ranges = <0x0 0x0 0x40f00000 0x20000>;
>> -
>> -??????? phy_sel: cpsw-phy-sel at 4040 {
>> -??????????? compatible = "ti,am654-cpsw-phy-sel";
>> -??????????? reg = <0x4040 0x4>;
>> -??????????? reg-names = "gmii-sel";
>> -??????? };
>> -??? };
>> -
>> ????? mcu_navss {
>> ????????? u-boot,dm-spl;
>> ? @@ -56,65 +42,6 @@
>> ????????????? u-boot,dm-spl;
>> ????????? };
>> ????? };
>> -
>> -??? mcu_cpsw: ethernet at 046000000 {
>> -??????? compatible = "ti,j721e-cpsw-nuss";
>> -??????? #address-cells = <2>;
>> -??????? #size-cells = <2>;
>> -??????? reg = <0x0 0x46000000 0x0 0x200000>;
>> -??????? reg-names = "cpsw_nuss";
>> -??????? ranges;
>> -??????? dma-coherent;
>> -??????? clocks = <&k3_clks 18 22>;
>> -??????? clock-names = "fck";
>> -??????? power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
>> -??????? cpsw-phy-sel = <&phy_sel>;
>> -
>> -??????? dmas = <&mcu_udmap 0xf000>,
>> -?????????????? <&mcu_udmap 0xf001>,
>> -?????????????? <&mcu_udmap 0xf002>,
>> -?????????????? <&mcu_udmap 0xf003>,
>> -?????????????? <&mcu_udmap 0xf004>,
>> -?????????????? <&mcu_udmap 0xf005>,
>> -?????????????? <&mcu_udmap 0xf006>,
>> -?????????????? <&mcu_udmap 0xf007>,
>> -?????????????? <&mcu_udmap 0x7000>;
>> -??????? dma-names = "tx0", "tx1", "tx2", "tx3",
>> -??????????????? "tx4", "tx5", "tx6", "tx7",
>> -??????????????? "rx";
>> -
>> -??????? ports {
>> -??????????? #address-cells = <1>;
>> -??????????? #size-cells = <0>;
>> -
>> -??????????? host: host at 0 {
>> -??????????????? reg = <0>;
>> -??????????????? ti,label = "host";
>> -??????????? };
>> -
>> -??????????? cpsw_port1: port at 1 {
>> -??????????????? reg = <1>;
>> -??????????????? ti,mac-only;
>> -??????????????? ti,label = "port1";
>> -??????????????? ti,syscon-efuse = <&mcu_conf 0x200>;
>> -??????????? };
>> -??????? };
>> -
>> -??????? davinci_mdio: mdio {
>> -??????????? #address-cells = <1>;
>> -??????????? #size-cells = <0>;
>> -??????????? bus_freq = <1000000>;
>> -??????? };
>> -
>> -??????? cpts {
>> -??????????? clocks = <&k3_clks 18 2>;
>> -??????????? clock-names = "cpts";
>> -??????????? interrupts-extended = <&gic500 GIC_SPI 858
>> IRQ_TYPE_LEVEL_HIGH>;
>> -??????????? interrupt-names = "cpts";
>> -??????????? ti,cpts-ext-ts-inputs = <4>;
>> -??????????? ti,cpts-periodic-outputs = <2>;
>> -??????? };
>> -??? };
>> ? };
>> ? ? &secure_proxy_main {
>> @@ -224,6 +151,7 @@
>> ????? reg = <0x0 0x46000000 0x0 0x200000>,
>> ??????????? <0x0 0x40f00200 0x0 0x2>;
>> ????? reg-names = "cpsw_nuss", "mac_efuse";
>> +??? /delete-property/ ranges;
>> ? ????? cpsw-phy-sel at 40f04040 {
>> ????????? compatible = "ti,am654-cpsw-phy-sel";
>> diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
>> b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
>> index 70d5bcaa72..e6c99ab698 100644
>> --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
>> +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
>> @@ -35,6 +35,20 @@
>> ????????? };
>> ????? };
>> ? +??? mcu_conf: syscon at 40f00000 {
>> +??????? compatible = "syscon", "simple-mfd";
>> +??????? reg = <0x0 0x40f00000 0x0 0x20000>;
>> +??????? #address-cells = <1>;
>> +??????? #size-cells = <1>;
>> +??????? ranges = <0x0 0x0 0x40f00000 0x20000>;
>> +
>> +??????? phy_gmii_sel: phy at 4040 {
>> +??????????? compatible = "ti,am654-phy-gmii-sel";
>> +??????????? reg = <0x4040 0x4>;
>> +??????????? #phy-cells = <1>;
>> +??????? };
>> +??? };
>> +
>> ????? wkup_pmx0: pinmux at 4301c000 {
>> ????????? compatible = "pinctrl-single";
>> ????????? /* Proxy 0 addressing */
>> @@ -242,4 +256,64 @@
>> ????????????? ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
>> ????????? };
>> ????? };
>> +
>> +??? mcu_cpsw: ethernet at 46000000 {
>> +??????? compatible = "ti,j721e-cpsw-nuss";
>> +??????? #address-cells = <2>;
>> +??????? #size-cells = <2>;
>> +??????? reg = <0x0 0x46000000 0x0 0x200000>;
>> +??????? reg-names = "cpsw_nuss";
>> +??????? ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
>> +??????? dma-coherent;
>> +??????? clocks = <&k3_clks 18 22>;
>> +??????? clock-names = "fck";
>> +??????? power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
>> +
>> +??????? dmas = <&mcu_udmap 0xf000>,
>> +?????????????? <&mcu_udmap 0xf001>,
>> +?????????????? <&mcu_udmap 0xf002>,
>> +?????????????? <&mcu_udmap 0xf003>,
>> +?????????????? <&mcu_udmap 0xf004>,
>> +?????????????? <&mcu_udmap 0xf005>,
>> +?????????????? <&mcu_udmap 0xf006>,
>> +?????????????? <&mcu_udmap 0xf007>,
>> +?????????????? <&mcu_udmap 0x7000>;
>> +??????? dma-names = "tx0", "tx1", "tx2", "tx3",
>> +??????????????? "tx4", "tx5", "tx6", "tx7",
>> +??????????????? "rx";
>> +
>> +??????? ethernet-ports {
>> +??????????? #address-cells = <1>;
>> +??????????? #size-cells = <0>;
>> +
>> +??????????? cpsw_port1: port at 1 {
>> +??????????????? reg = <1>;
>> +??????????????? ti,mac-only;
>> +??????????????? label = "port1";
>> +??????????????? ti,syscon-efuse = <&mcu_conf 0x200>;
>> +??????????????? phys = <&phy_gmii_sel 1>;
>> +??????????? };
>> +??????? };
>> +
>> +??????? davinci_mdio: mdio at f00 {
>> +??????????? compatible = "ti,cpsw-mdio","ti,davinci_mdio";
>> +??????????? reg = <0x0 0xf00 0x0 0x100>;
>> +??????????? #address-cells = <1>;
>> +??????????? #size-cells = <0>;
>> +??????????? clocks = <&k3_clks 18 22>;
>> +??????????? clock-names = "fck";
>> +??????????? bus_freq = <1000000>;
>> +??????? };
>> +
>> +??????? cpts at 3d000 {
>> +??????????? compatible = "ti,am65-cpts";
>> +??????????? reg = <0x0 0x3d000 0x0 0x400>;
>> +??????????? clocks = <&k3_clks 18 2>;
>> +??????????? clock-names = "cpts";
>> +??????????? interrupts-extended = <&gic500 GIC_SPI 858
>> IRQ_TYPE_LEVEL_HIGH>;
>> +??????????? interrupt-names = "cpts";
>> +??????????? ti,cpts-ext-ts-inputs = <4>;
>> +??????????? ti,cpts-periodic-outputs = <2>;
>> +??????? };
>
> Can we drop cpts part while here - it is not used by u-boot?
>
Idea is that U-Boot DT needs to be in sync with kernel as much as
possible even if some of nodes are unused...
Lokesh,
do you want the unused nodes dropped?
Regards
Vignesh
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 4/5] arm: dts: k3-j721e: Sync CPSW DT node from kernel
2020-07-07 14:15 ` Vignesh Raghavendra
@ 2020-07-08 7:55 ` Lokesh Vutla
0 siblings, 0 replies; 11+ messages in thread
From: Lokesh Vutla @ 2020-07-08 7:55 UTC (permalink / raw)
To: u-boot
On 07/07/20 7:45 pm, Vignesh Raghavendra wrote:
>
>
> On 07/07/20 7:19 pm, Grygorii Strashko wrote:
>>
>>
>> On 06/07/2020 11:06, Vignesh Raghavendra wrote:
>>> Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
>>>
>>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>>> ---
>>> ? .../k3-j721e-common-proc-board-u-boot.dtsi??? | 74 +------------------
>>> ? arch/arm/dts/k3-j721e-mcu-wakeup.dtsi???????? | 74 +++++++++++++++++++
>>> ? 2 files changed, 75 insertions(+), 73 deletions(-)
>>>
>>> diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
>>> b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
>>> index 6273133303..6e748bfebb 100644
>>> --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
>>> +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
>>> @@ -31,20 +31,6 @@
>>> ????????? u-boot,dm-spl;
>>> ????? };
>>> ? -??? mcu_conf: scm_conf at 40f00000 {
>>> -??????? compatible = "syscon", "simple-mfd";
>>> -??????? reg = <0x0 0x40f00000 0x0 0x20000>;
>>> -??????? #address-cells = <1>;
>>> -??????? #size-cells = <1>;
>>> -??????? ranges = <0x0 0x0 0x40f00000 0x20000>;
>>> -
>>> -??????? phy_sel: cpsw-phy-sel at 4040 {
>>> -??????????? compatible = "ti,am654-cpsw-phy-sel";
>>> -??????????? reg = <0x4040 0x4>;
>>> -??????????? reg-names = "gmii-sel";
>>> -??????? };
>>> -??? };
>>> -
>>> ????? mcu_navss {
>>> ????????? u-boot,dm-spl;
>>> ? @@ -56,65 +42,6 @@
>>> ????????????? u-boot,dm-spl;
>>> ????????? };
>>> ????? };
>>> -
>>> -??? mcu_cpsw: ethernet at 046000000 {
>>> -??????? compatible = "ti,j721e-cpsw-nuss";
>>> -??????? #address-cells = <2>;
>>> -??????? #size-cells = <2>;
>>> -??????? reg = <0x0 0x46000000 0x0 0x200000>;
>>> -??????? reg-names = "cpsw_nuss";
>>> -??????? ranges;
>>> -??????? dma-coherent;
>>> -??????? clocks = <&k3_clks 18 22>;
>>> -??????? clock-names = "fck";
>>> -??????? power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
>>> -??????? cpsw-phy-sel = <&phy_sel>;
>>> -
>>> -??????? dmas = <&mcu_udmap 0xf000>,
>>> -?????????????? <&mcu_udmap 0xf001>,
>>> -?????????????? <&mcu_udmap 0xf002>,
>>> -?????????????? <&mcu_udmap 0xf003>,
>>> -?????????????? <&mcu_udmap 0xf004>,
>>> -?????????????? <&mcu_udmap 0xf005>,
>>> -?????????????? <&mcu_udmap 0xf006>,
>>> -?????????????? <&mcu_udmap 0xf007>,
>>> -?????????????? <&mcu_udmap 0x7000>;
>>> -??????? dma-names = "tx0", "tx1", "tx2", "tx3",
>>> -??????????????? "tx4", "tx5", "tx6", "tx7",
>>> -??????????????? "rx";
>>> -
>>> -??????? ports {
>>> -??????????? #address-cells = <1>;
>>> -??????????? #size-cells = <0>;
>>> -
>>> -??????????? host: host at 0 {
>>> -??????????????? reg = <0>;
>>> -??????????????? ti,label = "host";
>>> -??????????? };
>>> -
>>> -??????????? cpsw_port1: port at 1 {
>>> -??????????????? reg = <1>;
>>> -??????????????? ti,mac-only;
>>> -??????????????? ti,label = "port1";
>>> -??????????????? ti,syscon-efuse = <&mcu_conf 0x200>;
>>> -??????????? };
>>> -??????? };
>>> -
>>> -??????? davinci_mdio: mdio {
>>> -??????????? #address-cells = <1>;
>>> -??????????? #size-cells = <0>;
>>> -??????????? bus_freq = <1000000>;
>>> -??????? };
>>> -
>>> -??????? cpts {
>>> -??????????? clocks = <&k3_clks 18 2>;
>>> -??????????? clock-names = "cpts";
>>> -??????????? interrupts-extended = <&gic500 GIC_SPI 858
>>> IRQ_TYPE_LEVEL_HIGH>;
>>> -??????????? interrupt-names = "cpts";
>>> -??????????? ti,cpts-ext-ts-inputs = <4>;
>>> -??????????? ti,cpts-periodic-outputs = <2>;
>>> -??????? };
>>> -??? };
>>> ? };
>>> ? ? &secure_proxy_main {
>>> @@ -224,6 +151,7 @@
>>> ????? reg = <0x0 0x46000000 0x0 0x200000>,
>>> ??????????? <0x0 0x40f00200 0x0 0x2>;
>>> ????? reg-names = "cpsw_nuss", "mac_efuse";
>>> +??? /delete-property/ ranges;
>>> ? ????? cpsw-phy-sel at 40f04040 {
>>> ????????? compatible = "ti,am654-cpsw-phy-sel";
>>> diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
>>> b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
>>> index 70d5bcaa72..e6c99ab698 100644
>>> --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
>>> +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
>>> @@ -35,6 +35,20 @@
>>> ????????? };
>>> ????? };
>>> ? +??? mcu_conf: syscon at 40f00000 {
>>> +??????? compatible = "syscon", "simple-mfd";
>>> +??????? reg = <0x0 0x40f00000 0x0 0x20000>;
>>> +??????? #address-cells = <1>;
>>> +??????? #size-cells = <1>;
>>> +??????? ranges = <0x0 0x0 0x40f00000 0x20000>;
>>> +
>>> +??????? phy_gmii_sel: phy at 4040 {
>>> +??????????? compatible = "ti,am654-phy-gmii-sel";
>>> +??????????? reg = <0x4040 0x4>;
>>> +??????????? #phy-cells = <1>;
>>> +??????? };
>>> +??? };
>>> +
>>> ????? wkup_pmx0: pinmux at 4301c000 {
>>> ????????? compatible = "pinctrl-single";
>>> ????????? /* Proxy 0 addressing */
>>> @@ -242,4 +256,64 @@
>>> ????????????? ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
>>> ????????? };
>>> ????? };
>>> +
>>> +??? mcu_cpsw: ethernet at 46000000 {
>>> +??????? compatible = "ti,j721e-cpsw-nuss";
>>> +??????? #address-cells = <2>;
>>> +??????? #size-cells = <2>;
>>> +??????? reg = <0x0 0x46000000 0x0 0x200000>;
>>> +??????? reg-names = "cpsw_nuss";
>>> +??????? ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
>>> +??????? dma-coherent;
>>> +??????? clocks = <&k3_clks 18 22>;
>>> +??????? clock-names = "fck";
>>> +??????? power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
>>> +
>>> +??????? dmas = <&mcu_udmap 0xf000>,
>>> +?????????????? <&mcu_udmap 0xf001>,
>>> +?????????????? <&mcu_udmap 0xf002>,
>>> +?????????????? <&mcu_udmap 0xf003>,
>>> +?????????????? <&mcu_udmap 0xf004>,
>>> +?????????????? <&mcu_udmap 0xf005>,
>>> +?????????????? <&mcu_udmap 0xf006>,
>>> +?????????????? <&mcu_udmap 0xf007>,
>>> +?????????????? <&mcu_udmap 0x7000>;
>>> +??????? dma-names = "tx0", "tx1", "tx2", "tx3",
>>> +??????????????? "tx4", "tx5", "tx6", "tx7",
>>> +??????????????? "rx";
>>> +
>>> +??????? ethernet-ports {
>>> +??????????? #address-cells = <1>;
>>> +??????????? #size-cells = <0>;
>>> +
>>> +??????????? cpsw_port1: port at 1 {
>>> +??????????????? reg = <1>;
>>> +??????????????? ti,mac-only;
>>> +??????????????? label = "port1";
>>> +??????????????? ti,syscon-efuse = <&mcu_conf 0x200>;
>>> +??????????????? phys = <&phy_gmii_sel 1>;
>>> +??????????? };
>>> +??????? };
>>> +
>>> +??????? davinci_mdio: mdio at f00 {
>>> +??????????? compatible = "ti,cpsw-mdio","ti,davinci_mdio";
>>> +??????????? reg = <0x0 0xf00 0x0 0x100>;
>>> +??????????? #address-cells = <1>;
>>> +??????????? #size-cells = <0>;
>>> +??????????? clocks = <&k3_clks 18 22>;
>>> +??????????? clock-names = "fck";
>>> +??????????? bus_freq = <1000000>;
>>> +??????? };
>>> +
>>> +??????? cpts at 3d000 {
>>> +??????????? compatible = "ti,am65-cpts";
>>> +??????????? reg = <0x0 0x3d000 0x0 0x400>;
>>> +??????????? clocks = <&k3_clks 18 2>;
>>> +??????????? clock-names = "cpts";
>>> +??????????? interrupts-extended = <&gic500 GIC_SPI 858
>>> IRQ_TYPE_LEVEL_HIGH>;
>>> +??????????? interrupt-names = "cpts";
>>> +??????????? ti,cpts-ext-ts-inputs = <4>;
>>> +??????????? ti,cpts-periodic-outputs = <2>;
>>> +??????? };
>>
>> Can we drop cpts part while here - it is not used by u-boot?
>>
>
>
> Idea is that U-Boot DT needs to be in sync with kernel as much as
> possible even if some of nodes are unused...
>
> Lokesh,
> do you want the unused nodes dropped?
Nope. Keep the DT in sync with kernel.
Thanks and regards,
Lokesh
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel
2020-07-06 8:06 [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel Vignesh Raghavendra
` (5 preceding siblings ...)
2020-07-07 13:50 ` [PATCH 0/5] TI: AM654/J721e: " Grygorii Strashko
@ 2020-07-14 5:41 ` Lokesh Vutla
6 siblings, 0 replies; 11+ messages in thread
From: Lokesh Vutla @ 2020-07-14 5:41 UTC (permalink / raw)
To: u-boot
On 06/07/20 1:36 pm, Vignesh Raghavendra wrote:
> Make necessary driver changes to sync DT nodes from kernel.
> Depends on [1]
>
> Due to the dependencies, I would like this entire series to be merged via TI
> tree.
>
> Tested on AM654 and J721e boards
>
> [1] https://patchwork.ozlabs.org/project/uboot/list/?series=186589
Applied to u-boot-ti.
Thanks and regards,
Lokesh
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2020-07-14 5:41 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-06 8:06 [PATCH 0/5] TI: AM654/J721e: Sync CPSW DT node from kernel Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 1/5] net: ti: am65-cpsw-nuss: Remove dead code Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 2/5] net: ti: am65-cpsw-nuss: Set ALE default thread enable Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 3/5] net: ti: am65-cpsw-nuss: Update driver to use kernel DT Vignesh Raghavendra
2020-07-06 8:06 ` [PATCH 4/5] arm: dts: k3-j721e: Sync CPSW DT node from kernel Vignesh Raghavendra
2020-07-07 13:49 ` Grygorii Strashko
2020-07-07 14:15 ` Vignesh Raghavendra
2020-07-08 7:55 ` Lokesh Vutla
2020-07-06 8:06 ` [PATCH 5/5] arm: dts: k3-am65: " Vignesh Raghavendra
2020-07-07 13:50 ` [PATCH 0/5] TI: AM654/J721e: " Grygorii Strashko
2020-07-14 5:41 ` Lokesh Vutla
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