From: Roger Quadros <rogerq@ti.com> To: <t-kristo@ti.com>, <nm@ti.com> Cc: <robh+dt@kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <nsekhar@ti.com>, <kishon@ti.com>, Roger Quadros <rogerq@ti.com> Subject: [PATCH v3 2/6] arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux Date: Tue, 15 Sep 2020 14:20:34 +0300 [thread overview] Message-ID: <20200915112038.30219-3-rogerq@ti.com> (raw) In-Reply-To: <20200915112038.30219-1-rogerq@ti.com> The SERDES lane control mux registers are present in the CTRLMMR space. Signed-off-by: Roger Quadros <rogerq@ti.com> --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 1702ac0bbf40..d6d688efc32a 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -18,6 +18,21 @@ }; }; + scm_conf: scm-conf@100000 { + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; + reg = <0x00 0x00100000 0x00 0x1c000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00 0x00 0x00100000 0x1c000>; + + serdes_ln_ctrl: serdes-ln-ctrl@4080 { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ + <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */ + }; + }; + gic500: interrupt-controller@1800000 { compatible = "arm,gic-v3"; #address-cells = <2>; -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq@ti.com> To: <t-kristo@ti.com>, <nm@ti.com> Cc: devicetree@vger.kernel.org, nsekhar@ti.com, linux-kernel@vger.kernel.org, kishon@ti.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, Roger Quadros <rogerq@ti.com> Subject: [PATCH v3 2/6] arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux Date: Tue, 15 Sep 2020 14:20:34 +0300 [thread overview] Message-ID: <20200915112038.30219-3-rogerq@ti.com> (raw) In-Reply-To: <20200915112038.30219-1-rogerq@ti.com> The SERDES lane control mux registers are present in the CTRLMMR space. Signed-off-by: Roger Quadros <rogerq@ti.com> --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 1702ac0bbf40..d6d688efc32a 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -18,6 +18,21 @@ }; }; + scm_conf: scm-conf@100000 { + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; + reg = <0x00 0x00100000 0x00 0x1c000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00 0x00 0x00100000 0x1c000>; + + serdes_ln_ctrl: serdes-ln-ctrl@4080 { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ + <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */ + }; + }; + gic500: interrupt-controller@1800000 { compatible = "arm,gic-v3"; #address-cells = <2>; -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-15 11:31 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-15 11:20 [PATCH v3 0/6] arm64: dts: ti: Add USB support for J7200 EVM Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-15 11:20 ` [PATCH v3 1/6] dt-bindings: mux-j7200-wiz: Add lane function defines Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-16 4:52 ` Peter Rosin 2020-09-16 4:52 ` Peter Rosin 2020-09-16 15:45 ` Nishanth Menon 2020-09-16 15:45 ` Nishanth Menon 2020-09-17 9:45 ` Peter Rosin 2020-09-17 9:45 ` Peter Rosin 2020-09-17 12:27 ` Nishanth Menon 2020-09-17 12:27 ` Nishanth Menon 2020-09-17 12:53 ` Peter Rosin 2020-09-17 12:53 ` Peter Rosin 2020-09-17 13:00 ` Nishanth Menon 2020-09-17 13:00 ` Nishanth Menon 2020-09-17 10:17 ` Kishon Vijay Abraham I 2020-09-17 10:17 ` Kishon Vijay Abraham I 2020-09-17 12:36 ` Nishanth Menon 2020-09-17 12:36 ` Nishanth Menon 2020-09-17 12:00 ` Roger Quadros 2020-09-17 12:00 ` Roger Quadros 2020-09-17 12:14 ` Nishanth Menon 2020-09-17 12:14 ` Nishanth Menon 2020-09-17 12:37 ` Peter Rosin 2020-09-17 12:37 ` Peter Rosin 2020-09-17 12:51 ` Nishanth Menon 2020-09-17 12:51 ` Nishanth Menon 2020-09-15 11:20 ` Roger Quadros [this message] 2020-09-15 11:20 ` [PATCH v3 2/6] arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux Roger Quadros 2020-09-15 11:20 ` [PATCH v3 3/6] arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-15 11:20 ` [PATCH v3 4/6] arm64: dts: ti: k3-j7200-main: Add USB controller Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-15 11:20 ` [PATCH v3 5/6] arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-15 11:20 ` [PATCH v3 6/6] arm64: dts: ti: k3-j7200-common-proc-board: Add USB support Roger Quadros 2020-09-15 11:20 ` Roger Quadros
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