From: Roger Quadros <rogerq@ti.com> To: <t-kristo@ti.com>, <nm@ti.com> Cc: <robh+dt@kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <nsekhar@ti.com>, <kishon@ti.com>, Roger Quadros <rogerq@ti.com> Subject: [PATCH v3 5/6] arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function Date: Tue, 15 Sep 2020 14:20:37 +0300 [thread overview] Message-ID: <20200915112038.30219-6-rogerq@ti.com> (raw) In-Reply-To: <20200915112038.30219-1-rogerq@ti.com> From: Kishon Vijay Abraham I <kishon@ti.com> First two lanes of SERDES is connected to PCIe, third lane is connected to QSGMII and the last lane is connected to USB. However, Cadence torrent SERDES doesn't support more than 2 protocols at the same time. Configure it only for PCIe and QSGMII. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> --- arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 8e534ef8a3f5..0ecaba600704 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "k3-j7200-som-p0.dtsi" +#include <dt-bindings/mux/mux-j7200-wiz.h> / { chosen { @@ -139,3 +140,8 @@ ti,driver-strength-ohm = <50>; disable-wp; }; + +&serdes_ln_ctrl { + idle-states = <SERDES0_LANE0_PCIE1_LANE0>, <SERDES0_LANE1_PCIE1_LANE1>, + <SERDES0_LANE2_QSGMII_LANE1>, <SERDES0_LANE3_IP4_UNUSED>; +}; -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq@ti.com> To: <t-kristo@ti.com>, <nm@ti.com> Cc: devicetree@vger.kernel.org, nsekhar@ti.com, linux-kernel@vger.kernel.org, kishon@ti.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, Roger Quadros <rogerq@ti.com> Subject: [PATCH v3 5/6] arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function Date: Tue, 15 Sep 2020 14:20:37 +0300 [thread overview] Message-ID: <20200915112038.30219-6-rogerq@ti.com> (raw) In-Reply-To: <20200915112038.30219-1-rogerq@ti.com> From: Kishon Vijay Abraham I <kishon@ti.com> First two lanes of SERDES is connected to PCIe, third lane is connected to QSGMII and the last lane is connected to USB. However, Cadence torrent SERDES doesn't support more than 2 protocols at the same time. Configure it only for PCIe and QSGMII. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> --- arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 8e534ef8a3f5..0ecaba600704 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "k3-j7200-som-p0.dtsi" +#include <dt-bindings/mux/mux-j7200-wiz.h> / { chosen { @@ -139,3 +140,8 @@ ti,driver-strength-ohm = <50>; disable-wp; }; + +&serdes_ln_ctrl { + idle-states = <SERDES0_LANE0_PCIE1_LANE0>, <SERDES0_LANE1_PCIE1_LANE1>, + <SERDES0_LANE2_QSGMII_LANE1>, <SERDES0_LANE3_IP4_UNUSED>; +}; -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-15 11:34 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-15 11:20 [PATCH v3 0/6] arm64: dts: ti: Add USB support for J7200 EVM Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-15 11:20 ` [PATCH v3 1/6] dt-bindings: mux-j7200-wiz: Add lane function defines Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-16 4:52 ` Peter Rosin 2020-09-16 4:52 ` Peter Rosin 2020-09-16 15:45 ` Nishanth Menon 2020-09-16 15:45 ` Nishanth Menon 2020-09-17 9:45 ` Peter Rosin 2020-09-17 9:45 ` Peter Rosin 2020-09-17 12:27 ` Nishanth Menon 2020-09-17 12:27 ` Nishanth Menon 2020-09-17 12:53 ` Peter Rosin 2020-09-17 12:53 ` Peter Rosin 2020-09-17 13:00 ` Nishanth Menon 2020-09-17 13:00 ` Nishanth Menon 2020-09-17 10:17 ` Kishon Vijay Abraham I 2020-09-17 10:17 ` Kishon Vijay Abraham I 2020-09-17 12:36 ` Nishanth Menon 2020-09-17 12:36 ` Nishanth Menon 2020-09-17 12:00 ` Roger Quadros 2020-09-17 12:00 ` Roger Quadros 2020-09-17 12:14 ` Nishanth Menon 2020-09-17 12:14 ` Nishanth Menon 2020-09-17 12:37 ` Peter Rosin 2020-09-17 12:37 ` Peter Rosin 2020-09-17 12:51 ` Nishanth Menon 2020-09-17 12:51 ` Nishanth Menon 2020-09-15 11:20 ` [PATCH v3 2/6] arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-15 11:20 ` [PATCH v3 3/6] arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-15 11:20 ` [PATCH v3 4/6] arm64: dts: ti: k3-j7200-main: Add USB controller Roger Quadros 2020-09-15 11:20 ` Roger Quadros 2020-09-15 11:20 ` Roger Quadros [this message] 2020-09-15 11:20 ` [PATCH v3 5/6] arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function Roger Quadros 2020-09-15 11:20 ` [PATCH v3 6/6] arm64: dts: ti: k3-j7200-common-proc-board: Add USB support Roger Quadros 2020-09-15 11:20 ` Roger Quadros
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