* [Intel-gfx] [PATCH 02/27] drm/i915/pxp: Enable PXP irq worker and callback stub
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 03/27] drm/i915/pxp: Add PXP context for logical hardware states Sean Z Huang
` (25 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Create the irq worker that serves as callback handler, those
callback stubs should be called while the hardware key teardown
occurs.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 4 ++
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/pxp/intel_pxp.c | 95 ++++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 22 ++++++
4 files changed, 122 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 257063a57101..d64013d0afb5 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -13,6 +13,7 @@
#include "intel_gt_irq.h"
#include "intel_uncore.h"
#include "intel_rps.h"
+#include "pxp/intel_pxp.h"
static void guc_irq_handler(struct intel_guc *guc, u16 iir)
{
@@ -106,6 +107,9 @@ gen11_other_irq_handler(struct intel_gt *gt, const u8 instance,
if (instance == OTHER_GTPM_INSTANCE)
return gen11_rps_irq_handler(>->rps, iir);
+ if (instance == OTHER_KCR_INSTANCE)
+ return intel_pxp_irq_handler(gt, iir);
+
WARN_ONCE(1, "unhandled other interrupt instance=0x%x, iir=0x%x\n",
instance, iir);
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7ea70b7ffcc6..faf6b06145fa 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7941,6 +7941,7 @@ enum {
/* irq instances for OTHER_CLASS */
#define OTHER_GUC_INSTANCE 0
#define OTHER_GTPM_INSTANCE 1
+#define OTHER_KCR_INSTANCE 4
#define GEN11_INTR_IDENTITY_REG(x) _MMIO(0x190060 + ((x) * 4))
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index a469c55e3e54..d98bff4a0fde 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -6,15 +6,110 @@
#include "i915_drv.h"
#include "intel_pxp.h"
+static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask)
+{
+ WARN_ON(INTEL_GEN(i915) < 11);
+
+ /* crypto mask is in bit31-16 (Engine1 Interrupt Mask) */
+ intel_uncore_write(&i915->uncore, GEN11_CRYPTO_RSVD_INTR_MASK, mask << 16);
+}
+
+static void intel_pxp_unmask_irq(struct intel_gt *gt)
+{
+ lockdep_assert_held(>->irq_lock);
+
+ intel_pxp_write_irq_mask_reg(gt->i915, 0);
+}
+
+static void intel_pxp_mask_irq(struct intel_gt *gt, u32 mask)
+{
+ lockdep_assert_held(>->irq_lock);
+
+ intel_pxp_write_irq_mask_reg(gt->i915, mask);
+}
+
+static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915)
+{
+ drm_dbg(&i915->drm, "%s was called\n", __func__);
+
+ return 0;
+}
+
+static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private *i915)
+{
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ return 0;
+}
+
+static void intel_pxp_irq_work(struct work_struct *work)
+{
+ struct intel_pxp *pxp_ptr = container_of(work, typeof(*pxp_ptr), irq_work);
+ struct drm_i915_private *i915 = container_of(pxp_ptr, typeof(*i915), pxp);
+ u32 events = 0;
+
+ spin_lock_irq(&i915->gt.irq_lock);
+ events = fetch_and_zero(&pxp_ptr->current_events);
+ spin_unlock_irq(&i915->gt.irq_lock);
+
+ drm_dbg(&i915->drm, "%s was called with events=[%d]\n", __func__, events);
+
+ if (events & PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED ||
+ events & PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ)
+ intel_pxp_teardown_required_callback(i915);
+
+ if (events & PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE)
+ intel_pxp_global_terminate_complete_callback(i915);
+
+ spin_lock_irq(&i915->gt.irq_lock);
+ intel_pxp_unmask_irq(&i915->gt);
+ spin_unlock_irq(&i915->gt.irq_lock);
+}
+
int intel_pxp_init(struct drm_i915_private *i915)
{
int ret;
drm_info(&i915->drm, "i915_pxp_init\n");
+ INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work);
+
+ i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED |
+ PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ |
+ PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE);
+
return ret;
}
void intel_pxp_uninit(struct drm_i915_private *i915)
{
}
+
+/**
+ * intel_pxp_irq_handler - Proxies KCR interrupts to PXP.
+ * @gt: valid GT instance
+ * @iir: GT interrupt vector associated with the interrupt
+ *
+ * Dispatches each vector element into an IRQ to PXP.
+ */
+void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir)
+{
+ struct drm_i915_private *i915 = gt->i915;
+ const u32 events = iir & i915->pxp.handled_irr;
+
+ drm_dbg(&i915->drm, "%s was called with iir=[0x%04x]\n", __func__, iir);
+
+ lockdep_assert_held(>->irq_lock);
+
+ if (unlikely(!events)) {
+ drm_dbg(&i915->drm, "%s returned due to iir=[0x%04x]\n", __func__, iir);
+ goto end;
+ }
+
+ intel_pxp_mask_irq(gt, i915->pxp.handled_irr);
+
+ i915->pxp.current_events |= events;
+ schedule_work(&i915->pxp.irq_work);
+end:
+ return;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 578f1126bada..620774fc32e2 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -8,14 +8,36 @@
#include <drm/drm_file.h>
+#define PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED BIT(1)
+#define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2)
+#define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3)
+
+enum pxp_sm_session_req {
+ /* Request KMD to allocate session id and move it to IN INIT */
+ PXP_SM_REQ_SESSION_ID_INIT = 0x0,
+ /* Inform KMD that UMD has completed the initialization */
+ PXP_SM_REQ_SESSION_IN_PLAY,
+ /* Request KMD to terminate the session */
+ PXP_SM_REQ_SESSION_TERMINATE
+};
+
struct pxp_context;
struct intel_pxp {
+ struct work_struct irq_work;
+ u32 handled_irr;
+ u32 current_events;
+
struct pxp_context *r0ctx;
};
+struct intel_gt;
struct drm_i915_private;
+void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir);
+int i915_pxp_teardown_required_callback(struct drm_i915_private *i915);
+int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915);
+
int intel_pxp_init(struct drm_i915_private *i915);
void intel_pxp_uninit(struct drm_i915_private *i915);
--
2.17.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 03/27] drm/i915/pxp: Add PXP context for logical hardware states.
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 02/27] drm/i915/pxp: Enable PXP irq worker and callback stub Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 04/27] drm/i915/pxp: set KCR reg init during the boot time Sean Z Huang
` (24 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Add PXP context which represents combined view
of driver and logical HW states.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/pxp/intel_pxp.c | 32 ++++++++++--
drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 ++
drivers/gpu/drm/i915/pxp/intel_pxp_context.c | 51 ++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_context.h | 44 +++++++++++++++++
5 files changed, 128 insertions(+), 5 deletions(-)
create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_context.c
create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_context.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 8274fea96009..831e8ad57560 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -256,7 +256,8 @@ i915-y += i915_perf.o
# Protected execution platform (PXP) support
i915-y += \
- pxp/intel_pxp.o
+ pxp/intel_pxp.o \
+ pxp/intel_pxp_context.o \
# Post-mortem debug and GPU hang state capture
i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index d98bff4a0fde..6d358f241406 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -5,6 +5,7 @@
#include "i915_drv.h"
#include "intel_pxp.h"
+#include "intel_pxp_context.h"
static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask)
{
@@ -32,14 +33,32 @@ static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915)
{
drm_dbg(&i915->drm, "%s was called\n", __func__);
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+
+ i915->pxp.r0ctx->global_state_attacked = true;
+ i915->pxp.r0ctx->flag_display_hm_surface_keys = false;
+
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+
return 0;
}
static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private *i915)
{
+ int ret = 0;
+
drm_dbg(&i915->drm, ">>> %s\n", __func__);
- return 0;
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+
+ if (i915->pxp.r0ctx->global_state_attacked)
+ i915->pxp.r0ctx->global_state_attacked = false;
+
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+
+ return ret;
}
static void intel_pxp_irq_work(struct work_struct *work)
@@ -68,21 +87,26 @@ static void intel_pxp_irq_work(struct work_struct *work)
int intel_pxp_init(struct drm_i915_private *i915)
{
- int ret;
-
drm_info(&i915->drm, "i915_pxp_init\n");
+ i915->pxp.r0ctx = intel_pxp_create_r0ctx(i915);
+ if (!i915->pxp.r0ctx) {
+ drm_dbg(&i915->drm, "Failed to create pxp ctx\n");
+ return -EFAULT;
+ }
+
INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work);
i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED |
PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ |
PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE);
- return ret;
+ return 0;
}
void intel_pxp_uninit(struct drm_i915_private *i915)
{
+ intel_pxp_destroy_r0ctx(i915);
}
/**
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 620774fc32e2..4dec35bb834d 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -12,6 +12,9 @@
#define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2)
#define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3)
+#define MAX_TYPE0_SESSIONS 16
+#define MAX_TYPE1_SESSIONS 6
+
enum pxp_sm_session_req {
/* Request KMD to allocate session id and move it to IN INIT */
PXP_SM_REQ_SESSION_ID_INIT = 0x0,
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.c b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c
new file mode 100644
index 000000000000..692370e758de
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#include "intel_pxp_context.h"
+
+/**
+ * intel_pxp_create_ctx - To create a new pxp context.
+ * @i915: i915 device handle.
+ *
+ * Return: pointer to new_ctx, NULL for failure
+ */
+struct pxp_context *intel_pxp_create_r0ctx(struct drm_i915_private *i915)
+{
+ struct pxp_context *new_ctx = NULL;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ new_ctx = kzalloc(sizeof(*new_ctx), GFP_KERNEL);
+ if (!new_ctx) {
+ drm_dbg(&i915->drm, "unable to allocate new pxp context!\n");
+ return NULL;
+ }
+
+ get_random_bytes(&new_ctx->r0ctx_id, sizeof(new_ctx->r0ctx_id));
+
+ new_ctx->global_state_attacked = false;
+
+ mutex_init(&new_ctx->ctx_mutex);
+
+ INIT_LIST_HEAD(&new_ctx->active_pxp_type0_sessions);
+ INIT_LIST_HEAD(&new_ctx->active_pxp_type1_sessions);
+ INIT_LIST_HEAD(&new_ctx->r3ctx_list);
+
+ drm_dbg(&i915->drm, "<<< %s r0ctx_id=[0x%08x]\n", __func__, new_ctx->r0ctx_id);
+
+ return new_ctx;
+}
+
+/**
+ * intel_pxp_destroy_ctx - To destroy the pxp context.
+ * @i915: i915 device handle.
+ *
+ * Return: return 0 for success, failure otherwise.
+ */
+void intel_pxp_destroy_r0ctx(struct drm_i915_private *i915)
+{
+ kfree(i915->pxp.r0ctx);
+ i915->pxp.r0ctx = NULL;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.h b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h
new file mode 100644
index 000000000000..5de4e68b9dce
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_CONTEXT_H__
+#define __INTEL_PXP_CONTEXT_H__
+
+#include <linux/list.h>
+#include "i915_drv.h"
+#include "pxp/intel_pxp.h"
+
+/* struct pxp_context - Represents combined view of driver and logical HW states. */
+struct pxp_context {
+ /** @ctx_mutex: mutex to protect the ring0 pxp context */
+ struct mutex ctx_mutex;
+
+ struct list_head active_pxp_type0_sessions;
+ struct list_head active_pxp_type1_sessions;
+
+ struct list_head r3ctx_list;
+
+ u32 type0_session_pxp_tag[MAX_TYPE0_SESSIONS];
+ u32 type1_session_pxp_tag[MAX_TYPE1_SESSIONS];
+
+ int r0ctx_id;
+
+ bool global_state_attacked;
+ bool global_state_in_suspend;
+ bool flag_display_hm_surface_keys;
+};
+
+struct pxp_r3ctx {
+ /** @listhead: linked list infrastructure, do not change its order. */
+ struct list_head listhead;
+
+ /** @r3ctx: ring 3 context id */
+ u32 r3ctx;
+};
+
+struct pxp_context *intel_pxp_create_r0ctx(struct drm_i915_private *i915);
+void intel_pxp_destroy_r0ctx(struct drm_i915_private *i915);
+
+#endif /* __INTEL_PXP_CONTEXT_H__ */
--
2.17.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 04/27] drm/i915/pxp: set KCR reg init during the boot time
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 02/27] drm/i915/pxp: Enable PXP irq worker and callback stub Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 03/27] drm/i915/pxp: Add PXP context for logical hardware states Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context Sean Z Huang
` (23 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Set the KCR init during the boot time, which is required by
hardware, to allow us doing further protection operation such
as sending commands to GPU or TEE
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/pxp/intel_pxp.c | 11 +++++-
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 48 +++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 19 ++++++++++
4 files changed, 78 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 831e8ad57560..81432a9f44d6 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -258,6 +258,7 @@ i915-y += i915_perf.o
i915-y += \
pxp/intel_pxp.o \
pxp/intel_pxp_context.o \
+ pxp/intel_pxp_sm.o
# Post-mortem debug and GPU hang state capture
i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 6d358f241406..3a24c2b13b14 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -6,6 +6,7 @@
#include "i915_drv.h"
#include "intel_pxp.h"
#include "intel_pxp_context.h"
+#include "intel_pxp_sm.h"
static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask)
{
@@ -87,6 +88,8 @@ static void intel_pxp_irq_work(struct work_struct *work)
int intel_pxp_init(struct drm_i915_private *i915)
{
+ int ret;
+
drm_info(&i915->drm, "i915_pxp_init\n");
i915->pxp.r0ctx = intel_pxp_create_r0ctx(i915);
@@ -95,13 +98,19 @@ int intel_pxp_init(struct drm_i915_private *i915)
return -EFAULT;
}
+ ret = pxp_sm_set_kcr_init_reg(i915);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to set kcr init reg\n");
+ return ret;
+ }
+
INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work);
i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED |
PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ |
PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE);
- return 0;
+ return ret;
}
void intel_pxp_uninit(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
new file mode 100644
index 000000000000..75e4b229d9f8
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#include "gt/intel_context.h"
+#include "gt/intel_engine_pm.h"
+
+#include "intel_pxp.h"
+#include "intel_pxp_sm.h"
+#include "intel_pxp_context.h"
+
+static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
+{
+ intel_wakeref_t wakeref;
+ int err = 0;
+
+ if (!i915) {
+ err = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s bad params\n", __func__);
+ goto end;
+ }
+
+ with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
+ i915_reg_t reg_offset = {offset};
+
+ intel_uncore_write(&i915->uncore, reg_offset, regval);
+ }
+end:
+ return err;
+}
+
+int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
+{
+ int ret;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ ret = pxp_reg_write(i915, KCR_INIT.reg, KCR_INIT_ALLOW_DISPLAY_ME_WRITES);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to write()\n");
+ goto end;
+ }
+
+end:
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
new file mode 100644
index 000000000000..59ce2394b590
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_SM_H__
+#define __INTEL_PXP_SM_H__
+
+#include "i915_reg.h"
+
+/* KCR register definitions */
+#define KCR_INIT _MMIO(0x320f0)
+#define KCR_INIT_MASK_SHIFT (16)
+/* Setting KCR Init bit is required after system boot */
+#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) << KCR_INIT_MASK_SHIFT))
+
+int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
+
+#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (2 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 04/27] drm/i915/pxp: set KCR reg init during the boot time Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 4:23 ` kernel test robot
2020-11-16 9:46 ` Dan Carpenter
2020-11-14 1:45 ` [Intel-gfx] [PATCH 06/27] drm/i915: Rename the whitelist to allowlist Sean Z Huang
` (22 subsequent siblings)
26 siblings, 2 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Enable one ioctl action to allow ring3 driver to set its ring3
context, so ring0 PXP can track the context id through this ring3
context list.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 1 +
drivers/gpu/drm/i915/pxp/intel_pxp.c | 66 ++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 16 +++++
drivers/gpu/drm/i915/pxp/intel_pxp_context.c | 34 ++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_context.h | 3 +
include/uapi/drm/i915_drm.h | 2 +
6 files changed, 122 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c8b9c42fcbd6..43ea85b5f14b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1761,6 +1761,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_QUERY, i915_query_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_VM_CREATE, i915_gem_vm_create_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_VM_DESTROY, i915_gem_vm_destroy_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_PXP_OPS, i915_pxp_ops_ioctl, DRM_RENDER_ALLOW),
};
static const struct drm_driver driver = {
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 3a24c2b13b14..a83fa7cd749f 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -8,6 +8,70 @@
#include "intel_pxp_context.h"
#include "intel_pxp_sm.h"
+int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile)
+{
+ int ret;
+ struct pxp_info pxp_info = {0};
+ struct drm_i915_pxp_ops *pxp_ops = data;
+ struct drm_i915_private *i915 = to_i915(dev);
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ if (!i915 || !drmfile || !pxp_ops || pxp_ops->pxp_info_size != sizeof(pxp_info)) {
+ drm_dbg(&i915->drm, "Failed to %s, invalid params\n", __func__);
+ ret = -EINVAL;
+ goto end;
+ }
+
+ if (copy_from_user(&pxp_info, (void __user *)pxp_ops->pxp_info_ptr, sizeof(pxp_info)) != 0) {
+ ret = -EFAULT;
+ goto end;
+ }
+
+ drm_dbg(&i915->drm, "i915 pxp ioctl call with action=[%d]\n", pxp_info.action);
+
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+
+ if (i915->pxp.r0ctx->global_state_in_suspend) {
+ drm_dbg(&i915->drm, "Return failure due to state in suspend\n");
+ pxp_info.sm_status = PXP_SM_STATUS_SESSION_NOT_AVAILABLE;
+ ret = 0;
+ goto end;
+ }
+
+ if (i915->pxp.r0ctx->global_state_attacked) {
+ drm_dbg(&i915->drm, "Retry required due to state attacked\n");
+ pxp_info.sm_status = PXP_SM_STATUS_RETRY_REQUIRED;
+ ret = 0;
+ goto end;
+ }
+
+ switch (pxp_info.action) {
+ case PXP_ACTION_SET_R3_CONTEXT:
+ {
+ ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx);
+ break;
+ }
+ default:
+ drm_dbg(&i915->drm, "Failed to %s due to bad params\n", __func__);
+ ret = -EINVAL;
+ goto end;
+ }
+
+end:
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+
+ if (ret == 0)
+ if (copy_to_user((void __user *)pxp_ops->pxp_info_ptr, &pxp_info, sizeof(pxp_info)) != 0)
+ ret = -EFAULT;
+
+ if (ret)
+ dev_err(&dev->pdev->dev, "pid=%d, ret = %d\n", task_pid_nr(current), ret);
+
+ drm_dbg(&i915->drm, "<<< %s\n", __func__);
+ return ret;
+}
+
static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask)
{
WARN_ON(INTEL_GEN(i915) < 11);
@@ -39,6 +103,8 @@ static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915)
i915->pxp.r0ctx->global_state_attacked = true;
i915->pxp.r0ctx->flag_display_hm_surface_keys = false;
+ intel_pxp_destroy_r3ctx_list(i915);
+
mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
return 0;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 4dec35bb834d..21a6964fc64e 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -24,6 +24,21 @@ enum pxp_sm_session_req {
PXP_SM_REQ_SESSION_TERMINATE
};
+#define PXP_ACTION_SET_R3_CONTEXT 5
+
+enum pxp_sm_status {
+ PXP_SM_STATUS_SUCCESS,
+ PXP_SM_STATUS_RETRY_REQUIRED,
+ PXP_SM_STATUS_SESSION_NOT_AVAILABLE,
+ PXP_SM_STATUS_ERROR_UNKNOWN
+};
+
+struct pxp_info {
+ u32 action;
+ u32 sm_status;
+ u32 set_r3ctx;
+} __packed;
+
struct pxp_context;
struct intel_pxp {
@@ -37,6 +52,7 @@ struct intel_pxp {
struct intel_gt;
struct drm_i915_private;
+int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile);
void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir);
int i915_pxp_teardown_required_callback(struct drm_i915_private *i915);
int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.c b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c
index 692370e758de..b6339720614e 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_context.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c
@@ -49,3 +49,37 @@ void intel_pxp_destroy_r0ctx(struct drm_i915_private *i915)
kfree(i915->pxp.r0ctx);
i915->pxp.r0ctx = NULL;
}
+
+int intel_pxp_set_r3ctx(struct drm_i915_private *i915, u32 r3ctx_in)
+{
+ struct pxp_r3ctx *r3ctx;
+
+ drm_dbg(&i915->drm, ">>> %s u3ctx_in=[%d]\n", __func__, r3ctx_in);
+
+ r3ctx = kzalloc(sizeof(*r3ctx), GFP_KERNEL);
+ if (!r3ctx) {
+ drm_dbg(&i915->drm, "Failed to kzalloc()\n");
+ return -ENOMEM;
+ }
+
+ r3ctx->r3ctx = r3ctx_in;
+
+ list_add(&r3ctx->listhead, &i915->pxp.r0ctx->r3ctx_list);
+ return 0;
+}
+
+void intel_pxp_destroy_r3ctx_list(struct drm_i915_private *i915)
+{
+ struct pxp_r3ctx *r3ctx, *n;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ list_for_each_entry_safe(r3ctx, n, &i915->pxp.r0ctx->r3ctx_list, listhead) {
+ drm_dbg(&i915->drm, "Destroy r3ctx_list u3ctx->r3ctx=[%d]\n", r3ctx->r3ctx);
+
+ list_del(&r3ctx->listhead);
+ kfree(r3ctx);
+ }
+
+ drm_dbg(&i915->drm, "<<< %s\n", __func__);
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.h b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h
index 5de4e68b9dce..e4a0388a2f57 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_context.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h
@@ -41,4 +41,7 @@ struct pxp_r3ctx {
struct pxp_context *intel_pxp_create_r0ctx(struct drm_i915_private *i915);
void intel_pxp_destroy_r0ctx(struct drm_i915_private *i915);
+int intel_pxp_set_r3ctx(struct drm_i915_private *i915, u32 r3ctx);
+void intel_pxp_destroy_r3ctx_list(struct drm_i915_private *i915);
+
#endif /* __INTEL_PXP_CONTEXT_H__ */
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index dc101264176b..180f97fd91dc 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -359,6 +359,7 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_QUERY 0x39
#define DRM_I915_GEM_VM_CREATE 0x3a
#define DRM_I915_GEM_VM_DESTROY 0x3b
+#define DRM_I915_PXP_OPS 0x3c
/* Must be kept compact -- no holes */
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
@@ -422,6 +423,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY, struct drm_i915_query)
#define DRM_IOCTL_I915_GEM_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_CREATE, struct drm_i915_gem_vm_control)
#define DRM_IOCTL_I915_GEM_VM_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_VM_DESTROY, struct drm_i915_gem_vm_control)
+#define DRM_IOCTL_I915_PXP_OPS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_PXP_OPS, struct drm_i915_pxp_ops)
/* Allow drivers to submit batchbuffers directly to hardware, relying
* on the security mechanisms provided by hardware.
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* Re: [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context
2020-11-14 1:45 ` [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context Sean Z Huang
@ 2020-11-14 4:23 ` kernel test robot
2020-11-16 9:46 ` Dan Carpenter
1 sibling, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 4:23 UTC (permalink / raw)
To: Sean Z Huang, Intel-gfx; +Cc: Huang, Sean Z, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 4206 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: i386-randconfig-a012-20201113 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/1d109ada10e82c324682792cb0a20deef302336e
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout 1d109ada10e82c324682792cb0a20deef302336e
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/pxp/intel_pxp.c: In function 'i915_pxp_ops_ioctl':
>> drivers/gpu/drm/i915/pxp/intel_pxp.c:26:32: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
26 | if (copy_from_user(&pxp_info, (void __user *)pxp_ops->pxp_info_ptr, sizeof(pxp_info)) != 0) {
| ^
drivers/gpu/drm/i915/pxp/intel_pxp.c:65:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
65 | if (copy_to_user((void __user *)pxp_ops->pxp_info_ptr, &pxp_info, sizeof(pxp_info)) != 0)
| ^
vim +26 drivers/gpu/drm/i915/pxp/intel_pxp.c
10
11 int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile)
12 {
13 int ret;
14 struct pxp_info pxp_info = {0};
15 struct drm_i915_pxp_ops *pxp_ops = data;
16 struct drm_i915_private *i915 = to_i915(dev);
17
18 drm_dbg(&i915->drm, ">>> %s\n", __func__);
19
20 if (!i915 || !drmfile || !pxp_ops || pxp_ops->pxp_info_size != sizeof(pxp_info)) {
21 drm_dbg(&i915->drm, "Failed to %s, invalid params\n", __func__);
22 ret = -EINVAL;
23 goto end;
24 }
25
> 26 if (copy_from_user(&pxp_info, (void __user *)pxp_ops->pxp_info_ptr, sizeof(pxp_info)) != 0) {
27 ret = -EFAULT;
28 goto end;
29 }
30
31 drm_dbg(&i915->drm, "i915 pxp ioctl call with action=[%d]\n", pxp_info.action);
32
33 mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
34
35 if (i915->pxp.r0ctx->global_state_in_suspend) {
36 drm_dbg(&i915->drm, "Return failure due to state in suspend\n");
37 pxp_info.sm_status = PXP_SM_STATUS_SESSION_NOT_AVAILABLE;
38 ret = 0;
39 goto end;
40 }
41
42 if (i915->pxp.r0ctx->global_state_attacked) {
43 drm_dbg(&i915->drm, "Retry required due to state attacked\n");
44 pxp_info.sm_status = PXP_SM_STATUS_RETRY_REQUIRED;
45 ret = 0;
46 goto end;
47 }
48
49 switch (pxp_info.action) {
50 case PXP_ACTION_SET_R3_CONTEXT:
51 {
52 ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx);
53 break;
54 }
55 default:
56 drm_dbg(&i915->drm, "Failed to %s due to bad params\n", __func__);
57 ret = -EINVAL;
58 goto end;
59 }
60
61 end:
62 mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
63
64 if (ret == 0)
65 if (copy_to_user((void __user *)pxp_ops->pxp_info_ptr, &pxp_info, sizeof(pxp_info)) != 0)
66 ret = -EFAULT;
67
68 if (ret)
69 dev_err(&dev->pdev->dev, "pid=%d, ret = %d\n", task_pid_nr(current), ret);
70
71 drm_dbg(&i915->drm, "<<< %s\n", __func__);
72 return ret;
73 }
74
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 34381 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread* Re: [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context
@ 2020-11-14 4:23 ` kernel test robot
0 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 4:23 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 4313 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: i386-randconfig-a012-20201113 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/1d109ada10e82c324682792cb0a20deef302336e
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout 1d109ada10e82c324682792cb0a20deef302336e
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/pxp/intel_pxp.c: In function 'i915_pxp_ops_ioctl':
>> drivers/gpu/drm/i915/pxp/intel_pxp.c:26:32: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
26 | if (copy_from_user(&pxp_info, (void __user *)pxp_ops->pxp_info_ptr, sizeof(pxp_info)) != 0) {
| ^
drivers/gpu/drm/i915/pxp/intel_pxp.c:65:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
65 | if (copy_to_user((void __user *)pxp_ops->pxp_info_ptr, &pxp_info, sizeof(pxp_info)) != 0)
| ^
vim +26 drivers/gpu/drm/i915/pxp/intel_pxp.c
10
11 int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile)
12 {
13 int ret;
14 struct pxp_info pxp_info = {0};
15 struct drm_i915_pxp_ops *pxp_ops = data;
16 struct drm_i915_private *i915 = to_i915(dev);
17
18 drm_dbg(&i915->drm, ">>> %s\n", __func__);
19
20 if (!i915 || !drmfile || !pxp_ops || pxp_ops->pxp_info_size != sizeof(pxp_info)) {
21 drm_dbg(&i915->drm, "Failed to %s, invalid params\n", __func__);
22 ret = -EINVAL;
23 goto end;
24 }
25
> 26 if (copy_from_user(&pxp_info, (void __user *)pxp_ops->pxp_info_ptr, sizeof(pxp_info)) != 0) {
27 ret = -EFAULT;
28 goto end;
29 }
30
31 drm_dbg(&i915->drm, "i915 pxp ioctl call with action=[%d]\n", pxp_info.action);
32
33 mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
34
35 if (i915->pxp.r0ctx->global_state_in_suspend) {
36 drm_dbg(&i915->drm, "Return failure due to state in suspend\n");
37 pxp_info.sm_status = PXP_SM_STATUS_SESSION_NOT_AVAILABLE;
38 ret = 0;
39 goto end;
40 }
41
42 if (i915->pxp.r0ctx->global_state_attacked) {
43 drm_dbg(&i915->drm, "Retry required due to state attacked\n");
44 pxp_info.sm_status = PXP_SM_STATUS_RETRY_REQUIRED;
45 ret = 0;
46 goto end;
47 }
48
49 switch (pxp_info.action) {
50 case PXP_ACTION_SET_R3_CONTEXT:
51 {
52 ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx);
53 break;
54 }
55 default:
56 drm_dbg(&i915->drm, "Failed to %s due to bad params\n", __func__);
57 ret = -EINVAL;
58 goto end;
59 }
60
61 end:
62 mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
63
64 if (ret == 0)
65 if (copy_to_user((void __user *)pxp_ops->pxp_info_ptr, &pxp_info, sizeof(pxp_info)) != 0)
66 ret = -EFAULT;
67
68 if (ret)
69 dev_err(&dev->pdev->dev, "pid=%d, ret = %d\n", task_pid_nr(current), ret);
70
71 drm_dbg(&i915->drm, "<<< %s\n", __func__);
72 return ret;
73 }
74
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 34381 bytes --]
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context
2020-11-14 1:45 ` [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context Sean Z Huang
2020-11-14 4:23 ` kernel test robot
@ 2020-11-16 9:46 ` Dan Carpenter
1 sibling, 0 replies; 48+ messages in thread
From: Dan Carpenter @ 2020-11-16 9:46 UTC (permalink / raw)
To: kbuild, Sean Z Huang, Intel-gfx; +Cc: Huang, Sean Z, kbuild-all, Dan Carpenter
[-- Attachment #1: Type: text/plain, Size: 5905 bytes --]
Hi Sean,
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: i386-randconfig-m021-20201115 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
drivers/gpu/drm/i915/pxp/intel_pxp.c:62 i915_pxp_ops_ioctl() error: we previously assumed 'i915' could be null (see line 20)
vim +/i915 +62 drivers/gpu/drm/i915/pxp/intel_pxp.c
1d109ada10e82c3 Huang, Sean Z 2020-11-13 11 int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 12 {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 13 int ret;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 14 struct pxp_info pxp_info = {0};
1d109ada10e82c3 Huang, Sean Z 2020-11-13 15 struct drm_i915_pxp_ops *pxp_ops = data;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 16 struct drm_i915_private *i915 = to_i915(dev);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 17
1d109ada10e82c3 Huang, Sean Z 2020-11-13 18 drm_dbg(&i915->drm, ">>> %s\n", __func__);
^^^^^^^^^
If "i915" is NULL then this will crash.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 19
1d109ada10e82c3 Huang, Sean Z 2020-11-13 @20 if (!i915 || !drmfile || !pxp_ops || pxp_ops->pxp_info_size != sizeof(pxp_info)) {
^^^^
Check too late.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 21 drm_dbg(&i915->drm, "Failed to %s, invalid params\n", __func__);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 22 ret = -EINVAL;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 23 goto end;
This will unlock a lock that we are not holding. This should just
"return -EINVAL;". All the stuff at "goto end;" is pointless or buggy.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 24 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 25
1d109ada10e82c3 Huang, Sean Z 2020-11-13 26 if (copy_from_user(&pxp_info, (void __user *)pxp_ops->pxp_info_ptr, sizeof(pxp_info)) != 0) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 27 ret = -EFAULT;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 28 goto end;
^^^^^^^^
This will unlock. Same. Just return -EFAULT;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 29 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 30
1d109ada10e82c3 Huang, Sean Z 2020-11-13 31 drm_dbg(&i915->drm, "i915 pxp ioctl call with action=[%d]\n", pxp_info.action);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 32
1d109ada10e82c3 Huang, Sean Z 2020-11-13 33 mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 34
1d109ada10e82c3 Huang, Sean Z 2020-11-13 35 if (i915->pxp.r0ctx->global_state_in_suspend) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 36 drm_dbg(&i915->drm, "Return failure due to state in suspend\n");
1d109ada10e82c3 Huang, Sean Z 2020-11-13 37 pxp_info.sm_status = PXP_SM_STATUS_SESSION_NOT_AVAILABLE;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 38 ret = 0;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 39 goto end;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 40 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 41
1d109ada10e82c3 Huang, Sean Z 2020-11-13 42 if (i915->pxp.r0ctx->global_state_attacked) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 43 drm_dbg(&i915->drm, "Retry required due to state attacked\n");
1d109ada10e82c3 Huang, Sean Z 2020-11-13 44 pxp_info.sm_status = PXP_SM_STATUS_RETRY_REQUIRED;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 45 ret = 0;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 46 goto end;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 47 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 48
1d109ada10e82c3 Huang, Sean Z 2020-11-13 49 switch (pxp_info.action) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 50 case PXP_ACTION_SET_R3_CONTEXT:
1d109ada10e82c3 Huang, Sean Z 2020-11-13 51 {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 52 ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 53 break;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 54 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 55 default:
1d109ada10e82c3 Huang, Sean Z 2020-11-13 56 drm_dbg(&i915->drm, "Failed to %s due to bad params\n", __func__);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 57 ret = -EINVAL;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 58 goto end;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 59 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 60
1d109ada10e82c3 Huang, Sean Z 2020-11-13 61 end:
1d109ada10e82c3 Huang, Sean Z 2020-11-13 @62 mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1d109ada10e82c3 Huang, Sean Z 2020-11-13 63
1d109ada10e82c3 Huang, Sean Z 2020-11-13 64 if (ret == 0)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 65 if (copy_to_user((void __user *)pxp_ops->pxp_info_ptr, &pxp_info, sizeof(pxp_info)) != 0)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 66 ret = -EFAULT;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 67
1d109ada10e82c3 Huang, Sean Z 2020-11-13 68 if (ret)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 69 dev_err(&dev->pdev->dev, "pid=%d, ret = %d\n", task_pid_nr(current), ret);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 70
1d109ada10e82c3 Huang, Sean Z 2020-11-13 71 drm_dbg(&i915->drm, "<<< %s\n", __func__);
Delete this printk() and use ftrace for this information.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 72 return ret;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 73 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 46446 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread* Re: [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context
@ 2020-11-16 9:46 ` Dan Carpenter
0 siblings, 0 replies; 48+ messages in thread
From: Dan Carpenter @ 2020-11-16 9:46 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 6006 bytes --]
Hi Sean,
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: i386-randconfig-m021-20201115 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
drivers/gpu/drm/i915/pxp/intel_pxp.c:62 i915_pxp_ops_ioctl() error: we previously assumed 'i915' could be null (see line 20)
vim +/i915 +62 drivers/gpu/drm/i915/pxp/intel_pxp.c
1d109ada10e82c3 Huang, Sean Z 2020-11-13 11 int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 12 {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 13 int ret;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 14 struct pxp_info pxp_info = {0};
1d109ada10e82c3 Huang, Sean Z 2020-11-13 15 struct drm_i915_pxp_ops *pxp_ops = data;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 16 struct drm_i915_private *i915 = to_i915(dev);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 17
1d109ada10e82c3 Huang, Sean Z 2020-11-13 18 drm_dbg(&i915->drm, ">>> %s\n", __func__);
^^^^^^^^^
If "i915" is NULL then this will crash.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 19
1d109ada10e82c3 Huang, Sean Z 2020-11-13 @20 if (!i915 || !drmfile || !pxp_ops || pxp_ops->pxp_info_size != sizeof(pxp_info)) {
^^^^
Check too late.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 21 drm_dbg(&i915->drm, "Failed to %s, invalid params\n", __func__);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 22 ret = -EINVAL;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 23 goto end;
This will unlock a lock that we are not holding. This should just
"return -EINVAL;". All the stuff at "goto end;" is pointless or buggy.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 24 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 25
1d109ada10e82c3 Huang, Sean Z 2020-11-13 26 if (copy_from_user(&pxp_info, (void __user *)pxp_ops->pxp_info_ptr, sizeof(pxp_info)) != 0) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 27 ret = -EFAULT;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 28 goto end;
^^^^^^^^
This will unlock. Same. Just return -EFAULT;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 29 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 30
1d109ada10e82c3 Huang, Sean Z 2020-11-13 31 drm_dbg(&i915->drm, "i915 pxp ioctl call with action=[%d]\n", pxp_info.action);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 32
1d109ada10e82c3 Huang, Sean Z 2020-11-13 33 mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 34
1d109ada10e82c3 Huang, Sean Z 2020-11-13 35 if (i915->pxp.r0ctx->global_state_in_suspend) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 36 drm_dbg(&i915->drm, "Return failure due to state in suspend\n");
1d109ada10e82c3 Huang, Sean Z 2020-11-13 37 pxp_info.sm_status = PXP_SM_STATUS_SESSION_NOT_AVAILABLE;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 38 ret = 0;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 39 goto end;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 40 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 41
1d109ada10e82c3 Huang, Sean Z 2020-11-13 42 if (i915->pxp.r0ctx->global_state_attacked) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 43 drm_dbg(&i915->drm, "Retry required due to state attacked\n");
1d109ada10e82c3 Huang, Sean Z 2020-11-13 44 pxp_info.sm_status = PXP_SM_STATUS_RETRY_REQUIRED;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 45 ret = 0;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 46 goto end;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 47 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 48
1d109ada10e82c3 Huang, Sean Z 2020-11-13 49 switch (pxp_info.action) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 50 case PXP_ACTION_SET_R3_CONTEXT:
1d109ada10e82c3 Huang, Sean Z 2020-11-13 51 {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 52 ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 53 break;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 54 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 55 default:
1d109ada10e82c3 Huang, Sean Z 2020-11-13 56 drm_dbg(&i915->drm, "Failed to %s due to bad params\n", __func__);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 57 ret = -EINVAL;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 58 goto end;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 59 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 60
1d109ada10e82c3 Huang, Sean Z 2020-11-13 61 end:
1d109ada10e82c3 Huang, Sean Z 2020-11-13 @62 mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1d109ada10e82c3 Huang, Sean Z 2020-11-13 63
1d109ada10e82c3 Huang, Sean Z 2020-11-13 64 if (ret == 0)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 65 if (copy_to_user((void __user *)pxp_ops->pxp_info_ptr, &pxp_info, sizeof(pxp_info)) != 0)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 66 ret = -EFAULT;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 67
1d109ada10e82c3 Huang, Sean Z 2020-11-13 68 if (ret)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 69 dev_err(&dev->pdev->dev, "pid=%d, ret = %d\n", task_pid_nr(current), ret);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 70
1d109ada10e82c3 Huang, Sean Z 2020-11-13 71 drm_dbg(&i915->drm, "<<< %s\n", __func__);
Delete this printk() and use ftrace for this information.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 72 return ret;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 73 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 46446 bytes --]
^ permalink raw reply [flat|nested] 48+ messages in thread* Re: [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context
@ 2020-11-16 9:46 ` Dan Carpenter
0 siblings, 0 replies; 48+ messages in thread
From: Dan Carpenter @ 2020-11-16 9:46 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 6006 bytes --]
Hi Sean,
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: i386-randconfig-m021-20201115 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
drivers/gpu/drm/i915/pxp/intel_pxp.c:62 i915_pxp_ops_ioctl() error: we previously assumed 'i915' could be null (see line 20)
vim +/i915 +62 drivers/gpu/drm/i915/pxp/intel_pxp.c
1d109ada10e82c3 Huang, Sean Z 2020-11-13 11 int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 12 {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 13 int ret;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 14 struct pxp_info pxp_info = {0};
1d109ada10e82c3 Huang, Sean Z 2020-11-13 15 struct drm_i915_pxp_ops *pxp_ops = data;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 16 struct drm_i915_private *i915 = to_i915(dev);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 17
1d109ada10e82c3 Huang, Sean Z 2020-11-13 18 drm_dbg(&i915->drm, ">>> %s\n", __func__);
^^^^^^^^^
If "i915" is NULL then this will crash.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 19
1d109ada10e82c3 Huang, Sean Z 2020-11-13 @20 if (!i915 || !drmfile || !pxp_ops || pxp_ops->pxp_info_size != sizeof(pxp_info)) {
^^^^
Check too late.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 21 drm_dbg(&i915->drm, "Failed to %s, invalid params\n", __func__);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 22 ret = -EINVAL;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 23 goto end;
This will unlock a lock that we are not holding. This should just
"return -EINVAL;". All the stuff at "goto end;" is pointless or buggy.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 24 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 25
1d109ada10e82c3 Huang, Sean Z 2020-11-13 26 if (copy_from_user(&pxp_info, (void __user *)pxp_ops->pxp_info_ptr, sizeof(pxp_info)) != 0) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 27 ret = -EFAULT;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 28 goto end;
^^^^^^^^
This will unlock. Same. Just return -EFAULT;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 29 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 30
1d109ada10e82c3 Huang, Sean Z 2020-11-13 31 drm_dbg(&i915->drm, "i915 pxp ioctl call with action=[%d]\n", pxp_info.action);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 32
1d109ada10e82c3 Huang, Sean Z 2020-11-13 33 mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 34
1d109ada10e82c3 Huang, Sean Z 2020-11-13 35 if (i915->pxp.r0ctx->global_state_in_suspend) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 36 drm_dbg(&i915->drm, "Return failure due to state in suspend\n");
1d109ada10e82c3 Huang, Sean Z 2020-11-13 37 pxp_info.sm_status = PXP_SM_STATUS_SESSION_NOT_AVAILABLE;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 38 ret = 0;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 39 goto end;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 40 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 41
1d109ada10e82c3 Huang, Sean Z 2020-11-13 42 if (i915->pxp.r0ctx->global_state_attacked) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 43 drm_dbg(&i915->drm, "Retry required due to state attacked\n");
1d109ada10e82c3 Huang, Sean Z 2020-11-13 44 pxp_info.sm_status = PXP_SM_STATUS_RETRY_REQUIRED;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 45 ret = 0;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 46 goto end;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 47 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 48
1d109ada10e82c3 Huang, Sean Z 2020-11-13 49 switch (pxp_info.action) {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 50 case PXP_ACTION_SET_R3_CONTEXT:
1d109ada10e82c3 Huang, Sean Z 2020-11-13 51 {
1d109ada10e82c3 Huang, Sean Z 2020-11-13 52 ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 53 break;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 54 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 55 default:
1d109ada10e82c3 Huang, Sean Z 2020-11-13 56 drm_dbg(&i915->drm, "Failed to %s due to bad params\n", __func__);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 57 ret = -EINVAL;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 58 goto end;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 59 }
1d109ada10e82c3 Huang, Sean Z 2020-11-13 60
1d109ada10e82c3 Huang, Sean Z 2020-11-13 61 end:
1d109ada10e82c3 Huang, Sean Z 2020-11-13 @62 mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1d109ada10e82c3 Huang, Sean Z 2020-11-13 63
1d109ada10e82c3 Huang, Sean Z 2020-11-13 64 if (ret == 0)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 65 if (copy_to_user((void __user *)pxp_ops->pxp_info_ptr, &pxp_info, sizeof(pxp_info)) != 0)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 66 ret = -EFAULT;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 67
1d109ada10e82c3 Huang, Sean Z 2020-11-13 68 if (ret)
1d109ada10e82c3 Huang, Sean Z 2020-11-13 69 dev_err(&dev->pdev->dev, "pid=%d, ret = %d\n", task_pid_nr(current), ret);
1d109ada10e82c3 Huang, Sean Z 2020-11-13 70
1d109ada10e82c3 Huang, Sean Z 2020-11-13 71 drm_dbg(&i915->drm, "<<< %s\n", __func__);
Delete this printk() and use ftrace for this information.
1d109ada10e82c3 Huang, Sean Z 2020-11-13 72 return ret;
1d109ada10e82c3 Huang, Sean Z 2020-11-13 73 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 46446 bytes --]
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] [PATCH 06/27] drm/i915: Rename the whitelist to allowlist
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (3 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 05/27] drm/i915/pxp: Enable ioctl action to set the ring3 context Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 07/27] drm/i915/pxp: Add PXP-related registers into allowlist Sean Z Huang
` (21 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Rename the whitelist to allowlist as suggested
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 1c14a07eba7d..c9ef0025c60e 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1989,12 +1989,12 @@ void intel_uncore_fini_mmio(struct intel_uncore *uncore)
uncore_mmio_cleanup(uncore);
}
-static const struct reg_whitelist {
+static const struct reg_allowlist {
i915_reg_t offset_ldw;
i915_reg_t offset_udw;
u16 gen_mask;
u8 size;
-} reg_read_whitelist[] = { {
+} reg_read_allowlist[] = { {
.offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
.gen_mask = INTEL_GEN_MASK(4, 12),
@@ -2007,14 +2007,14 @@ int i915_reg_read_ioctl(struct drm_device *dev,
struct drm_i915_private *i915 = to_i915(dev);
struct intel_uncore *uncore = &i915->uncore;
struct drm_i915_reg_read *reg = data;
- struct reg_whitelist const *entry;
+ struct reg_allowlist const *entry;
intel_wakeref_t wakeref;
unsigned int flags;
int remain;
int ret = 0;
- entry = reg_read_whitelist;
- remain = ARRAY_SIZE(reg_read_whitelist);
+ entry = reg_read_allowlist;
+ remain = ARRAY_SIZE(reg_read_allowlist);
while (remain) {
u32 entry_offset = i915_mmio_reg_offset(entry->offset_ldw);
--
2.17.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 07/27] drm/i915/pxp: Add PXP-related registers into allowlist
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (4 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 06/27] drm/i915: Rename the whitelist to allowlist Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Sean Z Huang
` (20 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Add several PXP-related reg into allowlist to allow
ring3 driver to read the those register values.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 8 ++++
drivers/gpu/drm/i915/intel_uncore.c | 57 +++++++++++++++++++++--------
2 files changed, 50 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index faf6b06145fa..5c51c9df8b28 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -12419,4 +12419,12 @@ enum skl_power_gate {
#define TGL_ROOT_DEVICE_SKU_ULX 0x2
#define TGL_ROOT_DEVICE_SKU_ULT 0x4
+/* Registers for passlist check */
+#define PXP_REG_01_LOWERBOUND _MMIO(0x32260)
+#define PXP_REG_01_UPPERBOUND _MMIO(0x32268)
+#define PXP_REG_02_LOWERBOUND _MMIO(0x32670)
+#define PXP_REG_02_UPPERBOUND _MMIO(0x32678)
+#define PXP_REG_03_LOWERBOUND _MMIO(0x32860)
+#define PXP_REG_03_UPPERBOUND _MMIO(0x32c7c)
+
#endif /* _I915_REG_H_ */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index c9ef0025c60e..670856e095c4 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1990,16 +1990,41 @@ void intel_uncore_fini_mmio(struct intel_uncore *uncore)
}
static const struct reg_allowlist {
- i915_reg_t offset_ldw;
+ i915_reg_t offset_ldw_lowerbound;
+ i915_reg_t offset_ldw_upperbound;
i915_reg_t offset_udw;
u16 gen_mask;
u8 size;
-} reg_read_allowlist[] = { {
- .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
+} reg_read_allowlist[] = {
+ {
+ .offset_ldw_lowerbound = RING_TIMESTAMP(RENDER_RING_BASE),
+ .offset_ldw_upperbound = RING_TIMESTAMP(RENDER_RING_BASE),
.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
.gen_mask = INTEL_GEN_MASK(4, 12),
.size = 8
-} };
+ },
+ {
+ .offset_ldw_lowerbound = PXP_REG_01_LOWERBOUND,
+ .offset_ldw_upperbound = PXP_REG_01_UPPERBOUND,
+ .offset_udw = {0},
+ .gen_mask = INTEL_GEN_MASK(4, 12),
+ .size = 4
+ },
+ {
+ .offset_ldw_lowerbound = PXP_REG_02_LOWERBOUND,
+ .offset_ldw_upperbound = PXP_REG_02_UPPERBOUND,
+ .offset_udw = {0},
+ .gen_mask = INTEL_GEN_MASK(4, 12),
+ .size = 4
+ },
+ {
+ .offset_ldw_lowerbound = PXP_REG_03_LOWERBOUND,
+ .offset_ldw_upperbound = PXP_REG_03_UPPERBOUND,
+ .offset_udw = {0},
+ .gen_mask = INTEL_GEN_MASK(4, 12),
+ .size = 4
+ }
+};
int i915_reg_read_ioctl(struct drm_device *dev,
void *data, struct drm_file *file)
@@ -2012,18 +2037,22 @@ int i915_reg_read_ioctl(struct drm_device *dev,
unsigned int flags;
int remain;
int ret = 0;
+ i915_reg_t offset_ldw;
entry = reg_read_allowlist;
remain = ARRAY_SIZE(reg_read_allowlist);
while (remain) {
- u32 entry_offset = i915_mmio_reg_offset(entry->offset_ldw);
+ u32 entry_offset_lb = i915_mmio_reg_offset(entry->offset_ldw_lowerbound);
+ u32 entry_offset_ub = i915_mmio_reg_offset(entry->offset_ldw_upperbound);
GEM_BUG_ON(!is_power_of_2(entry->size));
GEM_BUG_ON(entry->size > 8);
- GEM_BUG_ON(entry_offset & (entry->size - 1));
+ GEM_BUG_ON(entry_offset_lb & (entry->size - 1));
+ GEM_BUG_ON(entry_offset_ub & (entry->size - 1));
if (INTEL_INFO(i915)->gen_mask & entry->gen_mask &&
- entry_offset == (reg->offset & -entry->size))
+ entry_offset_lb <= (reg->offset & -entry->size) &&
+ (reg->offset & -entry->size) <= entry_offset_ub)
break;
entry++;
remain--;
@@ -2033,23 +2062,21 @@ int i915_reg_read_ioctl(struct drm_device *dev,
return -EINVAL;
flags = reg->offset & (entry->size - 1);
+ offset_ldw = _MMIO(reg->offset - flags);
with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
if (entry->size == 8 && flags == I915_REG_READ_8B_WA)
reg->val = intel_uncore_read64_2x32(uncore,
- entry->offset_ldw,
+ offset_ldw,
entry->offset_udw);
else if (entry->size == 8 && flags == 0)
- reg->val = intel_uncore_read64(uncore,
- entry->offset_ldw);
+ reg->val = intel_uncore_read64(uncore, offset_ldw);
else if (entry->size == 4 && flags == 0)
- reg->val = intel_uncore_read(uncore, entry->offset_ldw);
+ reg->val = intel_uncore_read(uncore, offset_ldw);
else if (entry->size == 2 && flags == 0)
- reg->val = intel_uncore_read16(uncore,
- entry->offset_ldw);
+ reg->val = intel_uncore_read16(uncore, offset_ldw);
else if (entry->size == 1 && flags == 0)
- reg->val = intel_uncore_read8(uncore,
- entry->offset_ldw);
+ reg->val = intel_uncore_read8(uncore, offset_ldw);
else
ret = -EINVAL;
}
--
2.17.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (5 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 07/27] drm/i915/pxp: Add PXP-related registers into allowlist Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 5:04 ` kernel test robot
` (2 more replies)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 09/27] drm/i915/pxp: Implement funcs to get/set PXP tag Sean Z Huang
` (19 subsequent siblings)
26 siblings, 3 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Implement the functions to check the hardware protected session
state via reading the hardware register session in play.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 +
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 189 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 51 +++++++
3 files changed, 243 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 21a6964fc64e..95d3deba7ade 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -12,6 +12,9 @@
#define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2)
#define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3)
+#define pxp_session_list(i915, session_type) (((session_type) == SESSION_TYPE_TYPE0) ? \
+ &(i915)->pxp.r0ctx->active_pxp_type0_sessions : &(i915)->pxp.r0ctx->active_pxp_type1_sessions)
+
#define MAX_TYPE0_SESSIONS 16
#define MAX_TYPE1_SESSIONS 6
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 75e4b229d9f8..3dd5a9e3926b 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -10,6 +10,25 @@
#include "intel_pxp_sm.h"
#include "intel_pxp_context.h"
+int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
+{
+ intel_wakeref_t wakeref;
+ int err = 0;
+
+ if (!i915 || !regval) {
+ err = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s bad params\n", __func__);
+ goto end;
+ }
+
+ with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
+ i915_reg_t reg_offset = {offset};
+ *regval = intel_uncore_read(&i915->uncore, reg_offset);
+ }
+end:
+ return err;
+}
+
static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
{
intel_wakeref_t wakeref;
@@ -30,6 +49,176 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
return err;
}
+/**
+ * is_sw_session_active - Check if the given sw session id is active.
+ * @i915: i915 device handle.
+ * @session_type: Specified session type
+ * @session_index: Numeric session identifier.
+ * @is_in_play: Set false to return true if the specified session is active.
+ * Set true to also check if the session is active and in_play.
+ * @protection_mode: get the protection mode of specified session.
+ *
+ * The caller needs to use ctx_mutex lock to protect the session_list
+ * inside this function.
+ *
+ * Return : true if session with the same identifier is active (and in_play).
+ */
+static bool is_sw_session_active(struct drm_i915_private *i915, int session_type,
+ int session_index, bool is_in_play, int *protection_mode)
+{
+ struct pxp_protected_session *current_session;
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ list_for_each_entry(current_session, pxp_session_list(i915, session_type), session_list) {
+ if (current_session->session_index == session_index) {
+ if (protection_mode)
+ *protection_mode = current_session->protection_mode;
+
+ if (is_in_play && !current_session->session_is_in_play)
+ return false;
+
+ return true;
+ }
+ }
+
+ /* session id not found. return false */
+ return false;
+}
+
+static bool is_hw_type0_session_in_play(struct drm_i915_private *i915, int session_index)
+{
+ u32 regval_sip = 0;
+ u32 reg_session_id_mask;
+ bool hw_session_is_in_play = false;
+ int ret = 0;
+
+ if (!i915 || session_index < 0 || session_index >= MAX_TYPE0_SESSIONS) {
+ drm_dbg(&i915->drm, "Failed to %s due to invalid params", __func__);
+ goto end;
+ }
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_SIP.reg, ®val_sip);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to read()\n");
+ goto end;
+ }
+
+ reg_session_id_mask = (1 << session_index);
+ hw_session_is_in_play = (bool)(regval_sip & reg_session_id_mask);
+end:
+ return hw_session_is_in_play;
+}
+
+static bool is_hw_type1_session_in_play(struct drm_i915_private *i915, int session_index)
+{
+ int ret = 0;
+ u32 regval_tsip_low = 0;
+ u32 regval_tsip_high = 0;
+ u64 reg_session_id_mask;
+ u64 regval_tsip;
+ bool hw_session_is_in_play = false;
+
+ if (!i915 || session_index < 0 || session_index >= MAX_TYPE1_SESSIONS) {
+ drm_dbg(&i915->drm, "Failed to %s due to invalid params", __func__);
+ goto end;
+ }
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_LOW.reg, ®val_tsip_low);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read()\n");
+ goto end;
+ }
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_HIGH.reg, ®val_tsip_high);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read()\n");
+ goto end;
+ }
+
+ reg_session_id_mask = (1 << session_index);
+ regval_tsip = ((u64)regval_tsip_high << 32) | regval_tsip_low;
+ hw_session_is_in_play = (bool)(regval_tsip & reg_session_id_mask);
+end:
+ return hw_session_is_in_play;
+}
+
+static bool is_hw_session_in_play(struct drm_i915_private *i915,
+ int session_type, int session_index)
+{
+ bool is_in_play = false;
+
+ if (session_type == SESSION_TYPE_TYPE0)
+ is_in_play = is_hw_type0_session_in_play(i915, session_index);
+ else if (session_type == SESSION_TYPE_TYPE1)
+ is_in_play = is_hw_type1_session_in_play(i915, session_index);
+ else
+ drm_dbg(&i915->drm, "Failed to %s invalid session_type=[%d]\n", __func__, session_type);
+
+ return is_in_play;
+}
+
+/* check hw session in play reg if match the current sw state */
+static int sync_hw_sw_state(struct drm_i915_private *i915, int session_index, int session_type)
+{
+ const int max_retry = 10;
+ const int ms_delay = 10;
+ int retry = 0;
+ int ret;
+
+ if (!i915 || session_type >= SESSION_TYPE_MAX) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ ret = -EINVAL;
+ for (retry = 0; retry < max_retry; retry++) {
+ if (is_hw_session_in_play(i915, session_type, session_index) ==
+ is_sw_session_active(i915, session_type, session_index, true, NULL)) {
+ ret = 0;
+ break;
+ }
+
+ msleep(ms_delay);
+ }
+end:
+ return ret;
+}
+
+/**
+ * check_if_protected_type0_sessions_are_attacked - To check if type0 active sessions are attacked.
+ * @i915: i915 device handle.
+ *
+ * Return: true if HW shows protected sessions are attacked, false otherwise.
+ */
+static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915)
+{
+ i915_reg_t kcr_status_reg = KCR_STATUS_1;
+ u32 reg_value = 0;
+ u32 mask = 0x80000000;
+ int ret;
+
+ if (!i915) {
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ if (i915->pxp.r0ctx->global_state_attacked)
+ return true;
+
+ ret = pxp_sm_reg_read(i915, kcr_status_reg.reg, ®_value);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read\n");
+ goto end;
+ }
+
+ if (reg_value & mask)
+ return true;
+end:
+ return false;
+}
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
{
int ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index 59ce2394b590..a3149c18c831 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -14,6 +14,57 @@
/* Setting KCR Init bit is required after system boot */
#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) << KCR_INIT_MASK_SHIFT))
+#define KCR_STATUS_1 _MMIO(0x320f4)
+#define GEN12_KCR_SIP _MMIO(0x32260) /* KCR type0 session in play 0-31 */
+#define GEN12_KCR_TSIP_LOW _MMIO(0x32264) /* KCR type1 session in play 0-31 */
+#define GEN12_KCR_TSIP_HIGH _MMIO(0x32268) /* KCR type1 session in play 32-63 */
+
+enum pxp_session_types {
+ SESSION_TYPE_TYPE0 = 0,
+ SESSION_TYPE_TYPE1 = 1,
+
+ SESSION_TYPE_MAX
+};
+
+enum pxp_protection_modes {
+ PROTECTION_MODE_NONE = 0,
+ PROTECTION_MODE_LM = 2,
+ PROTECTION_MODE_HM = 3,
+ PROTECTION_MODE_SM = 6,
+
+ PROTECTION_MODE_ALL
+};
+
+/**
+ * struct pxp_protected_session - linked list to track all active sessions.
+ */
+struct pxp_protected_session {
+ /** @session_list: linked list infrastructure, do not change its order. */
+ struct list_head session_list;
+
+ /** @session_index: Numeric identifier for this protected session */
+ int session_index;
+ /** @session_type: Type of session */
+ int session_type;
+ /** @protection_mode: mode of protection requested */
+ int protection_mode;
+ /** @context_id: context identifier of the protected session requestor */
+ int context_id;
+ /** @pid: pid of this session's creator */
+ int pid;
+ /** @drmfile: pointer to drm_file, which is allocated on device file open() call */
+ struct drm_file *drmfile;
+
+ /**
+ * @session_is_in_play: indicates whether the session has been established
+ * in the HW root of trust if this flag is false, it
+ * indicates an application has reserved this session,
+ * but has not * established the session in the
+ * hardware yet.
+ */
+ bool session_is_in_play;
+};
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* Re: [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
2020-11-14 1:45 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Sean Z Huang
@ 2020-11-14 5:04 ` kernel test robot
2020-11-14 5:04 ` kernel test robot
2020-11-14 5:14 ` kernel test robot
2 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 5:04 UTC (permalink / raw)
To: Sean Z Huang, Intel-gfx; +Cc: Huang, Sean Z, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 1724 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: i386-randconfig-s001-20201114 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-107-gaf3512a6-dirty
# https://github.com/0day-ci/linux/commit/c0c82470e52f95847f54cd65e470ba01a13d71ab
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout c0c82470e52f95847f54cd65e470ba01a13d71ab
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
"sparse warnings: (new ones prefixed by >>)"
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:5: sparse: sparse: symbol 'pxp_sm_reg_read' was not declared. Should it be static?
Please review and possibly fold the followup patch.
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 27612 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread* [Intel-gfx] [RFC PATCH] drm/i915/pxp: pxp_sm_reg_read() can be static
2020-11-14 1:45 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Sean Z Huang
@ 2020-11-14 5:04 ` kernel test robot
2020-11-14 5:04 ` kernel test robot
2020-11-14 5:14 ` kernel test robot
2 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 5:04 UTC (permalink / raw)
To: Sean Z Huang, Intel-gfx; +Cc: Huang, Sean Z, kbuild-all
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
---
intel_pxp_sm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 3dd5a9e3926ba4..7f5c47ee452d61 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -10,7 +10,7 @@
#include "intel_pxp_sm.h"
#include "intel_pxp_context.h"
-int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
+static int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
{
intel_wakeref_t wakeref;
int err = 0;
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [RFC PATCH] drm/i915/pxp: pxp_sm_reg_read() can be static
@ 2020-11-14 5:04 ` kernel test robot
0 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 5:04 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 709 bytes --]
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
---
intel_pxp_sm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 3dd5a9e3926ba4..7f5c47ee452d61 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -10,7 +10,7 @@
#include "intel_pxp_sm.h"
#include "intel_pxp_context.h"
-int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
+static int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
{
intel_wakeref_t wakeref;
int err = 0;
^ permalink raw reply related [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
2020-11-14 1:45 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Sean Z Huang
@ 2020-11-14 5:14 ` kernel test robot
2020-11-14 5:04 ` kernel test robot
2020-11-14 5:14 ` kernel test robot
2 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 5:14 UTC (permalink / raw)
To: Sean Z Huang, Intel-gfx; +Cc: clang-built-linux, Huang, Sean Z, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3398 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: x86_64-randconfig-a004-20201113 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 9a85643cd357e412cff69067bb5c4840e228c2ab)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/c0c82470e52f95847f54cd65e470ba01a13d71ab
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout c0c82470e52f95847f54cd65e470ba01a13d71ab
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:5: warning: no previous prototype for function 'pxp_sm_reg_read' [-Wmissing-prototypes]
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
static
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:162:12: warning: unused function 'sync_hw_sw_state' [-Wunused-function]
static int sync_hw_sw_state(struct drm_i915_private *i915, int session_index, int session_type)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:195:13: warning: unused function 'check_if_protected_type0_sessions_are_attacked' [-Wunused-function]
static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915)
^
3 warnings generated.
vim +/pxp_sm_reg_read +13 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
12
> 13 int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
14 {
15 intel_wakeref_t wakeref;
16 int err = 0;
17
18 if (!i915 || !regval) {
19 err = -EINVAL;
20 drm_dbg(&i915->drm, "Failed to %s bad params\n", __func__);
21 goto end;
22 }
23
24 with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
25 i915_reg_t reg_offset = {offset};
26 *regval = intel_uncore_read(&i915->uncore, reg_offset);
27 }
28 end:
29 return err;
30 }
31
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 35034 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread* Re: [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
@ 2020-11-14 5:14 ` kernel test robot
0 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 5:14 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3473 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: x86_64-randconfig-a004-20201113 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 9a85643cd357e412cff69067bb5c4840e228c2ab)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/c0c82470e52f95847f54cd65e470ba01a13d71ab
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout c0c82470e52f95847f54cd65e470ba01a13d71ab
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:5: warning: no previous prototype for function 'pxp_sm_reg_read' [-Wmissing-prototypes]
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
static
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:162:12: warning: unused function 'sync_hw_sw_state' [-Wunused-function]
static int sync_hw_sw_state(struct drm_i915_private *i915, int session_index, int session_type)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:195:13: warning: unused function 'check_if_protected_type0_sessions_are_attacked' [-Wunused-function]
static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915)
^
3 warnings generated.
vim +/pxp_sm_reg_read +13 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
12
> 13 int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
14 {
15 intel_wakeref_t wakeref;
16 int err = 0;
17
18 if (!i915 || !regval) {
19 err = -EINVAL;
20 drm_dbg(&i915->drm, "Failed to %s bad params\n", __func__);
21 goto end;
22 }
23
24 with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
25 i915_reg_t reg_offset = {offset};
26 *regval = intel_uncore_read(&i915->uncore, reg_offset);
27 }
28 end:
29 return err;
30 }
31
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 35034 bytes --]
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] [PATCH 09/27] drm/i915/pxp: Implement funcs to get/set PXP tag
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (6 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 10/27] drm/i915/pxp: Enable ioctl action to reserve session slot Sean Z Huang
` (18 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Implement the functions to get/set the PXP tag, which is 32-bit
bitwise value containing the hardware session info, such as its
session id, protection mode or whether it's enabled.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 105 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 18 ++++
2 files changed, 123 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 3dd5a9e3926b..fd5d10e71a27 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -49,6 +49,16 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
return err;
}
+static u8 pxp_get_session_id(int session_index, int session_type)
+{
+ u8 session_id = session_index & SESSION_ID_MASK;
+
+ if (session_type == SESSION_TYPE_TYPE1)
+ session_id |= SESSION_TYPE_MASK;
+
+ return session_id;
+}
+
/**
* is_sw_session_active - Check if the given sw session id is active.
* @i915: i915 device handle.
@@ -86,6 +96,101 @@ static bool is_sw_session_active(struct drm_i915_private *i915, int session_type
return false;
}
+static int pxp_set_pxp_tag(struct drm_i915_private *i915, int session_type,
+ int session_idx, int protection_mode)
+{
+ struct pxp_tag *pxp_tag;
+ int ret;
+
+ if (!i915 || session_type >= SESSION_TYPE_MAX) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ if (session_type == SESSION_TYPE_TYPE0 && session_idx < MAX_TYPE0_SESSIONS) {
+ pxp_tag = (struct pxp_tag *)&i915->pxp.r0ctx->type0_session_pxp_tag[session_idx];
+ } else if (session_type == SESSION_TYPE_TYPE1 && session_idx < MAX_TYPE1_SESSIONS) {
+ pxp_tag = (struct pxp_tag *)&i915->pxp.r0ctx->type1_session_pxp_tag[session_idx];
+ } else {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params session_type=[%d], session_idx=[%d]\n",
+ __func__, session_type, session_idx);
+ goto end;
+ }
+
+ switch (protection_mode) {
+ case PROTECTION_MODE_NONE:
+ {
+ pxp_tag->enable = false;
+ pxp_tag->hm = false;
+ pxp_tag->sm = false;
+ break;
+ }
+ case PROTECTION_MODE_LM:
+ {
+ pxp_tag->enable = true;
+ pxp_tag->hm = false;
+ pxp_tag->sm = false;
+ pxp_tag->instance_id++;
+ break;
+ }
+ case PROTECTION_MODE_HM:
+ {
+ pxp_tag->enable = true;
+ pxp_tag->hm = true;
+ pxp_tag->sm = false;
+ pxp_tag->instance_id++;
+ break;
+ }
+ case PROTECTION_MODE_SM:
+ {
+ pxp_tag->enable = true;
+ pxp_tag->hm = true;
+ pxp_tag->sm = true;
+ pxp_tag->instance_id++;
+ break;
+ }
+ default:
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params protection_mode=[%d]\n",
+ __func__, protection_mode);
+ goto end;
+ }
+
+ pxp_tag->session_id = pxp_get_session_id(session_idx, session_type);
+
+ ret = 0;
+end:
+ return ret;
+}
+
+u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx,
+ int session_type, u32 *session_is_alive)
+{
+ struct pxp_tag *pxp_tag;
+
+ if (!i915 || session_type >= SESSION_TYPE_MAX) {
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ return -EINVAL;
+ }
+
+ if (session_type == SESSION_TYPE_TYPE0 && session_idx < MAX_TYPE0_SESSIONS) {
+ pxp_tag = (struct pxp_tag *)&i915->pxp.r0ctx->type0_session_pxp_tag[session_idx];
+ } else if (session_type == SESSION_TYPE_TYPE1 && session_idx < MAX_TYPE1_SESSIONS) {
+ pxp_tag = (struct pxp_tag *)&i915->pxp.r0ctx->type1_session_pxp_tag[session_idx];
+ } else {
+ drm_dbg(&i915->drm, "Failed to %s, bad params session_type=[%d], session_idx=[%d]\n",
+ __func__, session_type, session_idx);
+ return -EINVAL;
+ }
+
+ if (session_is_alive)
+ *session_is_alive = pxp_tag->enable;
+
+ return pxp_tag->value;
+}
+
static bool is_hw_type0_session_in_play(struct drm_i915_private *i915, int session_index)
{
u32 regval_sip = 0;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index a3149c18c831..c1f6b1be3fd1 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -19,6 +19,9 @@
#define GEN12_KCR_TSIP_LOW _MMIO(0x32264) /* KCR type1 session in play 0-31 */
#define GEN12_KCR_TSIP_HIGH _MMIO(0x32268) /* KCR type1 session in play 32-63 */
+#define SESSION_TYPE_MASK BIT(7)
+#define SESSION_ID_MASK (BIT(7) - 1)
+
enum pxp_session_types {
SESSION_TYPE_TYPE0 = 0,
SESSION_TYPE_TYPE1 = 1,
@@ -35,6 +38,21 @@ enum pxp_protection_modes {
PROTECTION_MODE_ALL
};
+struct pxp_tag {
+ union {
+ u32 value;
+ struct {
+ u32 session_id : 8;
+ u32 instance_id : 8;
+ u32 enable : 1;
+ u32 hm : 1;
+ u32 reserved_1 : 1;
+ u32 sm : 1;
+ u32 reserved_2 : 12;
+ };
+ };
+};
+
/**
* struct pxp_protected_session - linked list to track all active sessions.
*/
--
2.17.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 10/27] drm/i915/pxp: Enable ioctl action to reserve session slot
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (7 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 09/27] drm/i915/pxp: Implement funcs to get/set PXP tag Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 11/27] drm/i915/pxp: Enable ioctl action to set session in play Sean Z Huang
` (17 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
With this ioctl action, ring3 driver can reserve a specific
session slot/id assigned by ring0 PXP, as the first step of PXP
session establishment flow. Ring3 PXP stores the session info in
the session list structure.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 20 +++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 24 +++-
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 168 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 3 +
4 files changed, 213 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index a83fa7cd749f..0f684851ecb2 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -47,6 +47,26 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf
}
switch (pxp_info.action) {
+ case PXP_ACTION_SET_SESSION_STATUS:
+ {
+ struct pxp_sm_set_session_status_params *params = &pxp_info.set_session_status;
+
+ if (params->req_session_state == PXP_SM_REQ_SESSION_ID_INIT) {
+ ret = intel_pxp_sm_reserve_session(i915, drmfile, 0,
+ params->session_type,
+ params->session_mode,
+ ¶ms->pxp_tag);
+ if (ret == PXP_SM_STATUS_RETRY_REQUIRED ||
+ ret == PXP_SM_STATUS_SESSION_NOT_AVAILABLE) {
+ pxp_info.sm_status = ret;
+ ret = 0;
+ }
+ } else {
+ ret = -EINVAL;
+ goto end;
+ }
+ break;
+ }
case PXP_ACTION_SET_R3_CONTEXT:
{
ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 95d3deba7ade..cbaf25690596 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -15,6 +15,9 @@
#define pxp_session_list(i915, session_type) (((session_type) == SESSION_TYPE_TYPE0) ? \
&(i915)->pxp.r0ctx->active_pxp_type0_sessions : &(i915)->pxp.r0ctx->active_pxp_type1_sessions)
+#define pxp_session_max(session_type) (((session_type) == SESSION_TYPE_TYPE0) ? \
+ MAX_TYPE0_SESSIONS : MAX_TYPE1_SESSIONS)
+
#define MAX_TYPE0_SESSIONS 16
#define MAX_TYPE1_SESSIONS 6
@@ -27,7 +30,10 @@ enum pxp_sm_session_req {
PXP_SM_REQ_SESSION_TERMINATE
};
-#define PXP_ACTION_SET_R3_CONTEXT 5
+enum pxp_ioctl_action {
+ PXP_ACTION_SET_SESSION_STATUS = 1,
+ PXP_ACTION_SET_R3_CONTEXT = 5,
+};
enum pxp_sm_status {
PXP_SM_STATUS_SUCCESS,
@@ -36,10 +42,24 @@ enum pxp_sm_status {
PXP_SM_STATUS_ERROR_UNKNOWN
};
+struct pxp_sm_set_session_status_params {
+ /** @pxp_tag: in [optional], for Arbitrator session, out pxp tag */
+ u32 pxp_tag;
+ /** @session_type: in, session type */
+ u32 session_type;
+ /** @session_mode: in, session mode */
+ u32 session_mode;
+ /** @req_session_state: in, new session state */
+ u32 req_session_state;
+};
+
struct pxp_info {
u32 action;
u32 sm_status;
- u32 set_r3ctx;
+ union {
+ struct pxp_sm_set_session_status_params set_session_status;
+ u32 set_r3ctx;
+ };
} __packed;
struct pxp_context;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index fd5d10e71a27..62303dc197e2 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -324,6 +324,174 @@ static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_priva
return false;
}
+/**
+ * create_new_session_entry - Create a new session entry with provided info.
+ * @i915: i915 device handle.
+ * @drmfile: pointer to drm_file
+ * @context_id: Numeric identifier of the context created by the caller.
+ * @session_type: Type of the session requested. One of enum pxp_session_types.
+ * @protection_mode: Type of protection requested for the session.
+ * One of the enum pxp_protection_modes.
+ * @session_index: Numeric session identifier.
+ *
+ * Return: status. 0 means creation is successful.
+ */
+static int create_new_session_entry(struct drm_i915_private *i915, struct drm_file *drmfile,
+ int context_id, int session_type, int protection_mode,
+ int session_index)
+{
+ int ret;
+ struct pxp_protected_session *new_session = NULL;
+ int pid = 0;
+
+ if (drmfile)
+ pid = pid_nr(drmfile->pid);
+
+ drm_dbg(&i915->drm, ">>> %s context_id=[%d] session_type=[%d] protection_mode=[%d] session_index=[%d] drmfile=[%p] pid=[%d]\n",
+ __func__, context_id, session_type, protection_mode, session_index,
+ drmfile, pid);
+
+ new_session = kzalloc(sizeof(*new_session), GFP_KERNEL);
+ if (!new_session) {
+ ret = -ENOMEM;
+ drm_dbg(&i915->drm, "Failed to kzalloc()\n");
+ goto end;
+ }
+
+ new_session->context_id = context_id;
+ new_session->session_type = session_type;
+ new_session->protection_mode = protection_mode;
+ new_session->session_index = session_index;
+ new_session->session_is_in_play = false;
+ new_session->drmfile = drmfile;
+ new_session->pid = pid;
+
+ switch (session_type) {
+ case SESSION_TYPE_TYPE0:
+ /* check to make sure the session id is within allowed range */
+ if (session_index < 0 || session_index >= MAX_TYPE0_SESSIONS) {
+ /* session id out of range.. free the new entry and return error */
+ kfree(new_session);
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ list_add(&new_session->session_list, &i915->pxp.r0ctx->active_pxp_type0_sessions);
+ break;
+
+ case SESSION_TYPE_TYPE1:
+ /* check to make sure the session id is within allowed range */
+ if (session_index < 0 || session_index >= MAX_TYPE1_SESSIONS) {
+ /* session id out of range.. free the new entry and return error */
+ kfree(new_session);
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ list_add(&new_session->session_list, &i915->pxp.r0ctx->active_pxp_type1_sessions);
+ break;
+
+ default:
+ /* session type is invalid... free new entry and return error. */
+ kfree(new_session);
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ break;
+ }
+ ret = 0;
+end:
+ return ret;
+}
+
+/**
+ * intel_pxp_sm_reserve_session - To reserve an available protected session.
+ * @i915: i915 device handle.
+ * @drmfile: pointer to drm_file.
+ * @context_id: Numeric identifier of the context created by the caller.
+ * @session_type: Type of the session requested. One of enum pxp_session_types.
+ * @protection_mode: Type of protection requested for the session. One of the
+ * enum pxp_protection_modes.
+ * @pxp_tag: Numeric session identifier returned back to caller.
+ *
+ * Return: status. 0 means reserve is successful.
+ */
+int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file *drmfile,
+ int context_id, int session_type, int protection_mode,
+ u32 *pxp_tag)
+{
+ int ret;
+ int session_index = 0;
+
+ drm_dbg(&i915->drm, ">>> %s session_type=[%d] protection_mode=[%d]\n", __func__,
+ session_type, protection_mode);
+
+ if (!pxp_tag || !i915) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ if (protection_mode != PROTECTION_MODE_LM && protection_mode != PROTECTION_MODE_HM &&
+ protection_mode != PROTECTION_MODE_SM) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, invalid session mode=[%d]\n", __func__, protection_mode);
+ goto end;
+ }
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ if (session_type == SESSION_TYPE_TYPE0) {
+ /*
+ * check if sessions are under attack. if so, don't allow creation of
+ * new session entries
+ */
+ if (check_if_protected_type0_sessions_are_attacked(i915)) {
+ /** protected sessions are under attack. return failure... **/
+ ret = -EPERM;
+ goto end;
+ }
+ }
+
+ /*
+ * iterate over the active sessions list to find next available open session id
+ * Cannot assume that the session entries will be sorted in the linked list
+ * as terminates are allowed at any time without re-sorting the linked list.
+ * So, the linked list should be walked start to finish to ensure a session is
+ * not already active
+ */
+ for (session_index = 0; session_index < pxp_session_max(session_type); session_index++) {
+ if (!is_sw_session_active(i915, session_type, session_index, false, NULL)) {
+ ret = sync_hw_sw_state(i915, session_index, session_type);
+ if (unlikely(ret)) {
+ ret = PXP_SM_STATUS_RETRY_REQUIRED;
+ goto end;
+ }
+
+ /*
+ * found an available session... create a new session entry
+ * with this identifier and return success
+ */
+ ret = create_new_session_entry(i915, drmfile, context_id, session_type,
+ protection_mode, session_index);
+ if (unlikely(ret))
+ goto end;
+
+ ret = pxp_set_pxp_tag(i915, session_type, session_index, protection_mode);
+ goto end;
+ }
+ }
+
+ ret = PXP_SM_STATUS_SESSION_NOT_AVAILABLE;
+end:
+ if (ret == 0)
+ *pxp_tag = intel_pxp_get_pxp_tag(i915, session_index, session_type, NULL);
+
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
{
int ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index c1f6b1be3fd1..44d9f8d1df8e 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -83,6 +83,9 @@ struct pxp_protected_session {
bool session_is_in_play;
};
+int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file *drmfile,
+ int context_id, int session_type, int protection_mode,
+ u32 *pxp_tag);
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 11/27] drm/i915/pxp: Enable ioctl action to set session in play
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (8 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 10/27] drm/i915/pxp: Enable ioctl action to reserve session slot Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 12/27] drm/i915/pxp: Func to send hardware session termination Sean Z Huang
` (16 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
With this ioctl action, ring3 driver can set the session in state
"session in play", after ring3 reserved the session slot/id from
ring3 PXP, and sent the TEE commands to activate the corresponding
hardware session. Session state "session in play" means this
session is ready for secure playback.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 4 ++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 92 +++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 2 +
3 files changed, 98 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 0f684851ecb2..baa61a3a70ff 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -61,6 +61,10 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf
pxp_info.sm_status = ret;
ret = 0;
}
+ } else if (params->req_session_state == PXP_SM_REQ_SESSION_IN_PLAY) {
+ ret = pxp_sm_mark_protected_session_in_play(i915, params->session_type,
+ params->pxp_tag);
+
} else {
ret = -EINVAL;
goto end;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 62303dc197e2..eb77380367aa 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -49,6 +49,25 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
return err;
}
+static int pxp_get_session_index(struct drm_i915_private *i915, u32 pxp_tag,
+ int *session_index_out, int *session_type_out)
+{
+ int ret;
+
+ if (!session_index_out || !session_type_out) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ *session_type_out = (pxp_tag & SESSION_TYPE_MASK) ? SESSION_TYPE_TYPE1 : SESSION_TYPE_TYPE0;
+ *session_index_out = pxp_tag & SESSION_ID_MASK;
+
+ ret = 0;
+end:
+ return ret;
+}
+
static u8 pxp_get_session_id(int session_index, int session_type)
{
u8 session_id = session_index & SESSION_ID_MASK;
@@ -492,6 +511,79 @@ int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file
return ret;
}
+/**
+ * pxp_sm_mark_protected_session_in_play - To put an reserved protected session to "in_play" state
+ * @i915: i915 device handle.
+ * @session_type: Type of the session to be updated. One of enum pxp_session_types.
+ * @session_id: Session id identifier of the protected session.
+ *
+ * Return: status. 0 means update is successful.
+ */
+int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int session_type,
+ u32 session_id)
+{
+ int ret;
+ int session_index;
+ int session_type_in_id;
+ struct pxp_protected_session *current_session;
+
+ drm_dbg(&i915->drm, ">>> %s session_type=[%d] session_id=[0x%08x]\n", __func__,
+ session_type, session_id);
+
+ ret = pxp_get_session_index(i915, session_id, &session_index, &session_type_in_id);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_get_session_index\n");
+ goto end;
+ }
+
+ if (session_type != session_type_in_id) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to session_type and session_type_in_id don't match\n");
+ goto end;
+ }
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ switch (session_type) {
+ case SESSION_TYPE_TYPE0:
+ list_for_each_entry(current_session, &i915->pxp.r0ctx->active_pxp_type0_sessions, session_list) {
+ DRM_DEBUG("Traverse the active type0 list, session_index=[%d]\n", current_session->session_index);
+ drm_dbg(&i915->drm, "Traverse the active type0 list, session_index=[%d]\n", current_session->session_index);
+ if (current_session->session_index == session_index) {
+ current_session->session_is_in_play = true;
+ ret = 0;
+ goto end;
+ }
+ }
+
+ drm_dbg(&i915->drm, "Failed to %s couldn't find active type0 session\n", __func__);
+ ret = -EINVAL;
+ goto end;
+
+ case SESSION_TYPE_TYPE1:
+ list_for_each_entry(current_session, &i915->pxp.r0ctx->active_pxp_type1_sessions, session_list) {
+ drm_dbg(&i915->drm, "Traverse the active type1 list, session_index=[%d]\n", current_session->session_index);
+ if (current_session->session_index == session_index) {
+ current_session->session_is_in_play = true;
+ ret = 0;
+ goto end;
+ }
+ }
+
+ drm_dbg(&i915->drm, "Failed to %s couldn't find active type1 session\n", __func__);
+ ret = -EINVAL;
+ goto end;
+
+ default:
+ /* invalid session type */
+ ret = -EINVAL;
+ break;
+ }
+end:
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
{
int ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index 44d9f8d1df8e..8f3f7e4a742b 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -86,6 +86,8 @@ struct pxp_protected_session {
int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file *drmfile,
int context_id, int session_type, int protection_mode,
u32 *pxp_tag);
+int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int session_type,
+ u32 session_id);
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 12/27] drm/i915/pxp: Func to send hardware session termination
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (9 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 11/27] drm/i915/pxp: Enable ioctl action to set session in play Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 13/27] drm/i915/pxp: Enable ioctl action to terminate the session Sean Z Huang
` (15 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Implement the functions to allow ring0 PXP to send a GPU command
in order to terminate the hardware session, so hardware can
recycle this session slot for the next usage.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 309 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 16 ++
2 files changed, 325 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index eb77380367aa..0e1ce75f9ccd 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -3,13 +3,175 @@
* Copyright(c) 2020, Intel Corporation. All rights reserved.
*/
+#include "gt/intel_gpu_commands.h"
+#include "gt/intel_gt.h"
#include "gt/intel_context.h"
+#include "gt/intel_gt_buffer_pool.h"
#include "gt/intel_engine_pm.h"
#include "intel_pxp.h"
#include "intel_pxp_sm.h"
#include "intel_pxp_context.h"
+static struct i915_vma *pxp_get_batch(struct drm_i915_private *i915,
+ struct intel_context *ce,
+ struct intel_gt_buffer_pool_node *pool,
+ u32 *cmd_buf, int cmd_size_in_dw)
+{
+ struct i915_vma *batch = ERR_PTR(-EINVAL);
+ u32 *cmd;
+
+ drm_dbg(&i915->drm, ">>> %s cmd_buf=[%p] cmd_size_in_dw=[%d]\n", __func__, cmd_buf, cmd_size_in_dw);
+
+ if (!ce || !ce->engine || !cmd_buf) {
+ drm_dbg(&i915->drm, "Failed to %s due to nullptr\n", __func__);
+ goto end;
+ }
+
+ if (cmd_size_in_dw * 4 > PAGE_SIZE) {
+ drm_dbg(&i915->drm, "Failed to %s, invalid cmd_size_id_dw=[%d]\n",
+ __func__, cmd_size_in_dw);
+ goto end;
+ }
+
+ cmd = i915_gem_object_pin_map(pool->obj, I915_MAP_FORCE_WC);
+ if (IS_ERR(cmd)) {
+ drm_dbg(&i915->drm, "Failed to i915_gem_object_pin_map()\n ");
+ goto end;
+ }
+
+ memcpy(cmd, cmd_buf, cmd_size_in_dw * 4);
+
+ if (drm_debug_enabled(DRM_UT_DRIVER)) {
+ print_hex_dump(KERN_DEBUG, "cmd binaries:",
+ DUMP_PREFIX_OFFSET, 4, 4, cmd, cmd_size_in_dw * 4, true);
+ }
+
+ i915_gem_object_unpin_map(pool->obj);
+
+ batch = i915_vma_instance(pool->obj, ce->vm, NULL);
+ if (IS_ERR(batch)) {
+ drm_dbg(&i915->drm, "Failed to i915_vma_instance()\n ");
+ goto end;
+ }
+
+end:
+ drm_dbg(&i915->drm, "<<< %s: batch=[%p]\n", __func__, batch);
+ return batch;
+}
+
+static int pxp_submit_cmd(struct drm_i915_private *i915, u32 *cmd, int cmd_size_in_dw)
+{
+ int err = -EINVAL;
+ struct i915_vma *batch;
+ struct i915_request *rq;
+ struct intel_context *ce = NULL;
+ bool is_engine_pm_get = false;
+ bool is_batch_vma_pin = false;
+ bool is_skip_req_on_err = false;
+ bool is_engine_get_pool = false;
+ struct intel_gt_buffer_pool_node *pool = NULL;
+ struct intel_gt *gt = NULL;
+
+ drm_dbg(&i915->drm, ">>> %s: cmd=[%p] cmd_size_in_dw=[%d]\n",
+ __func__, cmd, cmd_size_in_dw);
+
+ if (!i915 || !HAS_ENGINE(&i915->gt, VCS0) ||
+ !i915->gt.engine[VCS0]->kernel_context) {
+ err = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s bad params\n", __func__);
+ goto end;
+ }
+
+ if (!cmd || (cmd_size_in_dw * 4) > PAGE_SIZE) {
+ err = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s bad params\n", __func__);
+ goto end;
+ }
+
+ gt = &i915->gt;
+ ce = i915->gt.engine[VCS0]->kernel_context;
+
+ intel_engine_pm_get(ce->engine);
+ is_engine_pm_get = true;
+
+ pool = intel_gt_get_buffer_pool(gt, PAGE_SIZE);
+ if (IS_ERR(pool)) {
+ drm_dbg(&i915->drm, "Failed to intel_engine_get_pool()\n");
+ goto end;
+ }
+ is_engine_get_pool = true;
+
+ batch = pxp_get_batch(i915, ce, pool, cmd, cmd_size_in_dw);
+ if (IS_ERR(batch)) {
+ drm_dbg(&i915->drm, "Failed to pxp_get_batch()\n");
+ goto end;
+ }
+
+ err = i915_vma_pin(batch, 0, 0, PIN_USER);
+ if (err) {
+ drm_dbg(&i915->drm, "Failed to i915_vma_pin()\n");
+ goto end;
+ }
+ is_batch_vma_pin = true;
+
+ rq = intel_context_create_request(ce);
+ if (IS_ERR(rq)) {
+ drm_dbg(&i915->drm, "Failed to intel_context_create_request()\n");
+ goto end;
+ }
+ is_skip_req_on_err = true;
+
+ err = intel_gt_buffer_pool_mark_active(pool, rq);
+ if (err) {
+ drm_dbg(&i915->drm, "Failed to intel_engine_pool_mark_active()\n");
+ goto end;
+ }
+
+ i915_vma_lock(batch);
+ err = i915_request_await_object(rq, batch->obj, false);
+ if (!err)
+ err = i915_vma_move_to_active(batch, rq, 0);
+ i915_vma_unlock(batch);
+ if (err) {
+ drm_dbg(&i915->drm, "Failed to i915_request_await_object()\n");
+ goto end;
+ }
+
+ if (ce->engine->emit_init_breadcrumb) {
+ err = ce->engine->emit_init_breadcrumb(rq);
+ if (err) {
+ drm_dbg(&i915->drm, "Failed to emit_init_breadcrumb()\n");
+ goto end;
+ }
+ }
+
+ err = ce->engine->emit_bb_start(rq, batch->node.start,
+ batch->node.size, 0);
+ if (err) {
+ drm_dbg(&i915->drm, "Failed to emit_bb_start()\n");
+ goto end;
+ }
+
+ i915_request_add(rq);
+
+end:
+ if (unlikely(err) && is_skip_req_on_err)
+ i915_request_set_error_once(rq, err);
+
+ if (is_batch_vma_pin)
+ i915_vma_unpin(batch);
+
+ if (is_engine_get_pool)
+ intel_gt_buffer_pool_put(pool);
+
+ if (is_engine_pm_get)
+ intel_engine_pm_put(ce->engine);
+
+ drm_dbg(&i915->drm, "<<< %s: err=[%d]\n", __func__, err);
+ return err;
+}
+
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
{
intel_wakeref_t wakeref;
@@ -584,6 +746,153 @@ int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int ses
return ret;
}
+static int add_pxp_prolog(struct drm_i915_private *i915, u32 *cmd, int session_type, int session_index)
+{
+ u32 increased_size_in_dw = 0;
+ u32 *cmd_prolog = cmd;
+ const int cmd_prolog_size_in_dw = 10;
+
+ if (!cmd)
+ return cmd_prolog_size_in_dw;
+
+ /* MFX_WAIT - stall until prior PXP and MFX/HCP/HUC objects are cmopleted */
+ *cmd_prolog++ = (MFX_WAIT | MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG);
+
+ /* MI_FLUSH_DW - pxp off */
+ *cmd_prolog++ = MI_FLUSH_DW; /* DW0 */
+ *cmd_prolog++ = 0; /* DW1 */
+ *cmd_prolog++ = 0; /* DW2 */
+
+ /* MI_SET_APPID */
+ if (session_type == SESSION_TYPE_TYPE1) {
+ if (session_index >= MAX_TYPE1_SESSIONS) {
+ drm_dbg(&i915->drm, "Failed to %s invalid session_index\n", __func__);
+ goto end;
+ }
+
+ *cmd_prolog++ = (MI_SET_APPID | MI_SET_APPID_TYPE1_APP | MI_SET_APPID_SESSION_ID(session_index));
+ } else {
+ if (session_index >= MAX_TYPE0_SESSIONS) {
+ drm_dbg(&i915->drm, "Failed to %s invalid session_index\n", __func__);
+ goto end;
+ }
+
+ *cmd_prolog++ = (MI_SET_APPID | MI_SET_APPID_SESSION_ID(session_index));
+ }
+
+ /* MFX_WAIT */
+ *cmd_prolog++ = (MFX_WAIT | MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG);
+
+ /* MI_FLUSH_DW - pxp on */
+ *cmd_prolog++ = (MI_FLUSH_DW | MI_FLUSH_DW_DW0_PROTECTED_MEMORY_ENABLE); /* DW0 */
+ *cmd_prolog++ = 0; /* DW1 */
+ *cmd_prolog++ = 0; /* DW2 */
+
+ /* MFX_WAIT */
+ *cmd_prolog++ = (MFX_WAIT | MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG);
+
+ increased_size_in_dw = (cmd_prolog - cmd);
+end:
+ return increased_size_in_dw;
+}
+
+static int add_pxp_epilog(u32 *cmd)
+{
+ u32 increased_size_in_dw = 0;
+ u32 *cmd_epilog = cmd;
+ const int cmd_epilog_size_in_dw = 5;
+
+ if (!cmd)
+ return cmd_epilog_size_in_dw;
+
+ /* MI_FLUSH_DW - pxp off */
+ *cmd_epilog++ = MI_FLUSH_DW; /* DW0 */
+ *cmd_epilog++ = 0; /* DW1 */
+ *cmd_epilog++ = 0; /* DW2 */
+
+ /* MFX_WAIT - stall until prior PXP and MFX/HCP/HUC objects are cmopleted */
+ *cmd_epilog++ = (MFX_WAIT | MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG);
+
+ /* MI_BATCH_BUFFER_END */
+ *cmd_epilog++ = MI_BATCH_BUFFER_END;
+
+ increased_size_in_dw = (cmd_epilog - cmd);
+ return increased_size_in_dw;
+}
+
+static int add_pxp_inline_termination(u32 *cmd)
+{
+ u32 increased_size_in_dw = 0;
+ u32 *cmd_termin = cmd;
+ const int cmd_termin_size_in_dw = 2;
+
+ if (!cmd)
+ return cmd_termin_size_in_dw;
+
+ /* CRYPTO_KEY_EXCHANGE - session inline termination */
+ *cmd_termin++ = CRYPTO_KEY_EXCHANGE; /* DW0 */
+ *cmd_termin++ = 0; /* DW1 */
+
+ increased_size_in_dw = (cmd_termin - cmd);
+ return increased_size_in_dw;
+}
+
+static int issue_hw_terminate_for_session(struct drm_i915_private *i915, int session_type,
+ int session_index)
+{
+ u32 *cmd = NULL;
+ u32 *cmd_ptr = NULL;
+ int cmd_size_in_dw = 0;
+ int ret;
+
+ drm_dbg(&i915->drm, ">>> %s session_type=[%d] session_index=[%d]\n", __func__,
+ session_type, session_index);
+
+ if (!i915) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s due to bad params\n", __func__);
+ goto end;
+ }
+
+ cmd_size_in_dw += add_pxp_prolog(i915, NULL, session_type, session_index);
+ cmd_size_in_dw += add_pxp_inline_termination(NULL);
+ cmd_size_in_dw += add_pxp_epilog(NULL);
+
+ cmd = kzalloc(cmd_size_in_dw * 4, GFP_KERNEL);
+ if (!cmd) {
+ ret = -ENOMEM;
+ drm_dbg(&i915->drm, "Failed to kzalloc()\n");
+ goto end;
+ }
+
+ cmd_ptr = cmd;
+ cmd_ptr += add_pxp_prolog(i915, cmd_ptr, session_type, session_index);
+ cmd_ptr += add_pxp_inline_termination(cmd_ptr);
+ cmd_ptr += add_pxp_epilog(cmd_ptr);
+
+ if (cmd_size_in_dw != (cmd_ptr - cmd)) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s\n", __func__);
+ goto end;
+ }
+
+ if (drm_debug_enabled(DRM_UT_DRIVER)) {
+ print_hex_dump(KERN_DEBUG, "cmd binaries:",
+ DUMP_PREFIX_OFFSET, 4, 4, cmd, cmd_size_in_dw * 4, true);
+ }
+
+ ret = pxp_submit_cmd(i915, cmd, cmd_size_in_dw);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_submit_cmd()\n");
+ goto end;
+ }
+
+end:
+ kfree(cmd);
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
{
int ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index 8f3f7e4a742b..2a6fbf40da04 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -22,6 +22,22 @@
#define SESSION_TYPE_MASK BIT(7)
#define SESSION_ID_MASK (BIT(7) - 1)
+/* PXP GPU command definitions */
+
+/* MI_SET_APPID */
+#define MI_SET_APPID_TYPE1_APP BIT(7)
+#define MI_SET_APPID_SESSION_ID(x) ((x) << 0)
+
+/* MI_FLUSH_DW */
+#define MI_FLUSH_DW_DW0_PROTECTED_MEMORY_ENABLE BIT(22)
+
+/* MI_WAIT */
+#define MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG BIT(9)
+#define MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG BIT(8)
+
+/* CRYPTO_KEY_EXCHANGE */
+#define CRYPTO_KEY_EXCHANGE ((0x3 << 29) | (0x01609 << 16))
+
enum pxp_session_types {
SESSION_TYPE_TYPE0 = 0,
SESSION_TYPE_TYPE1 = 1,
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 13/27] drm/i915/pxp: Enable ioctl action to terminate the session
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (10 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 12/27] drm/i915/pxp: Func to send hardware session termination Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 14/27] drm/i915/pxp: Enable ioctl action to query PXP tag Sean Z Huang
` (14 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Enable the PXP ioctl action to allow ring3 PXP to terminate the
hardware session and cleanup its software session state.
Ring0 PXP sends the session termination command to GPU once
receves this ioctl action.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 7 +
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 205 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 5 +
3 files changed, 217 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index baa61a3a70ff..72a2237b504b 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -65,6 +65,13 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf
ret = pxp_sm_mark_protected_session_in_play(i915, params->session_type,
params->pxp_tag);
+ } else if (params->req_session_state == PXP_SM_REQ_SESSION_TERMINATE) {
+ ret = pxp_sm_terminate_protected_session_safe(i915, 0,
+ params->session_type,
+ params->pxp_tag);
+
+ if (!intel_pxp_sm_is_any_type0_session_in_play(i915, PROTECTION_MODE_ALL))
+ intel_pxp_destroy_r3ctx_list(i915);
} else {
ret = -EINVAL;
goto end;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 0e1ce75f9ccd..b1adfa735d4f 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -893,6 +893,189 @@ static int issue_hw_terminate_for_session(struct drm_i915_private *i915, int ses
return ret;
}
+/**
+ * terminate_protected_session - To terminate an active HW session and free its entry.
+ * @i915: i915 device handle.
+ * @context_id: context identifier of the requestor. only relevant if do_safety_check is true.
+ * @session_type: type of the session to be terminated. One of enum pxp_session_types.
+ * @session_index: session index of the session to be terminated.
+ * @do_safety_check: if enabled the context Id sent by the caller is
+ * matched with the one associated with the terminated
+ * session entry.
+ *
+ * Return: status. 0 means terminate is successful.
+ */
+static int terminate_protected_session(struct drm_i915_private *i915, int context_id,
+ int session_type, int session_index,
+ bool do_safety_check)
+{
+ int ret;
+ struct pxp_protected_session *current_session, *n;
+
+ drm_dbg(&i915->drm, ">>> %s conext_id=[%d] session_type=[%d] session_index=[0x%08x] do_safety_check=[%d]\n",
+ __func__, context_id, session_type, session_index, do_safety_check);
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ switch (session_type) {
+ case SESSION_TYPE_TYPE0:
+ list_for_each_entry_safe(current_session, n, &i915->pxp.r0ctx->active_pxp_type0_sessions, session_list) {
+ if (current_session->session_index == session_index) {
+ if (do_safety_check && current_session->context_id != context_id) {
+ ret = -EPERM;
+ drm_dbg(&i915->drm, "Failed to %s due to invalid context_id=[%d]\n", __func__, context_id);
+ goto end;
+ }
+
+ ret = issue_hw_terminate_for_session(i915, session_type, session_index);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to issue_hw_terminate_for_session()\n");
+ goto end;
+ }
+
+ ret = pxp_set_pxp_tag(i915, session_type, session_index, PROTECTION_MODE_NONE);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_set_pxp_tag()\n");
+ goto end;
+ }
+
+ /* delete the current session entry from the linked list */
+ list_del(¤t_session->session_list);
+
+ /* free the memory associated with the current context entry */
+ kfree(current_session);
+
+ /* TODO: special arbitrator session checks? */
+
+ ret = 0;
+ goto end;
+ }
+ }
+
+ drm_dbg(&i915->drm, "Warning - Couldn't find the type0 session_index=[0x%08x]\n", session_index);
+ ret = 0;
+ break;
+
+ case SESSION_TYPE_TYPE1:
+ list_for_each_entry_safe(current_session, n, &i915->pxp.r0ctx->active_pxp_type1_sessions, session_list) {
+ if (current_session->session_index == session_index) {
+ if (do_safety_check && current_session->context_id != context_id) {
+ ret = -EPERM;
+ drm_dbg(&i915->drm, "Failed to %s due to invalid context_id=[%d]\n", __func__, context_id);
+ goto end;
+ }
+
+ ret = issue_hw_terminate_for_session(i915, session_type, session_index);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to issue_hw_terminate_for_session()\n");
+ goto end;
+ }
+
+ ret = pxp_set_pxp_tag(i915, session_type, session_index, PROTECTION_MODE_NONE);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_set_pxp_tag()\n");
+ goto end;
+ }
+
+ /* delete the current session entry from the linked list */
+ list_del(¤t_session->session_list);
+
+ /* free the memory associated with the current context entry */
+ kfree(current_session);
+
+ ret = 0;
+ goto end;
+ }
+ }
+
+ drm_dbg(&i915->drm, "Warning - Couldn't find the type1 session_index=[0x%08x]\n", session_index);
+ ret = 0;
+ break;
+
+ default:
+ /* invalid session type */
+ ret = -EINVAL;
+ break;
+ }
+end:
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
+/**
+ * pxp_sm_terminate_protected_session_safe - to terminate an active HW session and free its entry.
+ * @i915: i915 device handle.
+ * @context_id: context identifier of the requestor.
+ * @session_type: type of the session to be terminated. One of enum pxp_session_types.
+ * @session_id: session id identifier of the session to be terminated.
+ *
+ * For safety, the context Id sent by the caller is matched with the
+ * one associated with the terminated session entry. * Terminate is
+ * only issued if context Ids match. Rejected otherwise This function
+ * is intended to be called from the ioctl.
+ *
+ * Return: status. 0 means terminate is successful.
+ */
+int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int context_id,
+ int session_type, int session_id)
+{
+ int ret;
+ int session_type_in_id;
+ int session_idx;
+
+ ret = pxp_get_session_index(i915, session_id, &session_idx, &session_type_in_id);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_get_session_index\n");
+ return ret;
+ }
+
+ if (session_type != session_type_in_id) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to session_type and session_type_in_id don't match\n");
+ return ret;
+ }
+
+ ret = terminate_protected_session(i915, context_id, session_type, session_idx, true);
+
+ return ret;
+}
+
+/**
+ * pxp_sm_terminate_protected_session_unsafe - To terminate an active HW session and free its entry.
+ * @i915: i915 device handle.
+ * @session_type: type of the session to be terminated. One of enum pxp_session_types.
+ * @session_id: session id identifier of the session to be terminated.
+ *
+ * No safety; the context Id sent by the caller is not matched with
+ * the one associated with the terminated session entry. This function
+ * is NOT intended to be called from the ioctl. Kernel administration
+ * purposes only.
+ *
+ * Return: status. 0 means terminate is successful.
+ */
+int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int session_type, int session_id)
+{
+ int ret;
+ int session_idx;
+ int session_type_in_id;
+
+ ret = pxp_get_session_index(i915, session_id, &session_idx, &session_type_in_id);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_get_session_index\n");
+ return ret;
+ }
+
+ if (session_type != session_type_in_id) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to session_type and session_type_in_id don't match\n");
+ return ret;
+ }
+
+ ret = terminate_protected_session(i915, -1, session_type, session_idx, false);
+
+ return ret;
+}
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
{
int ret;
@@ -909,3 +1092,25 @@ int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
return ret;
}
+
+/**
+ * intel_pxp_sm_is_any_type0_session_in_play - To check if there is a type0 "in play" session.
+ * @i915: i915 device handle.
+ * @protection_mode: check for specified protection mode of the session
+ *
+ * Return: True if at least one alive session in "session in play" state, false otherwise.
+ */
+bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, int protection_mode)
+{
+ struct pxp_protected_session *session, *n;
+
+ list_for_each_entry_safe(session, n, pxp_session_list(i915, SESSION_TYPE_TYPE0),
+ session_list) {
+ if (protection_mode == PROTECTION_MODE_ALL)
+ return true;
+ else if (protection_mode == session->protection_mode)
+ return true;
+ }
+
+ return false;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index 2a6fbf40da04..26597b1d18e1 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -104,6 +104,11 @@ int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file
u32 *pxp_tag);
int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int session_type,
u32 session_id);
+int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int context_id,
+ int session_type, int session_id);
+int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int session_type,
+ int session_id);
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
+bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, int protection_mode);
#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 14/27] drm/i915/pxp: Enable ioctl action to query PXP tag
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (11 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 13/27] drm/i915/pxp: Enable ioctl action to terminate the session Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown Sean Z Huang
` (13 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Enable the PXP ioctl action to allow ring3 PXP to query the PXP
tag, which is a 32-bit bitwise value indicating the current
session info, including protection type, session id, and whether
the session is enabled.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 7 +++++++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 7 +++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 28 +++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 3 +++
4 files changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 72a2237b504b..2121db05fdb6 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -78,6 +78,13 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf
}
break;
}
+ case PXP_ACTION_QUERY_PXP_TAG:
+ {
+ struct pxp_sm_query_pxp_tag *params = &pxp_info.query_pxp_tag;
+
+ ret = pxp_sm_ioctl_query_pxp_tag(i915, ¶ms->session_is_alive, ¶ms->pxp_tag);
+ break;
+ }
case PXP_ACTION_SET_R3_CONTEXT:
{
ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index cbaf25690596..8851c28a0e57 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -31,6 +31,7 @@ enum pxp_sm_session_req {
};
enum pxp_ioctl_action {
+ PXP_ACTION_QUERY_PXP_TAG = 0,
PXP_ACTION_SET_SESSION_STATUS = 1,
PXP_ACTION_SET_R3_CONTEXT = 5,
};
@@ -42,6 +43,11 @@ enum pxp_sm_status {
PXP_SM_STATUS_ERROR_UNKNOWN
};
+struct pxp_sm_query_pxp_tag {
+ u32 session_is_alive;
+ u32 pxp_tag; /* in - Session ID, out pxp tag */
+};
+
struct pxp_sm_set_session_status_params {
/** @pxp_tag: in [optional], for Arbitrator session, out pxp tag */
u32 pxp_tag;
@@ -57,6 +63,7 @@ struct pxp_info {
u32 action;
u32 sm_status;
union {
+ struct pxp_sm_query_pxp_tag query_pxp_tag;
struct pxp_sm_set_session_status_params set_session_status;
u32 set_r3ctx;
};
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index b1adfa735d4f..994abf5a8d36 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -1076,6 +1076,34 @@ int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int
return ret;
}
+int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag)
+{
+ int session_type = 0;
+ int session_index = 0;
+ int ret;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ if (!session_is_alive || !pxp_tag) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad param\n", __func__);
+ goto end;
+ }
+
+ ret = pxp_get_session_index(i915, *pxp_tag, &session_index, &session_type);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to __pxpsessionid_to_sessionid\n");
+ goto end;
+ }
+
+ *pxp_tag = intel_pxp_get_pxp_tag(i915, session_index, session_type, session_is_alive);
+
+ ret = 0;
+end:
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
{
int ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index 26597b1d18e1..859f3c1f8c6e 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -108,7 +108,10 @@ int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int c
int session_type, int session_id);
int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int session_type,
int session_id);
+int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag);
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
+u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx,
+ int session_type, u32 *session_is_alive);
bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, int protection_mode);
#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (12 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 14/27] drm/i915/pxp: Enable ioctl action to query PXP tag Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 5:51 ` kernel test robot
` (2 more replies)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 16/27] drm/i915/pxp: Termiante the session upon app crash Sean Z Huang
` (12 subsequent siblings)
26 siblings, 3 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Teardown is triggered when the display topology changes and no
long meets the secure playback requirement, and hardware trashes
all the encryption keys for display. So as a result, ring0 PXP
should handle such case and terminate all the type0 sessions.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 6 +-
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 118 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 1 +
3 files changed, 124 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 2121db05fdb6..40728ef70e20 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -134,6 +134,8 @@ static void intel_pxp_mask_irq(struct intel_gt *gt, u32 mask)
static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915)
{
+ int ret;
+
drm_dbg(&i915->drm, "%s was called\n", __func__);
mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
@@ -141,11 +143,13 @@ static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915)
i915->pxp.r0ctx->global_state_attacked = true;
i915->pxp.r0ctx->flag_display_hm_surface_keys = false;
+ ret = intel_pxp_sm_terminate_all_active_sessions(i915, SESSION_TYPE_TYPE0);
+
intel_pxp_destroy_r3ctx_list(i915);
mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
- return 0;
+ return ret;
}
static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 994abf5a8d36..37fe2e5af88d 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -893,6 +893,73 @@ static int issue_hw_terminate_for_session(struct drm_i915_private *i915, int ses
return ret;
}
+static int terminate_all_hw_sessions_with_global_termination(struct drm_i915_private *i915,
+ int session_type)
+{
+ u32 *cmd = NULL;
+ u32 *cmd_ptr = NULL;
+ int cmd_size_in_dw = 0;
+ int ret;
+ int session_index;
+ const int session_num_max = pxp_session_max(session_type);
+
+ drm_dbg(&i915->drm, ">>> %s session_type=[%d]\n", __func__, session_type);
+
+ if (!i915) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s due to bad params\n", __func__);
+ goto end;
+ }
+
+ /* Calculate how many bytes need to be alloc */
+ for (session_index = 0; session_index < session_num_max; session_index++) {
+ if (is_hw_session_in_play(i915, session_type, session_index)) {
+ cmd_size_in_dw += add_pxp_prolog(i915, NULL, session_type, session_index);
+ cmd_size_in_dw += add_pxp_inline_termination(NULL);
+ }
+ }
+ cmd_size_in_dw += add_pxp_epilog(NULL);
+
+ cmd = kzalloc(cmd_size_in_dw * 4, GFP_KERNEL);
+ if (!cmd) {
+ ret = -ENOMEM;
+ drm_dbg(&i915->drm, "Failed to kzalloc()\n");
+ goto end;
+ }
+
+ /* Program the command */
+ cmd_ptr = cmd;
+ for (session_index = 0; session_index < session_num_max; session_index++) {
+ if (is_hw_session_in_play(i915, session_type, session_index)) {
+ cmd_ptr += add_pxp_prolog(i915, cmd_ptr, session_type, session_index);
+ cmd_ptr += add_pxp_inline_termination(cmd_ptr);
+ }
+ }
+ cmd_ptr += add_pxp_epilog(cmd_ptr);
+
+ if (cmd_size_in_dw != (cmd_ptr - cmd)) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s\n", __func__);
+ goto end;
+ }
+
+ if (drm_debug_enabled(DRM_UT_DRIVER)) {
+ print_hex_dump(KERN_DEBUG, "global termination cmd binaries:",
+ DUMP_PREFIX_OFFSET, 4, 4, cmd, cmd_size_in_dw * 4, true);
+ }
+
+ ret = pxp_submit_cmd(i915, cmd, cmd_size_in_dw);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_submit_cmd()\n");
+ goto end;
+ }
+
+end:
+ kfree(cmd);
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
/**
* terminate_protected_session - To terminate an active HW session and free its entry.
* @i915: i915 device handle.
@@ -1076,6 +1143,57 @@ int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int
return ret;
}
+int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
+{
+ int ret = 0;
+ struct pxp_protected_session *current_session, *n;
+
+ list_for_each_entry_safe(current_session, n, pxp_session_list(i915, session_type), session_list) {
+ ret = pxp_set_pxp_tag(i915, session_type, current_session->session_index, PROTECTION_MODE_NONE);
+ if (ret)
+ drm_dbg(&i915->drm, "Failed to pxp_set_pxp_tag()\n");
+
+ list_del(¤t_session->session_list);
+ kfree(current_session);
+ }
+
+ return ret;
+}
+
+/**
+ * intel_pxp_sm_terminate_all_active_sessions - Terminate all active HW sessions and their entries.
+ * @i915: i915 device handle.
+ * @session_type: Type of the sessions to be terminated.
+ * One of enum pxp_session_types.
+ *
+ * This function is NOT intended to be called from the ioctl, and need to be protected by
+ * ctx_mutex to ensure no SIP change during the call.
+ *
+ * Return: status. 0 means terminate is successful.
+ */
+int intel_pxp_sm_terminate_all_active_sessions(struct drm_i915_private *i915, int session_type)
+{
+ int ret;
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ /* terminate the hw sessions */
+ ret = terminate_all_hw_sessions_with_global_termination(i915, session_type);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to terminate_all_hw_sessions_with_global_termination\n");
+ goto end;
+ }
+
+ ret = intel_pxp_sm_destroy_all_sw_sessions(i915, session_type);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to intel_pxp_sm_destroy_all_sw_sessions\n");
+ goto end;
+ }
+
+end:
+ return ret;
+}
+
int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag)
{
int session_type = 0;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index 859f3c1f8c6e..955182a90bfe 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -108,6 +108,7 @@ int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int c
int session_type, int session_id);
int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int session_type,
int session_id);
+int intel_pxp_sm_terminate_all_active_sessions(struct drm_i915_private *i915, int session_type);
int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag);
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx,
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* Re: [Intel-gfx] [PATCH 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown
2020-11-14 1:45 ` [Intel-gfx] [PATCH 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown Sean Z Huang
@ 2020-11-14 5:51 ` kernel test robot
2020-11-14 5:51 ` kernel test robot
2020-11-14 6:28 ` kernel test robot
2 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 5:51 UTC (permalink / raw)
To: Sean Z Huang, Intel-gfx; +Cc: Huang, Sean Z, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 1877 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: i386-randconfig-s001-20201114 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-107-gaf3512a6-dirty
# https://github.com/0day-ci/linux/commit/b2c5c38f134701a462cb7e880c4cebcd79e1d8c6
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout b2c5c38f134701a462cb7e880c4cebcd79e1d8c6
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
"sparse warnings: (new ones prefixed by >>)"
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:175:5: sparse: sparse: symbol 'pxp_sm_reg_read' was not declared. Should it be static?
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:1146:5: sparse: sparse: symbol 'intel_pxp_sm_destroy_all_sw_sessions' was not declared. Should it be static?
Please review and possibly fold the followup patch.
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 27612 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread* [Intel-gfx] [RFC PATCH] drm/i915/pxp: intel_pxp_sm_destroy_all_sw_sessions() can be static
2020-11-14 1:45 ` [Intel-gfx] [PATCH 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown Sean Z Huang
@ 2020-11-14 5:51 ` kernel test robot
2020-11-14 5:51 ` kernel test robot
2020-11-14 6:28 ` kernel test robot
2 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 5:51 UTC (permalink / raw)
To: Sean Z Huang, Intel-gfx; +Cc: Huang, Sean Z, kbuild-all
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
---
intel_pxp_sm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 37fe2e5af88dcb..79dd930f1c0d8b 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -1143,7 +1143,7 @@ int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int
return ret;
}
-int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
+static int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
{
int ret = 0;
struct pxp_protected_session *current_session, *n;
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [RFC PATCH] drm/i915/pxp: intel_pxp_sm_destroy_all_sw_sessions() can be static
@ 2020-11-14 5:51 ` kernel test robot
0 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 5:51 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 806 bytes --]
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
---
intel_pxp_sm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 37fe2e5af88dcb..79dd930f1c0d8b 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -1143,7 +1143,7 @@ int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int
return ret;
}
-int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
+static int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
{
int ret = 0;
struct pxp_protected_session *current_session, *n;
^ permalink raw reply related [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown
2020-11-14 1:45 ` [Intel-gfx] [PATCH 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown Sean Z Huang
@ 2020-11-14 6:28 ` kernel test robot
2020-11-14 5:51 ` kernel test robot
2020-11-14 6:28 ` kernel test robot
2 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 6:28 UTC (permalink / raw)
To: Sean Z Huang, Intel-gfx; +Cc: clang-built-linux, Huang, Sean Z, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3549 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: x86_64-randconfig-a004-20201113 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 9a85643cd357e412cff69067bb5c4840e228c2ab)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/b2c5c38f134701a462cb7e880c4cebcd79e1d8c6
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout b2c5c38f134701a462cb7e880c4cebcd79e1d8c6
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:175:5: warning: no previous prototype for function 'pxp_sm_reg_read' [-Wmissing-prototypes]
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:175:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
static
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:1146:5: warning: no previous prototype for function 'intel_pxp_sm_destroy_all_sw_sessions' [-Wmissing-prototypes]
int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:1146:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
^
static
2 warnings generated.
vim +/intel_pxp_sm_destroy_all_sw_sessions +1146 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
1145
> 1146 int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
1147 {
1148 int ret = 0;
1149 struct pxp_protected_session *current_session, *n;
1150
1151 list_for_each_entry_safe(current_session, n, pxp_session_list(i915, session_type), session_list) {
1152 ret = pxp_set_pxp_tag(i915, session_type, current_session->session_index, PROTECTION_MODE_NONE);
1153 if (ret)
1154 drm_dbg(&i915->drm, "Failed to pxp_set_pxp_tag()\n");
1155
1156 list_del(¤t_session->session_list);
1157 kfree(current_session);
1158 }
1159
1160 return ret;
1161 }
1162
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 35034 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread* Re: [Intel-gfx] [PATCH 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown
@ 2020-11-14 6:28 ` kernel test robot
0 siblings, 0 replies; 48+ messages in thread
From: kernel test robot @ 2020-11-14 6:28 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3623 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: x86_64-randconfig-a004-20201113 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 9a85643cd357e412cff69067bb5c4840e228c2ab)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/b2c5c38f134701a462cb7e880c4cebcd79e1d8c6
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout b2c5c38f134701a462cb7e880c4cebcd79e1d8c6
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:175:5: warning: no previous prototype for function 'pxp_sm_reg_read' [-Wmissing-prototypes]
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:175:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
static
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:1146:5: warning: no previous prototype for function 'intel_pxp_sm_destroy_all_sw_sessions' [-Wmissing-prototypes]
int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:1146:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
^
static
2 warnings generated.
vim +/intel_pxp_sm_destroy_all_sw_sessions +1146 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
1145
> 1146 int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type)
1147 {
1148 int ret = 0;
1149 struct pxp_protected_session *current_session, *n;
1150
1151 list_for_each_entry_safe(current_session, n, pxp_session_list(i915, session_type), session_list) {
1152 ret = pxp_set_pxp_tag(i915, session_type, current_session->session_index, PROTECTION_MODE_NONE);
1153 if (ret)
1154 drm_dbg(&i915->drm, "Failed to pxp_set_pxp_tag()\n");
1155
1156 list_del(¤t_session->session_list);
1157 kfree(current_session);
1158 }
1159
1160 return ret;
1161 }
1162
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 35034 bytes --]
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] [PATCH 16/27] drm/i915/pxp: Termiante the session upon app crash
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (13 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 15/27] drm/i915/pxp: Destroy all type0 sessions upon teardown Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 17/27] drm/i915/pxp: Enable PXP power management Sean Z Huang
` (11 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Ring0 PXP should terminate the hardware session and cleanup the
software state gracefully when the application has established
the protection session, but doesn't close the session correctly
due to some cases like application crash.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 2 ++
drivers/gpu/drm/i915/pxp/intel_pxp.c | 15 +++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 1 +
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 21 +++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 1 +
5 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 43ea85b5f14b..e61ffce52e3e 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1028,6 +1028,8 @@ static void i915_driver_postclose(struct drm_device *dev, struct drm_file *file)
/* Catch up with all the deferred frees from "this" client */
i915_gem_flush_free_objects(to_i915(dev));
+
+ intel_pxp_close(to_i915(dev), file);
}
static void intel_suspend_encoders(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 40728ef70e20..75858c0842ba 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -110,6 +110,21 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf
return ret;
}
+int intel_pxp_close(struct drm_i915_private *i915, struct drm_file *drmfile)
+{
+ int ret;
+
+ drm_dbg(&i915->drm, ">>> %s i915=[%p] drmfile=[%p] pid=[%d]\n", __func__,
+ i915, drmfile, pid_nr(drmfile->pid));
+
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+ ret = intel_pxp_sm_close(i915, drmfile);
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask)
{
WARN_ON(INTEL_GEN(i915) < 11);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 8851c28a0e57..3d70b9bab79f 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -83,6 +83,7 @@ struct intel_gt;
struct drm_i915_private;
int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile);
+int intel_pxp_close(struct drm_i915_private *i915, struct drm_file *drmfile);
void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir);
int i915_pxp_teardown_required_callback(struct drm_i915_private *i915);
int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 37fe2e5af88d..71082938b9f0 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -1260,3 +1260,24 @@ bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, in
return false;
}
+
+int intel_pxp_sm_close(struct drm_i915_private *i915, struct drm_file *drmfile)
+{
+ struct pxp_protected_session *s, *n;
+ int ret = 0;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ list_for_each_entry_safe(s, n, pxp_session_list(i915, SESSION_TYPE_TYPE0), session_list) {
+ if (s->drmfile && s->drmfile == drmfile && s->pid == pid_nr(drmfile->pid)) {
+ ret = terminate_protected_session(i915, 0, s->session_type, s->session_index, false);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to terminate_protected_session()\n");
+ return ret;
+ }
+ }
+ }
+
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index 955182a90bfe..b968a3169133 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -114,5 +114,6 @@ int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx,
int session_type, u32 *session_is_alive);
bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, int protection_mode);
+int intel_pxp_sm_close(struct drm_i915_private *i915, struct drm_file *drmfile);
#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 17/27] drm/i915/pxp: Enable PXP power management
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (14 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 16/27] drm/i915/pxp: Termiante the session upon app crash Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 18/27] drm/i915/pxp: Implement funcs to create the TEE channel Sean Z Huang
` (10 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
During the power event S3+ sleep/resume, hardware will lose all the
encryption keys for every hardware session, even though the
software session state was marked as alive after resume. So to
handle such case, ring0 PXP should terminate all the hardware
sessions and cleanup all the software states after the power cycle.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_drv.c | 8 +++
drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 83 +++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_pm.h | 14 +++++
4 files changed, 107 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_pm.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 81432a9f44d6..6858392c1ef2 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -258,7 +258,8 @@ i915-y += i915_perf.o
i915-y += \
pxp/intel_pxp.o \
pxp/intel_pxp_context.o \
- pxp/intel_pxp_sm.o
+ pxp/intel_pxp_sm.o \
+ pxp/intel_pxp_pm.o
# Post-mortem debug and GPU hang state capture
i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index e61ffce52e3e..830708414f92 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -68,6 +68,8 @@
#include "gt/intel_gt_pm.h"
#include "gt/intel_rc6.h"
+#include "pxp/intel_pxp_pm.h"
+
#include "i915_debugfs.h"
#include "i915_drv.h"
#include "i915_ioc32.h"
@@ -1094,6 +1096,8 @@ static int i915_drm_prepare(struct drm_device *dev)
*/
i915_gem_suspend(i915);
+ intel_pxp_pm_prepare_suspend(i915);
+
return 0;
}
@@ -1277,6 +1281,8 @@ static int i915_drm_resume(struct drm_device *dev)
intel_power_domains_enable(dev_priv);
+ intel_pxp_pm_resume(dev_priv);
+
enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
return 0;
@@ -1348,6 +1354,8 @@ static int i915_drm_resume_early(struct drm_device *dev)
intel_power_domains_resume(dev_priv);
+ intel_pxp_pm_resume_early(dev_priv);
+
enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
return ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
new file mode 100644
index 000000000000..18d33efca9d9
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020 Intel Corporation.
+ */
+
+#include "i915_drv.h"
+#include "intel_pxp_context.h"
+#include "intel_pxp_sm.h"
+#include "intel_pxp_pm.h"
+
+void intel_pxp_pm_prepare_suspend(struct drm_i915_private *i915)
+{
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ if (!i915->pxp.r0ctx)
+ return;
+
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+
+ /* Disable PXP-IOCTLs */
+ i915->pxp.r0ctx->global_state_in_suspend = true;
+
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+
+ drm_dbg(&i915->drm, "<<< %s\n", __func__);
+}
+
+void intel_pxp_pm_resume_early(struct drm_i915_private *i915)
+{
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ if (!i915->pxp.r0ctx)
+ return;
+
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+
+ if (i915->pxp.r0ctx->global_state_in_suspend) {
+ /* reset the attacked flag even there was a pending */
+ i915->pxp.r0ctx->global_state_attacked = false;
+
+ i915->pxp.r0ctx->flag_display_hm_surface_keys = false;
+ }
+
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+ drm_dbg(&i915->drm, "<<< %s\n", __func__);
+}
+
+int intel_pxp_pm_resume(struct drm_i915_private *i915)
+{
+ int ret = 0;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ if (!i915->pxp.r0ctx)
+ return 0;
+
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+
+ /* Re-enable PXP-IOCTLs */
+ if (i915->pxp.r0ctx->global_state_in_suspend) {
+ intel_pxp_destroy_r3ctx_list(i915);
+
+ ret = intel_pxp_sm_terminate_all_active_sessions(i915, SESSION_TYPE_TYPE0);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to intel_pxp_sm_terminate_all_active_sessions with type0\n");
+ goto end;
+ }
+
+ ret = intel_pxp_sm_terminate_all_active_sessions(i915, SESSION_TYPE_TYPE1);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to intel_pxp_sm_terminate_all_active_sessions with type1\n");
+ goto end;
+ }
+
+ i915->pxp.r0ctx->global_state_in_suspend = false;
+ }
+
+end:
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+
+ return ret;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h
new file mode 100644
index 000000000000..0b1e4af1d36f
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_PM_H__
+#define __INTEL_PXP_PM_H__
+
+void intel_pxp_pm_prepare_suspend(struct drm_i915_private *i915);
+
+void intel_pxp_pm_resume_early(struct drm_i915_private *i915);
+int intel_pxp_pm_resume(struct drm_i915_private *i915);
+
+#endif
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 18/27] drm/i915/pxp: Implement funcs to create the TEE channel
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (15 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 17/27] drm/i915/pxp: Enable PXP power management Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 19/27] drm/i915/pxp: Enable ioctl action to send TEE commands Sean Z Huang
` (9 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Currently ring3 driver sends the TEE commands directly to TEE, but
later, as our design, we would like to make ring3 sending the TEE
commands via the ring0 PXP ioctl action instead of TEE ioctl, so
we can centralize those protection operations at ring0 PXP.
Co-developed-by: Vitaly Lubart <vitaly.lubart@intel.com>
Co-developed-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_drv.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 6 +
drivers/gpu/drm/i915/pxp/intel_pxp.c | 4 +
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 140 +++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 14 +++
include/drm/i915_component.h | 1 +
include/drm/i915_pxp_tee_interface.h | 45 ++++++++
8 files changed, 212 insertions(+)
create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
create mode 100644 include/drm/i915_pxp_tee_interface.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 6858392c1ef2..1f3e0b89ae42 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -259,6 +259,7 @@ i915-y += \
pxp/intel_pxp.o \
pxp/intel_pxp_context.o \
pxp/intel_pxp_sm.o \
+ pxp/intel_pxp_tee.o \
pxp/intel_pxp_pm.o
# Post-mortem debug and GPU hang state capture
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 830708414f92..73c77a4e8216 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -324,6 +324,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
mutex_init(&dev_priv->wm.wm_mutex);
mutex_init(&dev_priv->pps_mutex);
mutex_init(&dev_priv->hdcp_comp_mutex);
+ mutex_init(&dev_priv->pxp_tee_comp_mutex);
i915_memcpy_init_early(dev_priv);
intel_runtime_pm_init_early(&dev_priv->runtime_pm);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f34ed07a68ee..9ba6eada4f84 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1219,6 +1219,12 @@ struct drm_i915_private {
struct intel_pxp pxp;
+ struct i915_pxp_comp_master *pxp_tee_master;
+ bool pxp_tee_comp_added;
+
+ /* Mutex to protect the above pxp_tee component related values. */
+ struct mutex pxp_tee_comp_mutex;
+
I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;)
/*
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 75858c0842ba..2cbdc6fa7cf6 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -227,6 +227,8 @@ int intel_pxp_init(struct drm_i915_private *i915)
return ret;
}
+ intel_pxp_tee_component_init(i915);
+
INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work);
i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED |
@@ -238,6 +240,8 @@ int intel_pxp_init(struct drm_i915_private *i915)
void intel_pxp_uninit(struct drm_i915_private *i915)
{
+ intel_pxp_tee_component_fini(i915);
+
intel_pxp_destroy_r0ctx(i915);
}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
new file mode 100644
index 000000000000..5bf79ca45cea
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -0,0 +1,140 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020 Intel Corporation.
+ */
+
+#include <linux/component.h>
+#include "i915_drv.h"
+#include "drm/i915_component.h"
+#include "intel_pxp.h"
+#include "intel_pxp_context.h"
+#include "intel_pxp_tee.h"
+
+static int intel_pxp_tee_io_message(struct drm_i915_private *i915,
+ void *msg_in, u32 msg_in_size,
+ void *msg_out, u32 *msg_out_size_ptr,
+ u32 msg_out_buf_size)
+{
+ int ret;
+ struct i915_pxp_comp_master *pxp_tee_master = i915->pxp_tee_master;
+
+ if (!pxp_tee_master || !msg_in || !msg_out || !msg_out_size_ptr) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, invalid params\n", __func__);
+ goto end;
+ }
+
+ lockdep_assert_held(&i915->pxp_tee_comp_mutex);
+
+ if (drm_debug_enabled(DRM_UT_DRIVER))
+ print_hex_dump(KERN_DEBUG, "TEE input message binaries:",
+ DUMP_PREFIX_OFFSET, 4, 4, msg_in, msg_in_size, true);
+
+ ret = pxp_tee_master->ops->send(pxp_tee_master->tee_dev, msg_in, msg_in_size);
+ if (ret) {
+ ret = -EFAULT;
+ drm_dbg(&i915->drm, "Failed to send TEE message\n");
+ goto end;
+ }
+
+ ret = pxp_tee_master->ops->receive(pxp_tee_master->tee_dev, msg_out, msg_out_buf_size);
+ if (ret < 0) {
+ ret = -EFAULT;
+ drm_dbg(&i915->drm, "Failed to receive TEE message\n");
+ goto end;
+ }
+
+ if (ret > msg_out_buf_size) {
+ ret = -EFAULT;
+ drm_dbg(&i915->drm, "Failed to receive TEE message due to unexpected output size\n");
+ goto end;
+ }
+
+ *msg_out_size_ptr = ret;
+ ret = 0;
+
+ if (drm_debug_enabled(DRM_UT_DRIVER))
+ print_hex_dump(KERN_DEBUG, "TEE output message binaries:",
+ DUMP_PREFIX_OFFSET, 4, 4, msg_out, *msg_out_size_ptr, true);
+end:
+ return ret;
+}
+
+/**
+ * i915_pxp_tee_component_bind - bind funciton to pass the function pointers to pxp_tee
+ * @i915_kdev: pointer to i915 kernel device
+ * @tee_kdev: pointer to tee kernel device
+ * @data: pointer to pxp_tee_master containing the function pointers
+ *
+ * This bind function is called during the system boot or resume from system sleep.
+ *
+ * Return: return 0 if successful.
+ */
+static int i915_pxp_tee_component_bind(struct device *i915_kdev,
+ struct device *tee_kdev, void *data)
+{
+ struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
+
+ drm_dbg(&i915->drm, "i915 PXP TEE component bind\n");
+
+ if (!i915 || !tee_kdev || !data) {
+ drm_dbg(&i915->drm, "Failed to bind for i915 PXP TEE component, invalid params\n");
+ return -EPERM;
+ }
+
+ mutex_lock(&i915->pxp_tee_comp_mutex);
+ i915->pxp_tee_master = (struct i915_pxp_comp_master *)data;
+ i915->pxp_tee_master->tee_dev = tee_kdev;
+ mutex_unlock(&i915->pxp_tee_comp_mutex);
+
+ return 0;
+}
+
+static void i915_pxp_tee_component_unbind(struct device *i915_kdev,
+ struct device *tee_kdev, void *data)
+{
+ struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
+
+ drm_dbg(&i915->drm, "i915 PXP TEE component unbind\n");
+
+ if (!i915 || !tee_kdev || !data) {
+ drm_dbg(&i915->drm, "Failed to unbind for i915 PXP TEE component, invalid params\n");
+ return;
+ }
+
+ mutex_lock(&i915->pxp_tee_comp_mutex);
+ i915->pxp_tee_master = NULL;
+ mutex_unlock(&i915->pxp_tee_comp_mutex);
+}
+
+static const struct component_ops i915_pxp_tee_component_ops = {
+ .bind = i915_pxp_tee_component_bind,
+ .unbind = i915_pxp_tee_component_unbind,
+};
+
+void intel_pxp_tee_component_init(struct drm_i915_private *i915)
+{
+ int ret;
+
+ drm_WARN_ON(&i915->drm, i915->pxp_tee_comp_added);
+
+ ret = component_add_typed(i915->drm.dev, &i915_pxp_tee_component_ops,
+ I915_COMPONENT_PXP);
+ if (ret < 0) {
+ drm_dbg_kms(&i915->drm, "Failed at component add(%d)\n", ret);
+ return;
+ }
+
+ mutex_lock(&i915->pxp_tee_comp_mutex);
+ i915->pxp_tee_comp_added = true;
+ mutex_unlock(&i915->pxp_tee_comp_mutex);
+}
+
+void intel_pxp_tee_component_fini(struct drm_i915_private *i915)
+{
+ mutex_lock(&i915->pxp_tee_comp_mutex);
+ i915->pxp_tee_comp_added = false;
+ mutex_unlock(&i915->pxp_tee_comp_mutex);
+
+ component_del(i915->drm.dev, &i915_pxp_tee_component_ops);
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
new file mode 100644
index 000000000000..54d6e89a68a8
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_TEE_H__
+#define __INTEL_PXP_TEE_H__
+
+#include "drm/i915_pxp_tee_interface.h"
+
+void intel_pxp_tee_component_init(struct drm_i915_private *i915);
+void intel_pxp_tee_component_fini(struct drm_i915_private *i915);
+
+#endif /* __INTEL_PXP_TEE_H__ */
diff --git a/include/drm/i915_component.h b/include/drm/i915_component.h
index 55c3b123581b..c1e2a43d2d1e 100644
--- a/include/drm/i915_component.h
+++ b/include/drm/i915_component.h
@@ -29,6 +29,7 @@
enum i915_component_type {
I915_COMPONENT_AUDIO = 1,
I915_COMPONENT_HDCP,
+ I915_COMPONENT_PXP
};
/* MAX_PORT is the number of port
diff --git a/include/drm/i915_pxp_tee_interface.h b/include/drm/i915_pxp_tee_interface.h
new file mode 100644
index 000000000000..3999e255e145
--- /dev/null
+++ b/include/drm/i915_pxp_tee_interface.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2020 Intel Corporation
+ *
+ * Authors:
+ * Vitaly Lubart <vitaly.lubart@intel.com>
+ */
+
+#ifndef _I915_PXP_TEE_INTERFACE_H_
+#define _I915_PXP_TEE_INTERFACE_H_
+
+#include <linux/mutex.h>
+#include <linux/device.h>
+
+/**
+ * struct i915_pxp_component_ops - ops for PXP services.
+ * @owner: Module providing the ops
+ * @send: sends data to PXP
+ * @receive: receives data from PXP
+ */
+struct i915_pxp_component_ops {
+ /**
+ * @owner: owner of the module provding the ops
+ */
+ struct module *owner;
+
+ int (*send)(struct device *dev, const void *message, size_t size);
+ int (*receive)(struct device *dev, void *buffer, size_t size);
+};
+
+/**
+ * struct i915_pxp_component_master - Used for communication between i915
+ * and TEE drivers for the PXP services
+ * @tee_dev: device that provide the PXP service from TEE Bus.
+ * @pxp_ops: Ops implemented by TEE driver, used by i915 driver.
+ */
+struct i915_pxp_comp_master {
+ struct device *tee_dev;
+ const struct i915_pxp_component_ops *ops;
+
+ /* To protect the above members. */
+ struct mutex mutex;
+};
+
+#endif /* _I915_TEE_PXP_INTERFACE_H_ */
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 19/27] drm/i915/pxp: Enable ioctl action to send TEE commands
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (16 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 18/27] drm/i915/pxp: Implement funcs to create the TEE channel Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 20/27] drm/i915/pxp: Create the arbitrary session after boot Sean Z Huang
` (8 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Enable the ioctl action to allow ring3 driver sends TEE commands
via ring0 PXP ioctl, instead of TEE iotcl. So we can centralize
those protection operations at ring0 PXP.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 15 ++++++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 18 +++++++
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 65 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 5 ++
4 files changed, 103 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 2cbdc6fa7cf6..1a6cad0502c5 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -7,6 +7,7 @@
#include "intel_pxp.h"
#include "intel_pxp_context.h"
#include "intel_pxp_sm.h"
+#include "intel_pxp_tee.h"
int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile)
{
@@ -85,6 +86,20 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf
ret = pxp_sm_ioctl_query_pxp_tag(i915, ¶ms->session_is_alive, ¶ms->pxp_tag);
break;
}
+ case PXP_ACTION_TEE_IO_MESSAGE:
+ {
+ struct pxp_tee_io_message_params *params = &pxp_info.tee_io_message;
+
+ ret = pxp_tee_ioctl_io_message(i915,
+ params->msg_in, params->msg_in_size,
+ params->msg_out, ¶ms->msg_out_size,
+ params->msg_out_buf_size);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to send TEE IO message\n");
+ ret = -EFAULT;
+ }
+ break;
+ }
case PXP_ACTION_SET_R3_CONTEXT:
{
ret = intel_pxp_set_r3ctx(i915, pxp_info.set_r3ctx);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 3d70b9bab79f..2c16ed0b5c0b 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -33,6 +33,7 @@ enum pxp_sm_session_req {
enum pxp_ioctl_action {
PXP_ACTION_QUERY_PXP_TAG = 0,
PXP_ACTION_SET_SESSION_STATUS = 1,
+ PXP_ACTION_TEE_IO_MESSAGE = 4,
PXP_ACTION_SET_R3_CONTEXT = 5,
};
@@ -59,12 +60,29 @@ struct pxp_sm_set_session_status_params {
u32 req_session_state;
};
+/**
+ * struct pxp_tee_io_message_params - Params to send/receive message to/from TEE.
+ */
+struct pxp_tee_io_message_params {
+ /** @msg_in: in - message input from UMD */
+ u8 __user *msg_in;
+ /** @msg_in_size: in - message input size from UMD */
+ u32 msg_in_size;
+ /** @msg_out: in - message output buffer from UMD */
+ u8 __user *msg_out;
+ /** @msg_out_size: out- message output size from TEE */
+ u32 msg_out_size;
+ /** @msg_out_buf_size: in - message output buffer size from UMD */
+ u32 msg_out_buf_size;
+};
+
struct pxp_info {
u32 action;
u32 sm_status;
union {
struct pxp_sm_query_pxp_tag query_pxp_tag;
struct pxp_sm_set_session_status_params set_session_status;
+ struct pxp_tee_io_message_params tee_io_message;
u32 set_r3ctx;
};
} __packed;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index 5bf79ca45cea..7e10b7ac584f 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -60,6 +60,71 @@ static int intel_pxp_tee_io_message(struct drm_i915_private *i915,
return ret;
}
+int pxp_tee_ioctl_io_message(struct drm_i915_private *i915,
+ void __user *msg_in_user_ptr, u32 msg_in_size,
+ void __user *msg_out_user_ptr, u32 *msg_out_size_ptr,
+ u32 msg_out_buf_size)
+{
+ int ret;
+ void *msg_in = NULL;
+ void *msg_out = NULL;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ if (!msg_in_user_ptr || !msg_out_user_ptr || msg_out_buf_size == 0 ||
+ msg_in_size == 0 || !msg_out_size_ptr) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, invalid params\n", __func__);
+ goto end;
+ }
+
+ msg_in = kzalloc(msg_in_size, GFP_KERNEL);
+ if (!msg_in) {
+ ret = -ENOMEM;
+ drm_dbg(&i915->drm, "Failed to kzalloc\n");
+ goto end;
+ }
+
+ msg_out = kzalloc(msg_out_buf_size, GFP_KERNEL);
+ if (!msg_out) {
+ ret = -ENOMEM;
+ drm_dbg(&i915->drm, "Failed to kzalloc\n");
+ goto end;
+ }
+
+ if (copy_from_user(msg_in, msg_in_user_ptr, msg_in_size) != 0) {
+ ret = -EFAULT;
+ drm_dbg(&i915->drm, "Failed to copy_from_user for TEE message\n");
+ goto end;
+ }
+
+ mutex_lock(&i915->pxp_tee_comp_mutex);
+
+ ret = intel_pxp_tee_io_message(i915,
+ msg_in, msg_in_size,
+ msg_out, msg_out_size_ptr,
+ msg_out_buf_size);
+
+ mutex_unlock(&i915->pxp_tee_comp_mutex);
+
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to send/receive tee message\n");
+ goto end;
+ }
+
+ if (copy_to_user(msg_out_user_ptr, msg_out, *msg_out_size_ptr) != 0) {
+ ret = -EFAULT;
+ drm_dbg(&i915->drm, "Failed to copy_to_user for TEE message\n");
+ goto end;
+ }
+
+end:
+ kfree(msg_in);
+ kfree(msg_out);
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
/**
* i915_pxp_tee_component_bind - bind funciton to pass the function pointers to pxp_tee
* @i915_kdev: pointer to i915 kernel device
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
index 54d6e89a68a8..4df077c906ae 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
@@ -11,4 +11,9 @@
void intel_pxp_tee_component_init(struct drm_i915_private *i915);
void intel_pxp_tee_component_fini(struct drm_i915_private *i915);
+int pxp_tee_ioctl_io_message(struct drm_i915_private *i915,
+ void __user *msg_in_user_ptr, u32 msg_in_size,
+ void __user *msg_out_user_ptr, u32 *msg_out_size_ptr,
+ u32 msg_out_buf_size);
+
#endif /* __INTEL_PXP_TEE_H__ */
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 20/27] drm/i915/pxp: Create the arbitrary session after boot
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (17 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 19/27] drm/i915/pxp: Enable ioctl action to send TEE commands Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 21/27] drm/i915/pxp: Add i915 trace logs for PXP operations Sean Z Huang
` (7 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Create the arbitrary session, with the fixed session id 0xf, after
system boot, for the case that application allocates the protected
buffer without establishing any protection session. Because the
hardware requires at least one alive session for protected buffer
creation. This arbitrary session needs to be re-created after
teardown or power event because hardware encryption key won't be
valid after such cases.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 50 +++++++++++++++++++++++-
drivers/gpu/drm/i915/pxp/intel_pxp.h | 2 +
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 33 ++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 6 +++
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 34 ++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 6 +++
6 files changed, 130 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 1a6cad0502c5..80e632b614f5 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -140,6 +140,46 @@ int intel_pxp_close(struct drm_i915_private *i915, struct drm_file *drmfile)
return ret;
}
+int intel_pxp_create_arb_session(struct drm_i915_private *i915)
+{
+ struct pxp_tag pxptag;
+ int ret;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ if (i915->pxp.r0ctx->flag_display_hm_surface_keys) {
+ drm_dbg(&i915->drm, "%s: arb session is alive so skipping the creation\n",
+ __func__);
+ return 0;
+ }
+
+ ret = intel_pxp_sm_reserve_arb_session(i915, &pxptag.value);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to reserve session\n");
+ goto end;
+ }
+
+ ret = intel_pxp_tee_cmd_create_arb_session(i915);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to send tee cmd for arb session creation\n");
+ goto end;
+ }
+
+ ret = pxp_sm_mark_protected_session_in_play(i915, ARB_SESSION_TYPE, pxptag.session_id);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to mark session status in play\n");
+ goto end;
+ }
+
+ i915->pxp.r0ctx->flag_display_hm_surface_keys = true;
+
+end:
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask)
{
WARN_ON(INTEL_GEN(i915) < 11);
@@ -190,9 +230,17 @@ static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private
mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
- if (i915->pxp.r0ctx->global_state_attacked)
+ if (i915->pxp.r0ctx->global_state_attacked) {
i915->pxp.r0ctx->global_state_attacked = false;
+ /* Re-create the arb session after teardown handle complete */
+ ret = intel_pxp_create_arb_session(i915);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to create arb session\n");
+ goto end;
+ }
+ }
+end:
mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 2c16ed0b5c0b..c0119ccdab08 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -102,6 +102,8 @@ struct drm_i915_private;
int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile);
int intel_pxp_close(struct drm_i915_private *i915, struct drm_file *drmfile);
+int intel_pxp_create_arb_session(struct drm_i915_private *i915);
+
void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir);
int i915_pxp_teardown_required_callback(struct drm_i915_private *i915);
int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 71082938b9f0..55cdd402f704 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -673,6 +673,39 @@ int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file
return ret;
}
+int intel_pxp_sm_reserve_arb_session(struct drm_i915_private *i915, u32 *pxp_tag)
+{
+ int ret;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ if (!pxp_tag || !i915) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ ret = sync_hw_sw_state(i915, ARB_SESSION_INDEX, ARB_SESSION_TYPE);
+ if (unlikely(ret))
+ goto end;
+
+ ret = create_new_session_entry(i915, NULL, 0, ARB_SESSION_TYPE,
+ ARB_PROTECTION_MODE, ARB_SESSION_INDEX);
+ if (unlikely(ret))
+ goto end;
+
+ ret = pxp_set_pxp_tag(i915, ARB_SESSION_TYPE, ARB_SESSION_INDEX, ARB_PROTECTION_MODE);
+
+end:
+ if (ret == 0)
+ *pxp_tag = intel_pxp_get_pxp_tag(i915, ARB_SESSION_INDEX, ARB_SESSION_TYPE, NULL);
+
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+ return ret;
+}
+
/**
* pxp_sm_mark_protected_session_in_play - To put an reserved protected session to "in_play" state
* @i915: i915 device handle.
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index b968a3169133..17ece9a375db 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -38,6 +38,11 @@
/* CRYPTO_KEY_EXCHANGE */
#define CRYPTO_KEY_EXCHANGE ((0x3 << 29) | (0x01609 << 16))
+/* Arbitrary session */
+#define ARB_SESSION_INDEX 0xf
+#define ARB_SESSION_TYPE SESSION_TYPE_TYPE0
+#define ARB_PROTECTION_MODE PROTECTION_MODE_HM
+
enum pxp_session_types {
SESSION_TYPE_TYPE0 = 0,
SESSION_TYPE_TYPE1 = 1,
@@ -102,6 +107,7 @@ struct pxp_protected_session {
int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file *drmfile,
int context_id, int session_type, int protection_mode,
u32 *pxp_tag);
+int intel_pxp_sm_reserve_arb_session(struct drm_i915_private *i915, u32 *pxp_tag);
int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int session_type,
u32 session_id);
int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int context_id,
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index 7e10b7ac584f..d9ab33139cdc 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -138,6 +138,7 @@ int pxp_tee_ioctl_io_message(struct drm_i915_private *i915,
static int i915_pxp_tee_component_bind(struct device *i915_kdev,
struct device *tee_kdev, void *data)
{
+ int ret;
struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
drm_dbg(&i915->drm, "i915 PXP TEE component bind\n");
@@ -152,6 +153,16 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev,
i915->pxp_tee_master->tee_dev = tee_kdev;
mutex_unlock(&i915->pxp_tee_comp_mutex);
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+ /* Create arb session only if tee is ready, during system boot or sleep/resume */
+ ret = intel_pxp_create_arb_session(i915);
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to create arb session ret=[%d]\n", ret);
+ return ret;
+ }
+
return 0;
}
@@ -203,3 +214,26 @@ void intel_pxp_tee_component_fini(struct drm_i915_private *i915)
component_del(i915->drm.dev, &i915_pxp_tee_component_ops);
}
+
+int intel_pxp_tee_cmd_create_arb_session(struct drm_i915_private *i915)
+{
+ int ret;
+ u32 msg_out_size_received = 0;
+ u32 msg_in[PXP_TEE_ARB_CMD_DW_LEN] = PXP_TEE_ARB_CMD_BIN;
+ u32 msg_out[PXP_TEE_ARB_CMD_DW_LEN] = {0};
+
+ mutex_lock(&i915->pxp_tee_comp_mutex);
+
+ ret = intel_pxp_tee_io_message(i915,
+ &msg_in,
+ sizeof(msg_in),
+ &msg_out, &msg_out_size_received,
+ sizeof(msg_out));
+
+ mutex_unlock(&i915->pxp_tee_comp_mutex);
+
+ if (ret)
+ drm_dbg(&i915->drm, "Failed to send/receive tee message\n");
+
+ return ret;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
index 4df077c906ae..a6d694c2277c 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
@@ -16,4 +16,10 @@ int pxp_tee_ioctl_io_message(struct drm_i915_private *i915,
void __user *msg_out_user_ptr, u32 *msg_out_size_ptr,
u32 msg_out_buf_size);
+int intel_pxp_tee_cmd_create_arb_session(struct drm_i915_private *i915);
+
+/* TEE command to create the arbitrary session */
+#define PXP_TEE_ARB_CMD_BIN {0x00040000, 0x0000001e, 0x00000000, 0x00000008, 0x00000002, 0x0000000f}
+#define PXP_TEE_ARB_CMD_DW_LEN (6)
+
#endif /* __INTEL_PXP_TEE_H__ */
--
2.17.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 21/27] drm/i915/pxp: Add i915 trace logs for PXP operations
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (18 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 20/27] drm/i915/pxp: Create the arbitrary session after boot Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 22/27] drm/i915/pxp: Expose session state for display protection flip Sean Z Huang
` (6 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Add several i915 trace logs for PXP calls for debugging or
performance measurement, including:
(1) PXP ioctl
(2) PXP teardown callbacks
To trun on this feature, we need to set
"CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS=y" in .config for compiling
the Linux kernel.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/i915_trace.h | 44 ++++++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp.c | 5 ++++
2 files changed, 49 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index a4addcc64978..36470e20dc61 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -1031,6 +1031,50 @@ DEFINE_EVENT(i915_context, i915_context_free,
TP_ARGS(ctx)
);
+TRACE_EVENT(i915_pxp_ops_ioctl,
+ TP_PROTO(struct drm_device *dev, void *data, struct drm_file *file, u32 action),
+ TP_ARGS(dev, data, file, action),
+
+ TP_STRUCT__entry(
+ __field(struct drm_device *, dev)
+ __field(void *, data)
+ __field(struct drm_file *, file)
+ __field(u32, action)
+ ),
+
+ TP_fast_assign(
+ __entry->dev = dev;
+ __entry->data = data;
+ __entry->file = file;
+ __entry->action = action;
+ ),
+
+ TP_printk("dev=%p, data=%p, file=%p, action=%u",
+ __entry->dev, __entry->data, __entry->file, __entry->action)
+);
+
+TRACE_EVENT(i915_pxp_teardown_required_callback,
+ TP_PROTO(bool global_state_attacked),
+ TP_ARGS(global_state_attacked),
+
+ TP_STRUCT__entry(__field(bool, global_state_attacked)),
+
+ TP_fast_assign(__entry->global_state_attacked = global_state_attacked;),
+
+ TP_printk("global_state_attacked=%s", yesno(__entry->global_state_attacked))
+);
+
+TRACE_EVENT(i915_pxp_global_terminate_complete_callback,
+ TP_PROTO(bool global_state_attacked),
+ TP_ARGS(global_state_attacked),
+
+ TP_STRUCT__entry(__field(bool, global_state_attacked)),
+
+ TP_fast_assign(__entry->global_state_attacked = global_state_attacked;),
+
+ TP_printk("global_state_attacked=%s", yesno(__entry->global_state_attacked))
+);
+
#endif /* _I915_TRACE_H_ */
/* This part must be outside protection */
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 80e632b614f5..23955d7a3c3d 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -8,6 +8,7 @@
#include "intel_pxp_context.h"
#include "intel_pxp_sm.h"
#include "intel_pxp_tee.h"
+#include "i915_trace.h"
int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile)
{
@@ -30,6 +31,7 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf
}
drm_dbg(&i915->drm, "i915 pxp ioctl call with action=[%d]\n", pxp_info.action);
+ trace_i915_pxp_ops_ioctl(dev, data, drmfile, pxp_info.action);
mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
@@ -219,6 +221,8 @@ static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915)
mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+ trace_i915_pxp_teardown_required_callback(i915->pxp.r0ctx->global_state_attacked);
+
return ret;
}
@@ -243,6 +247,7 @@ static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private
end:
mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+ trace_i915_pxp_global_terminate_complete_callback(i915->pxp.r0ctx->global_state_attacked);
drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
return ret;
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 22/27] drm/i915/pxp: Expose session state for display protection flip
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (19 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 21/27] drm/i915/pxp: Add i915 trace logs for PXP operations Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 23/27] mei: bus: enable pavp device Sean Z Huang
` (5 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Implement the intel_pxp_gem_object_status() to allow ring0 i915
display querying the current PXP session state. In the design,
ring0 display should not perform protection flip on the protected
buffers if there is no PXP session alive.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 8 ++++++++
drivers/gpu/drm/i915/pxp/intel_pxp.h | 2 ++
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 23955d7a3c3d..082c1aaabaa8 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -341,3 +341,11 @@ void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir)
end:
return;
}
+
+bool intel_pxp_gem_object_status(struct drm_i915_private *i915, u64 gem_object_metadata)
+{
+ if (i915->pxp.r0ctx && i915->pxp.r0ctx->flag_display_hm_surface_keys)
+ return true;
+ else
+ return false;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index c0119ccdab08..eb0e548ce434 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -111,4 +111,6 @@ int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915);
int intel_pxp_init(struct drm_i915_private *i915);
void intel_pxp_uninit(struct drm_i915_private *i915);
+bool intel_pxp_gem_object_status(struct drm_i915_private *i915, u64 gem_object_metadata);
+
#endif
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 23/27] mei: bus: enable pavp device.
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (20 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 22/27] drm/i915/pxp: Expose session state for display protection flip Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 24/27] mei: pxp: export pavp client to me client bus Sean Z Huang
` (4 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Tomas Winkler
From: Tomas Winkler <tomas.winkler@intel.com>
Enable protected audio video path client on mei client
bus.
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
---
drivers/misc/mei/bus-fixup.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
index 4e30fa98fe7d..042399b397c9 100644
--- a/drivers/misc/mei/bus-fixup.c
+++ b/drivers/misc/mei/bus-fixup.c
@@ -33,6 +33,9 @@ static const uuid_le mei_nfc_info_guid = MEI_UUID_NFC_INFO;
#define MEI_UUID_HDCP UUID_LE(0xB638AB7E, 0x94E2, 0x4EA2, \
0xA5, 0x52, 0xD1, 0xC5, 0x4B, 0x62, 0x7F, 0x04)
+#define MEI_UUID_PAVP UUID_LE(0xfbf6fcf1, 0x96cf, 0x4e2e, 0xA6, \
+ 0xa6, 0x1b, 0xab, 0x8c, 0xbe, 0x36, 0xb1)
+
#define MEI_UUID_ANY NULL_UUID_LE
/**
@@ -488,6 +491,7 @@ static struct mei_fixup {
MEI_FIXUP(MEI_UUID_MKHIF_FIX, mei_mkhi_fix),
MEI_FIXUP(MEI_UUID_HDCP, whitelist),
MEI_FIXUP(MEI_UUID_ANY, vt_support),
+ MEI_FIXUP(MEI_UUID_PAVP, whitelist),
};
/**
--
2.17.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 24/27] mei: pxp: export pavp client to me client bus
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (21 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 23/27] mei: bus: enable pavp device Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 25/27] drm/i915/uapi: introduce drm_i915_gem_create_ext for TGL Sean Z Huang
` (3 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Vitaly Lubart
From: Vitaly Lubart <vitaly.lubart@intel.com>
Export PAVP client to work with i915_cp driver,
for binding it uses kernel component framework.
Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
---
drivers/misc/mei/Kconfig | 2 +
drivers/misc/mei/Makefile | 1 +
drivers/misc/mei/pxp/Kconfig | 13 ++
drivers/misc/mei/pxp/Makefile | 7 +
drivers/misc/mei/pxp/mei_pxp.c | 230 +++++++++++++++++++++++++++++++++
drivers/misc/mei/pxp/mei_pxp.h | 18 +++
6 files changed, 271 insertions(+)
create mode 100644 drivers/misc/mei/pxp/Kconfig
create mode 100644 drivers/misc/mei/pxp/Makefile
create mode 100644 drivers/misc/mei/pxp/mei_pxp.c
create mode 100644 drivers/misc/mei/pxp/mei_pxp.h
diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index c06581ffa7bd..36884b0a6395 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -57,3 +57,5 @@ config INTEL_MEI_VIRTIO
device over virtio.
source "drivers/misc/mei/hdcp/Kconfig"
+source "drivers/misc/mei/pxp/Kconfig"
+
diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile
index 52aefaab5c1b..cab19c96ba7a 100644
--- a/drivers/misc/mei/Makefile
+++ b/drivers/misc/mei/Makefile
@@ -29,3 +29,4 @@ mei-$(CONFIG_EVENT_TRACING) += mei-trace.o
CFLAGS_mei-trace.o = -I$(src)
obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/
+obj-$(CONFIG_INTEL_MEI_PXP) += pxp/
diff --git a/drivers/misc/mei/pxp/Kconfig b/drivers/misc/mei/pxp/Kconfig
new file mode 100644
index 000000000000..4029b96afc04
--- /dev/null
+++ b/drivers/misc/mei/pxp/Kconfig
@@ -0,0 +1,13 @@
+
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2020, Intel Corporation. All rights reserved.
+#
+config INTEL_MEI_PXP
+ tristate "Intel PXP services of ME Interface"
+ select INTEL_MEI_ME
+ depends on DRM_I915
+ help
+ MEI Support for PXP Services on Intel platforms.
+
+ Enables the ME FW services required for PXP support through
+ I915 display driver of Intel.
diff --git a/drivers/misc/mei/pxp/Makefile b/drivers/misc/mei/pxp/Makefile
new file mode 100644
index 000000000000..0329950d5794
--- /dev/null
+++ b/drivers/misc/mei/pxp/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (c) 2020, Intel Corporation. All rights reserved.
+#
+# Makefile - PXP client driver for Intel MEI Bus Driver.
+
+obj-$(CONFIG_INTEL_MEI_PXP) += mei_pxp.o
diff --git a/drivers/misc/mei/pxp/mei_pxp.c b/drivers/misc/mei/pxp/mei_pxp.c
new file mode 100644
index 000000000000..5bd61fe445e3
--- /dev/null
+++ b/drivers/misc/mei/pxp/mei_pxp.c
@@ -0,0 +1,230 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright © 2020 Intel Corporation
+ */
+
+/**
+ * DOC: MEI_PXP Client Driver
+ *
+ * The mei_pxp driver acts as a translation layer between PXP
+ * protocol implementer (I915) and ME FW by translating PXP
+ * negotiation messages to ME FW command payloads and vice versa.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/uuid.h>
+#include <linux/mei_cl_bus.h>
+#include <linux/component.h>
+#include <drm/drm_connector.h>
+#include <drm/i915_component.h>
+#include <drm/i915_pxp_tee_interface.h>
+
+#include "mei_pxp.h"
+
+/**
+ * mei_pxp_send_message() - Sends a PXP message to ME FW.
+ * @dev: device corresponding to the mei_cl_device
+ * @message: a message buffer to send
+ * @size: size of the message
+ * Return: 0 on Success, <0 on Failure
+ */
+static int
+mei_pxp_send_message(struct device *dev, const void *message, size_t size)
+{
+ struct mei_cl_device *cldev;
+ ssize_t byte;
+
+ if (!dev || !message)
+ return -EINVAL;
+
+ cldev = to_mei_cl_device(dev);
+
+ /* temporary drop const qualifier till the API is fixed */
+ byte = mei_cldev_send(cldev, (u8 *)message, size);
+ if (byte < 0) {
+ dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ return 0;
+}
+
+/**
+ * mei_pxp_receive_message() - Receives a PXP message from ME FW.
+ * @dev: device corresponding to the mei_cl_device
+ * @buffer: a message buffer to contain the received message
+ * @size: size of the buffer
+ * Return: bytes sent on Success, <0 on Failure
+ */
+static int
+mei_pxp_receive_message(struct device *dev, void *buffer, size_t size)
+{
+ struct mei_cl_device *cldev;
+ ssize_t byte;
+
+ if (!dev || !buffer)
+ return -EINVAL;
+
+ cldev = to_mei_cl_device(dev);
+
+ byte = mei_cldev_recv(cldev, buffer, size);
+ if (byte < 0) {
+ dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+ return byte;
+ }
+
+ return byte;
+}
+
+static const struct i915_pxp_component_ops mei_pxp_ops = {
+ .owner = THIS_MODULE,
+ .send = mei_pxp_send_message,
+ .receive = mei_pxp_receive_message,
+};
+
+static int mei_component_master_bind(struct device *dev)
+{
+ struct mei_cl_device *cldev = to_mei_cl_device(dev);
+ struct i915_pxp_comp_master *comp_master = mei_cldev_get_drvdata(cldev);
+ int ret;
+
+ dev_dbg(dev, "%s\n", __func__);
+ comp_master->ops = &mei_pxp_ops;
+ comp_master->tee_dev = dev;
+ ret = component_bind_all(dev, comp_master);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+static void mei_component_master_unbind(struct device *dev)
+{
+ struct mei_cl_device *cldev = to_mei_cl_device(dev);
+ struct i915_pxp_comp_master *comp_master = mei_cldev_get_drvdata(cldev);
+
+ dev_dbg(dev, "%s\n", __func__);
+ component_unbind_all(dev, comp_master);
+}
+
+static const struct component_master_ops mei_component_master_ops = {
+ .bind = mei_component_master_bind,
+ .unbind = mei_component_master_unbind,
+};
+
+/**
+ * mei_pxp_component_match - compare function for matching mei pxp.
+ *
+ * The function checks if the driver is i915, the subcomponent is PXP
+ * and the grand parent of pxp and the parent of i915 are the same
+ * PCH device.
+ *
+ * @dev: master device
+ * @subcomponent: subcomponent to match (I915_COMPONENT_PXP)
+ * @data: compare data (mei pxp device)
+ *
+ * Return:
+ * * 1 - if components match
+ * * 0 - otherwise
+ */
+static int mei_pxp_component_match(struct device *dev, int subcomponent,
+ void *data)
+{
+ struct device *base = data;
+
+ if (subcomponent != I915_COMPONENT_PXP)
+ return 0;
+
+ if (strcmp(dev->driver->name, "i915") == 0) {
+ base = base->parent;
+ if (!base)
+ return 0;
+
+ base = base->parent;
+ dev = dev->parent;
+ return (base && dev && dev == base);
+ }
+
+ return 0;
+}
+
+static int mei_pxp_probe(struct mei_cl_device *cldev,
+ const struct mei_cl_device_id *id)
+{
+ struct i915_pxp_comp_master *comp_master;
+ struct component_match *master_match;
+ int ret;
+
+ ret = mei_cldev_enable(cldev);
+ if (ret < 0) {
+ dev_err(&cldev->dev, "mei_cldev_enable Failed. %d\n", ret);
+ goto enable_err_exit;
+ }
+
+ comp_master = kzalloc(sizeof(*comp_master), GFP_KERNEL);
+ if (!comp_master) {
+ ret = -ENOMEM;
+ goto err_exit;
+ }
+
+ master_match = NULL;
+ component_match_add_typed(&cldev->dev, &master_match,
+ mei_pxp_component_match, &cldev->dev);
+ if (IS_ERR_OR_NULL(master_match)) {
+ ret = -ENOMEM;
+ goto err_exit;
+ }
+
+ mei_cldev_set_drvdata(cldev, comp_master);
+ ret = component_master_add_with_match(&cldev->dev,
+ &mei_component_master_ops,
+ master_match);
+ if (ret < 0) {
+ dev_err(&cldev->dev, "Master comp add failed %d\n", ret);
+ goto err_exit;
+ }
+
+ return 0;
+
+err_exit:
+ mei_cldev_set_drvdata(cldev, NULL);
+ kfree(comp_master);
+ mei_cldev_disable(cldev);
+enable_err_exit:
+ return ret;
+}
+
+static int mei_pxp_remove(struct mei_cl_device *cldev)
+{
+ struct i915_pxp_comp_master *comp_master = mei_cldev_get_drvdata(cldev);
+
+ component_master_del(&cldev->dev, &mei_component_master_ops);
+ kfree(comp_master);
+ mei_cldev_set_drvdata(cldev, NULL);
+
+ return mei_cldev_disable(cldev);
+}
+
+/* fbf6fcf1-96cf-4e2e-a6a6-1bab8cbe36b1 : PAVP GUID*/
+#define MEI_GUID_PXP GUID_INIT(0xfbf6fcf1, 0x96cf, 0x4e2e, 0xA6, \
+ 0xa6, 0x1b, 0xab, 0x8c, 0xbe, 0x36, 0xb1)
+
+static struct mei_cl_device_id mei_pxp_tbl[] = {
+ { .uuid = MEI_GUID_PXP, .version = MEI_CL_VERSION_ANY },
+ { }
+};
+MODULE_DEVICE_TABLE(mei, mei_pxp_tbl);
+
+static struct mei_cl_driver mei_pxp_driver = {
+ .id_table = mei_pxp_tbl,
+ .name = KBUILD_MODNAME,
+ .probe = mei_pxp_probe,
+ .remove = mei_pxp_remove,
+};
+
+module_mei_cl_driver(mei_pxp_driver);
+
+MODULE_AUTHOR("Intel Corporation");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MEI PXP");
diff --git a/drivers/misc/mei/pxp/mei_pxp.h b/drivers/misc/mei/pxp/mei_pxp.h
new file mode 100644
index 000000000000..e7b15373fefd
--- /dev/null
+++ b/drivers/misc/mei/pxp/mei_pxp.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright © 2020 Intel Corporation
+ *
+ * Authors:
+ * Vitaly Lubart <vitaly.lubart@intel.com>
+ */
+
+#ifndef __MEI_PXP_H__
+#define __MEI_PXP_H__
+
+/* me_pxp_status: Enumeration of all PXP Status Codes */
+enum me_pxp_status {
+ ME_PXP_STATUS_SUCCESS = 0x0000,
+
+};
+
+#endif /* __MEI_PXP_H__ */
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 25/27] drm/i915/uapi: introduce drm_i915_gem_create_ext for TGL
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (22 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 24/27] mei: pxp: export pavp client to me client bus Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 26/27] drm/i915/pavp: User interface for Protected buffer Sean Z Huang
` (2 subsequent siblings)
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Joonas, Bommu Krishnaiah, Matthew
From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Same old gem_create but with now with extensions support. This is needed
to support various upcoming usecases. For now we use the extensions
mechanism to support PAVP.
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Cc: Joonas Lahtinen joonas.lahtinen@linux.intel.com
Cc: Matthew Auld matthew.auld@intel.com
Cc: Telukuntla Sreedhar <sreedhar.telukuntla@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 42 ++++++++++++++++++++++++++++-
include/uapi/drm/i915_drm.h | 47 +++++++++++++++++++++++++++++++++
3 files changed, 89 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 73c77a4e8216..a2b5b6f2723f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1742,7 +1742,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_GEM_CREATE_EXT, i915_gem_create_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_RENDER_ALLOW),
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 58276694c848..41698a823737 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -53,6 +53,7 @@
#include "i915_drv.h"
#include "i915_trace.h"
#include "i915_vgpu.h"
+#include "i915_user_extensions.h"
#include "intel_pm.h"
@@ -260,6 +261,35 @@ i915_gem_dumb_create(struct drm_file *file,
&args->size, &args->handle);
}
+struct create_ext {
+ struct drm_i915_private *i915;
+};
+
+static int __create_setparam(struct drm_i915_gem_object_param *args,
+ struct create_ext *ext_data)
+{
+ if (!(args->param & I915_OBJECT_PARAM)) {
+ DRM_DEBUG("Missing I915_OBJECT_PARAM namespace\n");
+ return -EINVAL;
+ }
+
+ return -EINVAL;
+}
+
+static int create_setparam(struct i915_user_extension __user *base, void *data)
+{
+ struct drm_i915_gem_create_ext_setparam ext;
+
+ if (copy_from_user(&ext, base, sizeof(ext)))
+ return -EFAULT;
+
+ return __create_setparam(&ext.param, data);
+}
+
+static const i915_user_extension_fn create_extensions[] = {
+ [I915_GEM_CREATE_EXT_SETPARAM] = create_setparam,
+};
+
/**
* Creates a new mm object and returns a handle to it.
* @dev: drm device pointer
@@ -271,10 +301,20 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
struct drm_file *file)
{
struct drm_i915_private *i915 = to_i915(dev);
- struct drm_i915_gem_create *args = data;
+ struct create_ext ext_data = { .i915 = i915 };
+ struct drm_i915_gem_create_ext *args = data;
+ int ret;
i915_gem_flush_free_objects(i915);
+ ret = i915_user_extensions(u64_to_user_ptr(args->extensions),
+ create_extensions,
+ ARRAY_SIZE(create_extensions),
+ &ext_data);
+ if (ret)
+ return ret;
+
+
return i915_gem_create(file,
intel_memory_region_by_type(i915,
INTEL_MEMORY_SYSTEM),
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 180f97fd91dc..97d4fefa7ad8 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -392,6 +392,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
#define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
#define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create)
+#define DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create_ext)
#define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread)
#define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite)
#define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap)
@@ -730,6 +731,27 @@ struct drm_i915_gem_create {
__u32 pad;
};
+struct drm_i915_gem_create_ext {
+ /**
+ * Requested size for the object.
+ *
+ * The (page-aligned) allocated size for the object will be returned.
+ */
+ __u64 size;
+ /**
+ * Returned handle for the object.
+ *
+ * Object handles are nonzero.
+ */
+ __u32 handle;
+ __u32 pad;
+#define I915_GEM_CREATE_EXT_SETPARAM (1u << 0)
+#define I915_GEM_CREATE_EXT_FLAGS_UNKNOWN \
+ (-(I915_GEM_CREATE_EXT_SETPARAM << 1))
+ __u64 extensions;
+
+};
+
struct drm_i915_gem_pread {
/** Handle for the object being read. */
__u32 handle;
@@ -1700,6 +1722,31 @@ struct drm_i915_gem_context_param {
__u64 value;
};
+struct drm_i915_gem_object_param {
+ /* Object handle (0 for I915_GEM_CREATE_EXT_SETPARAM) */
+ __u32 handle;
+
+ /* Data pointer size */
+ __u32 size;
+
+/*
+ * I915_OBJECT_PARAM:
+ *
+ * Select object namespace for the param.
+ */
+#define I915_OBJECT_PARAM (1ull<<32)
+
+ __u64 param;
+
+ /* Data value or pointer */
+ __u64 data;
+};
+
+struct drm_i915_gem_create_ext_setparam {
+ struct i915_user_extension base;
+ struct drm_i915_gem_object_param param;
+};
+
/**
* Context SSEU programming
*
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 26/27] drm/i915/pavp: User interface for Protected buffer
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (23 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 25/27] drm/i915/uapi: introduce drm_i915_gem_create_ext for TGL Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 27/27] drm/i915/pxp: Add plane decryption support Sean Z Huang
2020-11-14 1:59 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [01/27] drm/i915/pxp: Introduce Intel PXP component Patchwork
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Bommu Krishnaiah, Huang Sean Z, Kondapally Kalyan
From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
This api allow user mode to create Protected buffer and context creation.
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Cc: Telukuntla Sreedhar <sreedhar.telukuntla@intel.com>
Cc: Kondapally Kalyan <kalyan.kondapally@intel.com>
Cc: Gupta Anshuman <Anshuman.Gupta@intel.com>
Cc: Huang Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 ++++++++++--
drivers/gpu/drm/i915/gem/i915_gem_context.h | 10 ++++++++
.../gpu/drm/i915/gem/i915_gem_context_types.h | 2 +-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 5 ++++
drivers/gpu/drm/i915/i915_gem.c | 23 +++++++++++++++----
include/uapi/drm/i915_drm.h | 19 +++++++++++++++
6 files changed, 67 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 4fd38101bb56..1ca3265d6ca3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -2063,12 +2063,23 @@ static int ctx_setparam(struct drm_i915_file_private *fpriv,
case I915_CONTEXT_PARAM_RECOVERABLE:
if (args->size)
ret = -EINVAL;
- else if (args->value)
- i915_gem_context_set_recoverable(ctx);
+ else if (args->value) {
+ if (!i915_gem_context_is_protected(ctx))
+ i915_gem_context_set_recoverable(ctx);
+ else
+ ret = -EPERM;
+ }
else
i915_gem_context_clear_recoverable(ctx);
break;
+ case I915_CONTEXT_PARAM_PROTECTED_CONTENT:
+ if (args->size)
+ ret = -EINVAL;
+ else if (args->value)
+ i915_gem_context_set_protected(ctx);
+ break;
+
case I915_CONTEXT_PARAM_PRIORITY:
ret = set_priority(ctx, args);
break;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h b/drivers/gpu/drm/i915/gem/i915_gem_context.h
index a133f92bbedb..5897e7ca11a8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
@@ -70,6 +70,16 @@ static inline void i915_gem_context_set_recoverable(struct i915_gem_context *ctx
set_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags);
}
+static inline void i915_gem_context_set_protected(struct i915_gem_context *ctx)
+{
+ set_bit(UCONTEXT_PROTECTED, &ctx->user_flags);
+}
+
+static inline bool i915_gem_context_is_protected(struct i915_gem_context *ctx)
+{
+ return test_bit(UCONTEXT_PROTECTED, &ctx->user_flags);
+}
+
static inline void i915_gem_context_clear_recoverable(struct i915_gem_context *ctx)
{
clear_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index ae14ca24a11f..81ae94c2be86 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -135,7 +135,7 @@ struct i915_gem_context {
#define UCONTEXT_BANNABLE 2
#define UCONTEXT_RECOVERABLE 3
#define UCONTEXT_PERSISTENCE 4
-
+#define UCONTEXT_PROTECTED 5
/**
* @flags: small set of booleans
*/
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index e2d9b7e1e152..90ac955463f4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -161,6 +161,11 @@ struct drm_i915_gem_object {
} mmo;
I915_SELFTEST_DECLARE(struct list_head st_link);
+ /**
+ * @user_flags: small set of booleans set by the user
+ */
+ unsigned long user_flags;
+#define I915_BO_PROTECTED BIT(0)
unsigned long flags;
#define I915_BO_ALLOC_CONTIGUOUS BIT(0)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 41698a823737..6a791fd24eaa 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -184,7 +184,8 @@ static int
i915_gem_create(struct drm_file *file,
struct intel_memory_region *mr,
u64 *size_p,
- u32 *handle_p)
+ u32 *handle_p,
+ u64 user_flags)
{
struct drm_i915_gem_object *obj;
u32 handle;
@@ -204,6 +205,8 @@ i915_gem_create(struct drm_file *file,
if (IS_ERR(obj))
return PTR_ERR(obj);
+ obj->user_flags = user_flags;
+
ret = drm_gem_handle_create(file, &obj->base, &handle);
/* drop reference from allocate - handle holds it now */
i915_gem_object_put(obj);
@@ -258,11 +261,12 @@ i915_gem_dumb_create(struct drm_file *file,
return i915_gem_create(file,
intel_memory_region_by_type(to_i915(dev),
mem_type),
- &args->size, &args->handle);
+ &args->size, &args->handle, 0);
}
struct create_ext {
- struct drm_i915_private *i915;
+ struct drm_i915_private *i915;
+ unsigned long user_flags;
};
static int __create_setparam(struct drm_i915_gem_object_param *args,
@@ -273,6 +277,17 @@ static int __create_setparam(struct drm_i915_gem_object_param *args,
return -EINVAL;
}
+ switch (lower_32_bits(args->param)) {
+ case I915_PARAM_PROTECTED_CONTENT:
+ if (args->size) {
+ return -EINVAL;
+ } else if (args->data) {
+ ext_data->user_flags = args->data;
+ return 0;
+ }
+ break;
+ }
+
return -EINVAL;
}
@@ -318,7 +333,7 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
return i915_gem_create(file,
intel_memory_region_by_type(i915,
INTEL_MEMORY_SYSTEM),
- &args->size, &args->handle);
+ &args->size, &args->handle, ext_data.user_flags);
}
static int
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 97d4fefa7ad8..997591e377c0 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1717,6 +1717,15 @@ struct drm_i915_gem_context_param {
* Default is 16 KiB.
*/
#define I915_CONTEXT_PARAM_RINGSIZE 0xc
+
+/*
+ * I915_CONTEXT_PARAM_PROTECTED_CONTENT:
+ *
+ * If set to true (1) PAVP content protection is enabled.
+ * When enabled, the context is marked unrecoverable and may
+ * become invalid due to PAVP teardown event or other error.
+ */
+#define I915_CONTEXT_PARAM_PROTECTED_CONTENT 0xd
/* Must be kept compact -- no holes and well documented */
__u64 value;
@@ -1736,6 +1745,16 @@ struct drm_i915_gem_object_param {
*/
#define I915_OBJECT_PARAM (1ull<<32)
+/*
+ * I915_PARAM_PROTECTED_CONTENT:
+ *
+ * If set to true (1) buffer contents is expected to be protected by
+ * PAVP encryption and requires decryption for scan out and processing.
+ * Protected buffers can only be used in PAVP protected contexts.
+ * A protected buffer may become invalid as a result of PAVP teardown.
+ */
+#define I915_PARAM_PROTECTED_CONTENT 0x1
+
__u64 param;
/* Data value or pointer */
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] [PATCH 27/27] drm/i915/pxp: Add plane decryption support
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (24 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 26/27] drm/i915/pavp: User interface for Protected buffer Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 1:59 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [01/27] drm/i915/pxp: Introduce Intel PXP component Patchwork
26 siblings, 0 replies; 48+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Sean Z, Huang, Bommu Krishnaiah
From: Anshuman Gupta <anshuman.gupta@intel.com>
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. PAVP session is enabled.
2. Buffer object is protected.
v2:
- Rebased to libva_cp-drm-tip_tgl_cp tree.
- Used gen fb obj user_flags instead gem_object_metadata. [Krishna]
Cc: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Cc: Huang, Sean Z <sean.z.huang@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 21 ++++++++++++++++++---
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index a3ab44694118..12c549beb05f 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -39,6 +39,8 @@
#include <drm/drm_plane_helper.h>
#include <drm/drm_rect.h>
+#include "pxp/intel_pxp.h"
+
#include "i915_drv.h"
#include "i915_trace.h"
#include "i915_vgpu.h"
@@ -752,6 +754,11 @@ icl_program_input_csc(struct intel_plane *plane,
PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2), 0x0);
}
+static bool intel_fb_obj_protected(const struct drm_i915_gem_object *obj)
+{
+ return obj->user_flags & I915_BO_PROTECTED ? true : false;
+}
+
static void
skl_plane_async_flip(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
@@ -788,6 +795,7 @@ skl_program_plane(struct intel_plane *plane,
u32 surf_addr = plane_state->color_plane[color_plane].offset;
u32 stride = skl_plane_stride(plane_state, color_plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
+ const struct drm_i915_gem_object *obj = intel_fb_obj(fb);
int aux_plane = intel_main_to_aux_plane(fb, color_plane);
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
@@ -798,7 +806,7 @@ skl_program_plane(struct intel_plane *plane,
u8 alpha = plane_state->hw.alpha >> 8;
u32 plane_color_ctl = 0, aux_dist = 0;
unsigned long irqflags;
- u32 keymsk, keymax;
+ u32 keymsk, keymax, plane_surf;
u32 plane_ctl = plane_state->ctl;
plane_ctl |= skl_plane_ctl_crtc(crtc_state);
@@ -874,8 +882,15 @@ skl_program_plane(struct intel_plane *plane,
* the control register just before the surface register.
*/
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
- intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
- intel_plane_ggtt_offset(plane_state) + surf_addr);
+ plane_surf = intel_plane_ggtt_offset(plane_state) + surf_addr;
+
+ if (intel_pxp_gem_object_status(dev_priv, obj->user_flags) &&
+ intel_fb_obj_protected(obj))
+ plane_surf |= PLANE_SURF_DECRYPTION_ENABLED;
+ else
+ plane_surf &= ~PLANE_SURF_DECRYPTION_ENABLED;
+
+ intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), plane_surf);
if (plane_state->scaler_id >= 0)
skl_program_scaler(plane, crtc_state, plane_state);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5c51c9df8b28..0ac7678cd6ba 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7206,6 +7206,7 @@ enum {
#define _PLANE_SURF_3(pipe) _PIPE(pipe, _PLANE_SURF_3_A, _PLANE_SURF_3_B)
#define PLANE_SURF(pipe, plane) \
_MMIO_PLANE(plane, _PLANE_SURF_1(pipe), _PLANE_SURF_2(pipe))
+#define PLANE_SURF_DECRYPTION_ENABLED REG_BIT(2)
#define _PLANE_OFFSET_1_B 0x711a4
#define _PLANE_OFFSET_2_B 0x712a4
--
2.17.1
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^ permalink raw reply related [flat|nested] 48+ messages in thread* [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [01/27] drm/i915/pxp: Introduce Intel PXP component
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
` (25 preceding siblings ...)
2020-11-14 1:45 ` [Intel-gfx] [PATCH 27/27] drm/i915/pxp: Add plane decryption support Sean Z Huang
@ 2020-11-14 1:59 ` Patchwork
26 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2020-11-14 1:59 UTC (permalink / raw)
To: Sean Z Huang; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/27] drm/i915/pxp: Introduce Intel PXP component
URL : https://patchwork.freedesktop.org/series/83845/
State : failure
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_pm.h
In file included from <command-line>:
./drivers/gpu/drm/i915/pxp/intel_pxp_pm.h:9:42: error: ‘struct drm_i915_private’ declared inside parameter list will not be visible outside of this definition or declaration [-Werror]
void intel_pxp_pm_prepare_suspend(struct drm_i915_private *i915);
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/pxp/intel_pxp_pm.h:11:39: error: ‘struct drm_i915_private’ declared inside parameter list will not be visible outside of this definition or declaration [-Werror]
void intel_pxp_pm_resume_early(struct drm_i915_private *i915);
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/pxp/intel_pxp_pm.h:12:32: error: ‘struct drm_i915_private’ declared inside parameter list will not be visible outside of this definition or declaration [-Werror]
int intel_pxp_pm_resume(struct drm_i915_private *i915);
^~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
drivers/gpu/drm/i915/Makefile:312: recipe for target 'drivers/gpu/drm/i915/pxp/intel_pxp_pm.hdrtest' failed
make[4]: *** [drivers/gpu/drm/i915/pxp/intel_pxp_pm.hdrtest] Error 1
scripts/Makefile.build:500: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:500: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:500: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1799: recipe for target 'drivers' failed
make: *** [drivers] Error 2
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^ permalink raw reply [flat|nested] 48+ messages in thread