* Re: [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
@ 2020-11-14 17:12 kernel test robot
0 siblings, 0 replies; 8+ messages in thread
From: kernel test robot @ 2020-11-14 17:12 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 4237 bytes --]
CC: kbuild-all(a)lists.01.org
In-Reply-To: <20201114014537.25495-8-sean.z.huang@intel.com>
References: <20201114014537.25495-8-sean.z.huang@intel.com>
TO: Sean Z Huang <sean.z.huang@intel.com>
TO: Intel-gfx(a)lists.freedesktop.org
CC: "Huang, Sean Z" <sean.z.huang@intel.com>
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
:::::: branch date: 15 hours ago
:::::: commit date: 15 hours ago
config: i386-randconfig-c001-20201113 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Julia Lawall <julia.lawall@lip6.fr>
"coccinelle warnings: (new ones prefixed by >>)"
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:203:17-20: ERROR: i915 is NULL but dereferenced.
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:97:17-20: ERROR: i915 is NULL but dereferenced.
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:123:17-20: ERROR: i915 is NULL but dereferenced.
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:171:17-20: ERROR: i915 is NULL but dereferenced.
vim +203 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
c0c82470e52f958 Huang, Sean Z 2020-11-13 188
c0c82470e52f958 Huang, Sean Z 2020-11-13 189 /**
c0c82470e52f958 Huang, Sean Z 2020-11-13 190 * check_if_protected_type0_sessions_are_attacked - To check if type0 active sessions are attacked.
c0c82470e52f958 Huang, Sean Z 2020-11-13 191 * @i915: i915 device handle.
c0c82470e52f958 Huang, Sean Z 2020-11-13 192 *
c0c82470e52f958 Huang, Sean Z 2020-11-13 193 * Return: true if HW shows protected sessions are attacked, false otherwise.
c0c82470e52f958 Huang, Sean Z 2020-11-13 194 */
c0c82470e52f958 Huang, Sean Z 2020-11-13 195 static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915)
c0c82470e52f958 Huang, Sean Z 2020-11-13 196 {
c0c82470e52f958 Huang, Sean Z 2020-11-13 197 i915_reg_t kcr_status_reg = KCR_STATUS_1;
c0c82470e52f958 Huang, Sean Z 2020-11-13 198 u32 reg_value = 0;
c0c82470e52f958 Huang, Sean Z 2020-11-13 199 u32 mask = 0x80000000;
c0c82470e52f958 Huang, Sean Z 2020-11-13 200 int ret;
c0c82470e52f958 Huang, Sean Z 2020-11-13 201
c0c82470e52f958 Huang, Sean Z 2020-11-13 202 if (!i915) {
c0c82470e52f958 Huang, Sean Z 2020-11-13 @203 drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
c0c82470e52f958 Huang, Sean Z 2020-11-13 204 goto end;
c0c82470e52f958 Huang, Sean Z 2020-11-13 205 }
c0c82470e52f958 Huang, Sean Z 2020-11-13 206
c0c82470e52f958 Huang, Sean Z 2020-11-13 207 if (i915->pxp.r0ctx->global_state_attacked)
c0c82470e52f958 Huang, Sean Z 2020-11-13 208 return true;
c0c82470e52f958 Huang, Sean Z 2020-11-13 209
c0c82470e52f958 Huang, Sean Z 2020-11-13 210 ret = pxp_sm_reg_read(i915, kcr_status_reg.reg, ®_value);
c0c82470e52f958 Huang, Sean Z 2020-11-13 211 if (ret) {
c0c82470e52f958 Huang, Sean Z 2020-11-13 212 drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read\n");
c0c82470e52f958 Huang, Sean Z 2020-11-13 213 goto end;
c0c82470e52f958 Huang, Sean Z 2020-11-13 214 }
c0c82470e52f958 Huang, Sean Z 2020-11-13 215
c0c82470e52f958 Huang, Sean Z 2020-11-13 216 if (reg_value & mask)
c0c82470e52f958 Huang, Sean Z 2020-11-13 217 return true;
c0c82470e52f958 Huang, Sean Z 2020-11-13 218 end:
c0c82470e52f958 Huang, Sean Z 2020-11-13 219 return false;
c0c82470e52f958 Huang, Sean Z 2020-11-13 220 }
c0c82470e52f958 Huang, Sean Z 2020-11-13 221
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 36612 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
2020-11-15 21:07 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Huang, Sean Z
@ 2020-11-15 21:07 ` Huang, Sean Z
0 siblings, 0 replies; 8+ messages in thread
From: Huang, Sean Z @ 2020-11-15 21:07 UTC (permalink / raw)
To: Intel-gfx
Implement the functions to check the hardware protected session
state via reading the hardware register session in play.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 +
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 176 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 51 +++++++
3 files changed, 230 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 21a6964fc64e..95d3deba7ade 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -12,6 +12,9 @@
#define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2)
#define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3)
+#define pxp_session_list(i915, session_type) (((session_type) == SESSION_TYPE_TYPE0) ? \
+ &(i915)->pxp.r0ctx->active_pxp_type0_sessions : &(i915)->pxp.r0ctx->active_pxp_type1_sessions)
+
#define MAX_TYPE0_SESSIONS 16
#define MAX_TYPE1_SESSIONS 6
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 763d194c5f4c..68d421976e33 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -10,6 +10,21 @@
#include "intel_pxp_sm.h"
#include "intel_pxp_context.h"
+static int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
+{
+ intel_wakeref_t wakeref;
+
+ if (!i915 || !regval)
+ return -EINVAL;
+
+ with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
+ i915_reg_t reg_offset = {offset};
+ *regval = intel_uncore_read(&i915->uncore, reg_offset);
+ }
+
+ return 0;
+}
+
static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
{
intel_wakeref_t wakeref;
@@ -26,6 +41,167 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
return 0;
}
+/**
+ * is_sw_session_active - Check if the given sw session id is active.
+ * @i915: i915 device handle.
+ * @session_type: Specified session type
+ * @session_index: Numeric session identifier.
+ * @is_in_play: Set false to return true if the specified session is active.
+ * Set true to also check if the session is active and in_play.
+ * @protection_mode: get the protection mode of specified session.
+ *
+ * The caller needs to use ctx_mutex lock to protect the session_list
+ * inside this function.
+ *
+ * Return : true if session with the same identifier is active (and in_play).
+ */
+static bool is_sw_session_active(struct drm_i915_private *i915, int session_type,
+ int session_index, bool is_in_play, int *protection_mode)
+{
+ struct pxp_protected_session *current_session;
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ list_for_each_entry(current_session, pxp_session_list(i915, session_type), session_list) {
+ if (current_session->session_index == session_index) {
+ if (protection_mode)
+ *protection_mode = current_session->protection_mode;
+
+ if (is_in_play && !current_session->session_is_in_play)
+ return false;
+
+ return true;
+ }
+ }
+
+ /* session id not found. return false */
+ return false;
+}
+
+static bool is_hw_type0_session_in_play(struct drm_i915_private *i915, int session_index)
+{
+ u32 regval_sip = 0;
+ u32 reg_session_id_mask;
+ bool hw_session_is_in_play = false;
+ int ret = 0;
+
+ if (!i915 || session_index < 0 || session_index >= MAX_TYPE0_SESSIONS)
+ goto end;
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_SIP.reg, ®val_sip);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to read()\n");
+ goto end;
+ }
+
+ reg_session_id_mask = (1 << session_index);
+ hw_session_is_in_play = (bool)(regval_sip & reg_session_id_mask);
+end:
+ return hw_session_is_in_play;
+}
+
+static bool is_hw_type1_session_in_play(struct drm_i915_private *i915, int session_index)
+{
+ int ret = 0;
+ u32 regval_tsip_low = 0;
+ u32 regval_tsip_high = 0;
+ u64 reg_session_id_mask;
+ u64 regval_tsip;
+ bool hw_session_is_in_play = false;
+
+ if (!i915 || session_index < 0 || session_index >= MAX_TYPE1_SESSIONS)
+ goto end;
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_LOW.reg, ®val_tsip_low);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read()\n");
+ goto end;
+ }
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_HIGH.reg, ®val_tsip_high);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read()\n");
+ goto end;
+ }
+
+ reg_session_id_mask = (1 << session_index);
+ regval_tsip = ((u64)regval_tsip_high << 32) | regval_tsip_low;
+ hw_session_is_in_play = (bool)(regval_tsip & reg_session_id_mask);
+end:
+ return hw_session_is_in_play;
+}
+
+static bool is_hw_session_in_play(struct drm_i915_private *i915,
+ int session_type, int session_index)
+{
+ bool is_in_play = false;
+
+ if (session_type == SESSION_TYPE_TYPE0)
+ is_in_play = is_hw_type0_session_in_play(i915, session_index);
+ else if (session_type == SESSION_TYPE_TYPE1)
+ is_in_play = is_hw_type1_session_in_play(i915, session_index);
+ else
+ drm_dbg(&i915->drm, "Failed to %s invalid session_type=[%d]\n", __func__, session_type);
+
+ return is_in_play;
+}
+
+/* check hw session in play reg if match the current sw state */
+static int sync_hw_sw_state(struct drm_i915_private *i915, int session_index, int session_type)
+{
+ const int max_retry = 10;
+ const int ms_delay = 10;
+ int retry = 0;
+ int ret;
+
+ if (!i915 || session_type >= SESSION_TYPE_MAX)
+ return -EINVAL;
+
+ ret = -EINVAL;
+ for (retry = 0; retry < max_retry; retry++) {
+ if (is_hw_session_in_play(i915, session_type, session_index) ==
+ is_sw_session_active(i915, session_type, session_index, true, NULL)) {
+ ret = 0;
+ break;
+ }
+
+ msleep(ms_delay);
+ }
+
+ return ret;
+}
+
+/**
+ * check_if_protected_type0_sessions_are_attacked - To check if type0 active sessions are attacked.
+ * @i915: i915 device handle.
+ *
+ * Return: true if HW shows protected sessions are attacked, false otherwise.
+ */
+static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915)
+{
+ i915_reg_t kcr_status_reg = KCR_STATUS_1;
+ u32 reg_value = 0;
+ u32 mask = 0x80000000;
+ int ret;
+
+ if (!i915)
+ return false;
+
+ if (i915->pxp.r0ctx->global_state_attacked)
+ return true;
+
+ ret = pxp_sm_reg_read(i915, kcr_status_reg.reg, ®_value);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read\n");
+ goto end;
+ }
+
+ if (reg_value & mask)
+ return true;
+end:
+ return false;
+}
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
{
int ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index d061f395aa16..222a879be96d 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -15,6 +15,57 @@
/* Setting KCR Init bit is required after system boot */
#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) << KCR_INIT_MASK_SHIFT))
+#define KCR_STATUS_1 _MMIO(0x320f4)
+#define GEN12_KCR_SIP _MMIO(0x32260) /* KCR type0 session in play 0-31 */
+#define GEN12_KCR_TSIP_LOW _MMIO(0x32264) /* KCR type1 session in play 0-31 */
+#define GEN12_KCR_TSIP_HIGH _MMIO(0x32268) /* KCR type1 session in play 32-63 */
+
+enum pxp_session_types {
+ SESSION_TYPE_TYPE0 = 0,
+ SESSION_TYPE_TYPE1 = 1,
+
+ SESSION_TYPE_MAX
+};
+
+enum pxp_protection_modes {
+ PROTECTION_MODE_NONE = 0,
+ PROTECTION_MODE_LM = 2,
+ PROTECTION_MODE_HM = 3,
+ PROTECTION_MODE_SM = 6,
+
+ PROTECTION_MODE_ALL
+};
+
+/**
+ * struct pxp_protected_session - linked list to track all active sessions.
+ */
+struct pxp_protected_session {
+ /** @session_list: linked list infrastructure, do not change its order. */
+ struct list_head session_list;
+
+ /** @session_index: Numeric identifier for this protected session */
+ int session_index;
+ /** @session_type: Type of session */
+ int session_type;
+ /** @protection_mode: mode of protection requested */
+ int protection_mode;
+ /** @context_id: context identifier of the protected session requestor */
+ int context_id;
+ /** @pid: pid of this session's creator */
+ int pid;
+ /** @drmfile: pointer to drm_file, which is allocated on device file open() call */
+ struct drm_file *drmfile;
+
+ /**
+ * @session_is_in_play: indicates whether the session has been established
+ * in the HW root of trust if this flag is false, it
+ * indicates an application has reserved this session,
+ * but has not * established the session in the
+ * hardware yet.
+ */
+ bool session_is_in_play;
+};
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
2020-11-15 20:23 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Huang, Sean Z
@ 2020-11-15 20:23 ` Huang, Sean Z
0 siblings, 0 replies; 8+ messages in thread
From: Huang, Sean Z @ 2020-11-15 20:23 UTC (permalink / raw)
To: Intel-gfx
Implement the functions to check the hardware protected session
state via reading the hardware register session in play.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 +
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 176 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 51 +++++++
3 files changed, 230 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 21a6964fc64e..95d3deba7ade 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -12,6 +12,9 @@
#define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2)
#define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3)
+#define pxp_session_list(i915, session_type) (((session_type) == SESSION_TYPE_TYPE0) ? \
+ &(i915)->pxp.r0ctx->active_pxp_type0_sessions : &(i915)->pxp.r0ctx->active_pxp_type1_sessions)
+
#define MAX_TYPE0_SESSIONS 16
#define MAX_TYPE1_SESSIONS 6
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 763d194c5f4c..68d421976e33 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -10,6 +10,21 @@
#include "intel_pxp_sm.h"
#include "intel_pxp_context.h"
+static int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
+{
+ intel_wakeref_t wakeref;
+
+ if (!i915 || !regval)
+ return -EINVAL;
+
+ with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
+ i915_reg_t reg_offset = {offset};
+ *regval = intel_uncore_read(&i915->uncore, reg_offset);
+ }
+
+ return 0;
+}
+
static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
{
intel_wakeref_t wakeref;
@@ -26,6 +41,167 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
return 0;
}
+/**
+ * is_sw_session_active - Check if the given sw session id is active.
+ * @i915: i915 device handle.
+ * @session_type: Specified session type
+ * @session_index: Numeric session identifier.
+ * @is_in_play: Set false to return true if the specified session is active.
+ * Set true to also check if the session is active and in_play.
+ * @protection_mode: get the protection mode of specified session.
+ *
+ * The caller needs to use ctx_mutex lock to protect the session_list
+ * inside this function.
+ *
+ * Return : true if session with the same identifier is active (and in_play).
+ */
+static bool is_sw_session_active(struct drm_i915_private *i915, int session_type,
+ int session_index, bool is_in_play, int *protection_mode)
+{
+ struct pxp_protected_session *current_session;
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ list_for_each_entry(current_session, pxp_session_list(i915, session_type), session_list) {
+ if (current_session->session_index == session_index) {
+ if (protection_mode)
+ *protection_mode = current_session->protection_mode;
+
+ if (is_in_play && !current_session->session_is_in_play)
+ return false;
+
+ return true;
+ }
+ }
+
+ /* session id not found. return false */
+ return false;
+}
+
+static bool is_hw_type0_session_in_play(struct drm_i915_private *i915, int session_index)
+{
+ u32 regval_sip = 0;
+ u32 reg_session_id_mask;
+ bool hw_session_is_in_play = false;
+ int ret = 0;
+
+ if (!i915 || session_index < 0 || session_index >= MAX_TYPE0_SESSIONS)
+ goto end;
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_SIP.reg, ®val_sip);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to read()\n");
+ goto end;
+ }
+
+ reg_session_id_mask = (1 << session_index);
+ hw_session_is_in_play = (bool)(regval_sip & reg_session_id_mask);
+end:
+ return hw_session_is_in_play;
+}
+
+static bool is_hw_type1_session_in_play(struct drm_i915_private *i915, int session_index)
+{
+ int ret = 0;
+ u32 regval_tsip_low = 0;
+ u32 regval_tsip_high = 0;
+ u64 reg_session_id_mask;
+ u64 regval_tsip;
+ bool hw_session_is_in_play = false;
+
+ if (!i915 || session_index < 0 || session_index >= MAX_TYPE1_SESSIONS)
+ goto end;
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_LOW.reg, ®val_tsip_low);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read()\n");
+ goto end;
+ }
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_HIGH.reg, ®val_tsip_high);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read()\n");
+ goto end;
+ }
+
+ reg_session_id_mask = (1 << session_index);
+ regval_tsip = ((u64)regval_tsip_high << 32) | regval_tsip_low;
+ hw_session_is_in_play = (bool)(regval_tsip & reg_session_id_mask);
+end:
+ return hw_session_is_in_play;
+}
+
+static bool is_hw_session_in_play(struct drm_i915_private *i915,
+ int session_type, int session_index)
+{
+ bool is_in_play = false;
+
+ if (session_type == SESSION_TYPE_TYPE0)
+ is_in_play = is_hw_type0_session_in_play(i915, session_index);
+ else if (session_type == SESSION_TYPE_TYPE1)
+ is_in_play = is_hw_type1_session_in_play(i915, session_index);
+ else
+ drm_dbg(&i915->drm, "Failed to %s invalid session_type=[%d]\n", __func__, session_type);
+
+ return is_in_play;
+}
+
+/* check hw session in play reg if match the current sw state */
+static int sync_hw_sw_state(struct drm_i915_private *i915, int session_index, int session_type)
+{
+ const int max_retry = 10;
+ const int ms_delay = 10;
+ int retry = 0;
+ int ret;
+
+ if (!i915 || session_type >= SESSION_TYPE_MAX)
+ return -EINVAL;
+
+ ret = -EINVAL;
+ for (retry = 0; retry < max_retry; retry++) {
+ if (is_hw_session_in_play(i915, session_type, session_index) ==
+ is_sw_session_active(i915, session_type, session_index, true, NULL)) {
+ ret = 0;
+ break;
+ }
+
+ msleep(ms_delay);
+ }
+
+ return ret;
+}
+
+/**
+ * check_if_protected_type0_sessions_are_attacked - To check if type0 active sessions are attacked.
+ * @i915: i915 device handle.
+ *
+ * Return: true if HW shows protected sessions are attacked, false otherwise.
+ */
+static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915)
+{
+ i915_reg_t kcr_status_reg = KCR_STATUS_1;
+ u32 reg_value = 0;
+ u32 mask = 0x80000000;
+ int ret;
+
+ if (!i915)
+ return false;
+
+ if (i915->pxp.r0ctx->global_state_attacked)
+ return true;
+
+ ret = pxp_sm_reg_read(i915, kcr_status_reg.reg, ®_value);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read\n");
+ goto end;
+ }
+
+ if (reg_value & mask)
+ return true;
+end:
+ return false;
+}
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
{
int ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index 59ce2394b590..a3149c18c831 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -14,6 +14,57 @@
/* Setting KCR Init bit is required after system boot */
#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) << KCR_INIT_MASK_SHIFT))
+#define KCR_STATUS_1 _MMIO(0x320f4)
+#define GEN12_KCR_SIP _MMIO(0x32260) /* KCR type0 session in play 0-31 */
+#define GEN12_KCR_TSIP_LOW _MMIO(0x32264) /* KCR type1 session in play 0-31 */
+#define GEN12_KCR_TSIP_HIGH _MMIO(0x32268) /* KCR type1 session in play 32-63 */
+
+enum pxp_session_types {
+ SESSION_TYPE_TYPE0 = 0,
+ SESSION_TYPE_TYPE1 = 1,
+
+ SESSION_TYPE_MAX
+};
+
+enum pxp_protection_modes {
+ PROTECTION_MODE_NONE = 0,
+ PROTECTION_MODE_LM = 2,
+ PROTECTION_MODE_HM = 3,
+ PROTECTION_MODE_SM = 6,
+
+ PROTECTION_MODE_ALL
+};
+
+/**
+ * struct pxp_protected_session - linked list to track all active sessions.
+ */
+struct pxp_protected_session {
+ /** @session_list: linked list infrastructure, do not change its order. */
+ struct list_head session_list;
+
+ /** @session_index: Numeric identifier for this protected session */
+ int session_index;
+ /** @session_type: Type of session */
+ int session_type;
+ /** @protection_mode: mode of protection requested */
+ int protection_mode;
+ /** @context_id: context identifier of the protected session requestor */
+ int context_id;
+ /** @pid: pid of this session's creator */
+ int pid;
+ /** @drmfile: pointer to drm_file, which is allocated on device file open() call */
+ struct drm_file *drmfile;
+
+ /**
+ * @session_is_in_play: indicates whether the session has been established
+ * in the HW root of trust if this flag is false, it
+ * indicates an application has reserved this session,
+ * but has not * established the session in the
+ * hardware yet.
+ */
+ bool session_is_in_play;
+};
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
2020-11-14 1:45 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Sean Z Huang
@ 2020-11-14 5:14 ` kernel test robot
2020-11-14 5:14 ` kernel test robot
1 sibling, 0 replies; 8+ messages in thread
From: kernel test robot @ 2020-11-14 5:14 UTC (permalink / raw)
To: Sean Z Huang, Intel-gfx; +Cc: clang-built-linux, Huang, Sean Z, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3398 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: x86_64-randconfig-a004-20201113 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 9a85643cd357e412cff69067bb5c4840e228c2ab)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/c0c82470e52f95847f54cd65e470ba01a13d71ab
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout c0c82470e52f95847f54cd65e470ba01a13d71ab
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:5: warning: no previous prototype for function 'pxp_sm_reg_read' [-Wmissing-prototypes]
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
static
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:162:12: warning: unused function 'sync_hw_sw_state' [-Wunused-function]
static int sync_hw_sw_state(struct drm_i915_private *i915, int session_index, int session_type)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:195:13: warning: unused function 'check_if_protected_type0_sessions_are_attacked' [-Wunused-function]
static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915)
^
3 warnings generated.
vim +/pxp_sm_reg_read +13 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
12
> 13 int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
14 {
15 intel_wakeref_t wakeref;
16 int err = 0;
17
18 if (!i915 || !regval) {
19 err = -EINVAL;
20 drm_dbg(&i915->drm, "Failed to %s bad params\n", __func__);
21 goto end;
22 }
23
24 with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
25 i915_reg_t reg_offset = {offset};
26 *regval = intel_uncore_read(&i915->uncore, reg_offset);
27 }
28 end:
29 return err;
30 }
31
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 35034 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
@ 2020-11-14 5:14 ` kernel test robot
0 siblings, 0 replies; 8+ messages in thread
From: kernel test robot @ 2020-11-14 5:14 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3473 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: x86_64-randconfig-a004-20201113 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 9a85643cd357e412cff69067bb5c4840e228c2ab)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/c0c82470e52f95847f54cd65e470ba01a13d71ab
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout c0c82470e52f95847f54cd65e470ba01a13d71ab
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:5: warning: no previous prototype for function 'pxp_sm_reg_read' [-Wmissing-prototypes]
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
^
static
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:162:12: warning: unused function 'sync_hw_sw_state' [-Wunused-function]
static int sync_hw_sw_state(struct drm_i915_private *i915, int session_index, int session_type)
^
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:195:13: warning: unused function 'check_if_protected_type0_sessions_are_attacked' [-Wunused-function]
static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915)
^
3 warnings generated.
vim +/pxp_sm_reg_read +13 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
12
> 13 int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
14 {
15 intel_wakeref_t wakeref;
16 int err = 0;
17
18 if (!i915 || !regval) {
19 err = -EINVAL;
20 drm_dbg(&i915->drm, "Failed to %s bad params\n", __func__);
21 goto end;
22 }
23
24 with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
25 i915_reg_t reg_offset = {offset};
26 *regval = intel_uncore_read(&i915->uncore, reg_offset);
27 }
28 end:
29 return err;
30 }
31
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 35034 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
2020-11-14 1:45 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Sean Z Huang
@ 2020-11-14 5:04 ` kernel test robot
2020-11-14 5:14 ` kernel test robot
1 sibling, 0 replies; 8+ messages in thread
From: kernel test robot @ 2020-11-14 5:04 UTC (permalink / raw)
To: Sean Z Huang, Intel-gfx; +Cc: Huang, Sean Z, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 1724 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: i386-randconfig-s001-20201114 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-107-gaf3512a6-dirty
# https://github.com/0day-ci/linux/commit/c0c82470e52f95847f54cd65e470ba01a13d71ab
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout c0c82470e52f95847f54cd65e470ba01a13d71ab
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
"sparse warnings: (new ones prefixed by >>)"
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:5: sparse: sparse: symbol 'pxp_sm_reg_read' was not declared. Should it be static?
Please review and possibly fold the followup patch.
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 27612 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
@ 2020-11-14 5:04 ` kernel test robot
0 siblings, 0 replies; 8+ messages in thread
From: kernel test robot @ 2020-11-14 5:04 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 1763 bytes --]
Hi Sean,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20201113]
[also build test WARNING on v5.10-rc3]
[cannot apply to drm-intel/for-linux-next char-misc/char-misc-testing v5.10-rc3 v5.10-rc2 v5.10-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
base: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
config: i386-randconfig-s001-20201114 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-107-gaf3512a6-dirty
# https://github.com/0day-ci/linux/commit/c0c82470e52f95847f54cd65e470ba01a13d71ab
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sean-Z-Huang/drm-i915-pxp-Introduce-Intel-PXP-component/20201114-094926
git checkout c0c82470e52f95847f54cd65e470ba01a13d71ab
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
"sparse warnings: (new ones prefixed by >>)"
>> drivers/gpu/drm/i915/pxp/intel_pxp_sm.c:13:5: sparse: sparse: symbol 'pxp_sm_reg_read' was not declared. Should it be static?
Please review and possibly fold the followup patch.
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 27612 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
@ 2020-11-14 1:45 ` Sean Z Huang
2020-11-14 5:04 ` kernel test robot
2020-11-14 5:14 ` kernel test robot
0 siblings, 2 replies; 8+ messages in thread
From: Sean Z Huang @ 2020-11-14 1:45 UTC (permalink / raw)
To: Intel-gfx; +Cc: Huang, Sean Z
From: "Huang, Sean Z" <sean.z.huang@intel.com>
Implement the functions to check the hardware protected session
state via reading the hardware register session in play.
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 +
drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 189 ++++++++++++++++++++++++
drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 51 +++++++
3 files changed, 243 insertions(+)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 21a6964fc64e..95d3deba7ade 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -12,6 +12,9 @@
#define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2)
#define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3)
+#define pxp_session_list(i915, session_type) (((session_type) == SESSION_TYPE_TYPE0) ? \
+ &(i915)->pxp.r0ctx->active_pxp_type0_sessions : &(i915)->pxp.r0ctx->active_pxp_type1_sessions)
+
#define MAX_TYPE0_SESSIONS 16
#define MAX_TYPE1_SESSIONS 6
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
index 75e4b229d9f8..3dd5a9e3926b 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c
@@ -10,6 +10,25 @@
#include "intel_pxp_sm.h"
#include "intel_pxp_context.h"
+int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval)
+{
+ intel_wakeref_t wakeref;
+ int err = 0;
+
+ if (!i915 || !regval) {
+ err = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s bad params\n", __func__);
+ goto end;
+ }
+
+ with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
+ i915_reg_t reg_offset = {offset};
+ *regval = intel_uncore_read(&i915->uncore, reg_offset);
+ }
+end:
+ return err;
+}
+
static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
{
intel_wakeref_t wakeref;
@@ -30,6 +49,176 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval)
return err;
}
+/**
+ * is_sw_session_active - Check if the given sw session id is active.
+ * @i915: i915 device handle.
+ * @session_type: Specified session type
+ * @session_index: Numeric session identifier.
+ * @is_in_play: Set false to return true if the specified session is active.
+ * Set true to also check if the session is active and in_play.
+ * @protection_mode: get the protection mode of specified session.
+ *
+ * The caller needs to use ctx_mutex lock to protect the session_list
+ * inside this function.
+ *
+ * Return : true if session with the same identifier is active (and in_play).
+ */
+static bool is_sw_session_active(struct drm_i915_private *i915, int session_type,
+ int session_index, bool is_in_play, int *protection_mode)
+{
+ struct pxp_protected_session *current_session;
+
+ lockdep_assert_held(&i915->pxp.r0ctx->ctx_mutex);
+
+ list_for_each_entry(current_session, pxp_session_list(i915, session_type), session_list) {
+ if (current_session->session_index == session_index) {
+ if (protection_mode)
+ *protection_mode = current_session->protection_mode;
+
+ if (is_in_play && !current_session->session_is_in_play)
+ return false;
+
+ return true;
+ }
+ }
+
+ /* session id not found. return false */
+ return false;
+}
+
+static bool is_hw_type0_session_in_play(struct drm_i915_private *i915, int session_index)
+{
+ u32 regval_sip = 0;
+ u32 reg_session_id_mask;
+ bool hw_session_is_in_play = false;
+ int ret = 0;
+
+ if (!i915 || session_index < 0 || session_index >= MAX_TYPE0_SESSIONS) {
+ drm_dbg(&i915->drm, "Failed to %s due to invalid params", __func__);
+ goto end;
+ }
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_SIP.reg, ®val_sip);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to read()\n");
+ goto end;
+ }
+
+ reg_session_id_mask = (1 << session_index);
+ hw_session_is_in_play = (bool)(regval_sip & reg_session_id_mask);
+end:
+ return hw_session_is_in_play;
+}
+
+static bool is_hw_type1_session_in_play(struct drm_i915_private *i915, int session_index)
+{
+ int ret = 0;
+ u32 regval_tsip_low = 0;
+ u32 regval_tsip_high = 0;
+ u64 reg_session_id_mask;
+ u64 regval_tsip;
+ bool hw_session_is_in_play = false;
+
+ if (!i915 || session_index < 0 || session_index >= MAX_TYPE1_SESSIONS) {
+ drm_dbg(&i915->drm, "Failed to %s due to invalid params", __func__);
+ goto end;
+ }
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_LOW.reg, ®val_tsip_low);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read()\n");
+ goto end;
+ }
+
+ ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_HIGH.reg, ®val_tsip_high);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read()\n");
+ goto end;
+ }
+
+ reg_session_id_mask = (1 << session_index);
+ regval_tsip = ((u64)regval_tsip_high << 32) | regval_tsip_low;
+ hw_session_is_in_play = (bool)(regval_tsip & reg_session_id_mask);
+end:
+ return hw_session_is_in_play;
+}
+
+static bool is_hw_session_in_play(struct drm_i915_private *i915,
+ int session_type, int session_index)
+{
+ bool is_in_play = false;
+
+ if (session_type == SESSION_TYPE_TYPE0)
+ is_in_play = is_hw_type0_session_in_play(i915, session_index);
+ else if (session_type == SESSION_TYPE_TYPE1)
+ is_in_play = is_hw_type1_session_in_play(i915, session_index);
+ else
+ drm_dbg(&i915->drm, "Failed to %s invalid session_type=[%d]\n", __func__, session_type);
+
+ return is_in_play;
+}
+
+/* check hw session in play reg if match the current sw state */
+static int sync_hw_sw_state(struct drm_i915_private *i915, int session_index, int session_type)
+{
+ const int max_retry = 10;
+ const int ms_delay = 10;
+ int retry = 0;
+ int ret;
+
+ if (!i915 || session_type >= SESSION_TYPE_MAX) {
+ ret = -EINVAL;
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ ret = -EINVAL;
+ for (retry = 0; retry < max_retry; retry++) {
+ if (is_hw_session_in_play(i915, session_type, session_index) ==
+ is_sw_session_active(i915, session_type, session_index, true, NULL)) {
+ ret = 0;
+ break;
+ }
+
+ msleep(ms_delay);
+ }
+end:
+ return ret;
+}
+
+/**
+ * check_if_protected_type0_sessions_are_attacked - To check if type0 active sessions are attacked.
+ * @i915: i915 device handle.
+ *
+ * Return: true if HW shows protected sessions are attacked, false otherwise.
+ */
+static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915)
+{
+ i915_reg_t kcr_status_reg = KCR_STATUS_1;
+ u32 reg_value = 0;
+ u32 mask = 0x80000000;
+ int ret;
+
+ if (!i915) {
+ drm_dbg(&i915->drm, "Failed to %s, bad params\n", __func__);
+ goto end;
+ }
+
+ if (i915->pxp.r0ctx->global_state_attacked)
+ return true;
+
+ ret = pxp_sm_reg_read(i915, kcr_status_reg.reg, ®_value);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to pxp_sm_reg_read\n");
+ goto end;
+ }
+
+ if (reg_value & mask)
+ return true;
+end:
+ return false;
+}
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915)
{
int ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
index 59ce2394b590..a3149c18c831 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h
@@ -14,6 +14,57 @@
/* Setting KCR Init bit is required after system boot */
#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) << KCR_INIT_MASK_SHIFT))
+#define KCR_STATUS_1 _MMIO(0x320f4)
+#define GEN12_KCR_SIP _MMIO(0x32260) /* KCR type0 session in play 0-31 */
+#define GEN12_KCR_TSIP_LOW _MMIO(0x32264) /* KCR type1 session in play 0-31 */
+#define GEN12_KCR_TSIP_HIGH _MMIO(0x32268) /* KCR type1 session in play 32-63 */
+
+enum pxp_session_types {
+ SESSION_TYPE_TYPE0 = 0,
+ SESSION_TYPE_TYPE1 = 1,
+
+ SESSION_TYPE_MAX
+};
+
+enum pxp_protection_modes {
+ PROTECTION_MODE_NONE = 0,
+ PROTECTION_MODE_LM = 2,
+ PROTECTION_MODE_HM = 3,
+ PROTECTION_MODE_SM = 6,
+
+ PROTECTION_MODE_ALL
+};
+
+/**
+ * struct pxp_protected_session - linked list to track all active sessions.
+ */
+struct pxp_protected_session {
+ /** @session_list: linked list infrastructure, do not change its order. */
+ struct list_head session_list;
+
+ /** @session_index: Numeric identifier for this protected session */
+ int session_index;
+ /** @session_type: Type of session */
+ int session_type;
+ /** @protection_mode: mode of protection requested */
+ int protection_mode;
+ /** @context_id: context identifier of the protected session requestor */
+ int context_id;
+ /** @pid: pid of this session's creator */
+ int pid;
+ /** @drmfile: pointer to drm_file, which is allocated on device file open() call */
+ struct drm_file *drmfile;
+
+ /**
+ * @session_is_in_play: indicates whether the session has been established
+ * in the HW root of trust if this flag is false, it
+ * indicates an application has reserved this session,
+ * but has not * established the session in the
+ * hardware yet.
+ */
+ bool session_is_in_play;
+};
+
int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915);
#endif /* __INTEL_PXP_SM_H__ */
--
2.17.1
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end of thread, other threads:[~2020-11-15 21:08 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-14 17:12 [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state kernel test robot
-- strict thread matches above, loose matches on Subject: below --
2020-11-15 21:07 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Huang, Sean Z
2020-11-15 21:07 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Huang, Sean Z
2020-11-15 20:23 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Huang, Sean Z
2020-11-15 20:23 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Huang, Sean Z
2020-11-14 1:45 [Intel-gfx] [PATCH 01/27] drm/i915/pxp: Introduce Intel PXP component Sean Z Huang
2020-11-14 1:45 ` [Intel-gfx] [PATCH 08/27] drm/i915/pxp: Read register to check hardware session state Sean Z Huang
2020-11-14 5:04 ` kernel test robot
2020-11-14 5:04 ` kernel test robot
2020-11-14 5:14 ` kernel test robot
2020-11-14 5:14 ` kernel test robot
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