From: Daniel Palmer <daniel@0x0f.com> To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, w@1wt.eu, Daniel Palmer <daniel@0x0f.com> Subject: [PATCH 2/6] dt-bindings: clk: mstar msc313 mpll binding description Date: Sat, 14 Nov 2020 22:50:40 +0900 [thread overview] Message-ID: <20201114135044.724385-3-daniel@0x0f.com> (raw) In-Reply-To: <20201114135044.724385-1-daniel@0x0f.com> Add a binding description for the MStar/SigmaStar MPLL clock block. Signed-off-by: Daniel Palmer <daniel@0x0f.com> --- .../bindings/clock/mstar,msc313-mpll.yaml | 58 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml diff --git a/Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml b/Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml new file mode 100644 index 000000000000..9ddc1163b31b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mstar,msc313-mpll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar/Sigmastar MSC313 MPLL + +maintainers: + - Daniel Palmer <daniel@thingy.jp> + +description: | + The MStar/SigmaStar MSC313 and later ARMv7 chips have an MPLL block that + takes the external xtal input and multiplies it to create a high + frequency clock and divides that down into a number of clocks that + peripherals use. + +properties: + compatible: + const: mstar,msc313-mpll + + "#clock-cells": + const: 1 + + clocks: + maxItems: 1 + + clock-output-names: + minItems: 8 + maxItems: 8 + description: | + This should provide a name for the internal PLL clock and then + a name for each of the divided outputs. + + reg: + maxItems: 1 + +required: + - compatible + - "#clock-cells" + - clocks + - clock-output-names + - reg + +additionalProperties: false + +examples: + - | + mpll@206000 { + compatible = "mstar,msc313-mpll"; + reg = <0x206000 0x200>; + #clock-cells = <1>; + clocks = <&xtal>; + clock-output-names = "mpll", "mpll_div_2", + "mpll_div_3", "mpll_div_4", + "mpll_div_5", "mpll_div_6", + "mpll_div_7", "mpll_div_10"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 1e874fda810e..d1c98a6f9f24 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2131,6 +2131,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained W: http://linux-chenxing.org/ F: Documentation/devicetree/bindings/arm/mstar/* +F: Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml F: Documentation/devicetree/bindings/gpio/mstar,msc313-gpio.yaml F: arch/arm/boot/dts/mstar-* F: arch/arm/mach-mstar/ -- 2.29.2
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Palmer <daniel@0x0f.com> To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org Cc: Daniel Palmer <daniel@0x0f.com>, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, w@1wt.eu Subject: [PATCH 2/6] dt-bindings: clk: mstar msc313 mpll binding description Date: Sat, 14 Nov 2020 22:50:40 +0900 [thread overview] Message-ID: <20201114135044.724385-3-daniel@0x0f.com> (raw) In-Reply-To: <20201114135044.724385-1-daniel@0x0f.com> Add a binding description for the MStar/SigmaStar MPLL clock block. Signed-off-by: Daniel Palmer <daniel@0x0f.com> --- .../bindings/clock/mstar,msc313-mpll.yaml | 58 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml diff --git a/Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml b/Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml new file mode 100644 index 000000000000..9ddc1163b31b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mstar,msc313-mpll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar/Sigmastar MSC313 MPLL + +maintainers: + - Daniel Palmer <daniel@thingy.jp> + +description: | + The MStar/SigmaStar MSC313 and later ARMv7 chips have an MPLL block that + takes the external xtal input and multiplies it to create a high + frequency clock and divides that down into a number of clocks that + peripherals use. + +properties: + compatible: + const: mstar,msc313-mpll + + "#clock-cells": + const: 1 + + clocks: + maxItems: 1 + + clock-output-names: + minItems: 8 + maxItems: 8 + description: | + This should provide a name for the internal PLL clock and then + a name for each of the divided outputs. + + reg: + maxItems: 1 + +required: + - compatible + - "#clock-cells" + - clocks + - clock-output-names + - reg + +additionalProperties: false + +examples: + - | + mpll@206000 { + compatible = "mstar,msc313-mpll"; + reg = <0x206000 0x200>; + #clock-cells = <1>; + clocks = <&xtal>; + clock-output-names = "mpll", "mpll_div_2", + "mpll_div_3", "mpll_div_4", + "mpll_div_5", "mpll_div_6", + "mpll_div_7", "mpll_div_10"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 1e874fda810e..d1c98a6f9f24 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2131,6 +2131,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained W: http://linux-chenxing.org/ F: Documentation/devicetree/bindings/arm/mstar/* +F: Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml F: Documentation/devicetree/bindings/gpio/mstar,msc313-gpio.yaml F: arch/arm/boot/dts/mstar-* F: arch/arm/mach-mstar/ -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-11-14 13:52 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-14 13:50 [PATCH 0/6] ARM: mstar: Basic MPLL support Daniel Palmer 2020-11-14 13:50 ` Daniel Palmer 2020-11-14 13:50 ` [PATCH 1/6] dt-bindings: clk: mstar msc313 mpll binding header Daniel Palmer 2020-11-14 13:50 ` Daniel Palmer 2020-12-07 19:02 ` Rob Herring 2020-12-07 19:02 ` Rob Herring 2020-11-14 13:50 ` Daniel Palmer [this message] 2020-11-14 13:50 ` [PATCH 2/6] dt-bindings: clk: mstar msc313 mpll binding description Daniel Palmer 2020-12-07 19:03 ` Rob Herring 2020-12-07 19:03 ` Rob Herring 2020-12-20 3:39 ` Stephen Boyd 2020-12-20 3:39 ` Stephen Boyd 2020-12-20 6:35 ` Daniel Palmer 2020-12-20 6:35 ` Daniel Palmer 2020-12-20 18:44 ` Stephen Boyd 2020-12-20 18:44 ` Stephen Boyd 2020-12-21 8:51 ` Daniel Palmer 2020-12-21 8:51 ` Daniel Palmer 2021-02-10 2:29 ` Stephen Boyd 2021-02-10 2:29 ` Stephen Boyd 2021-02-11 2:28 ` Daniel Palmer 2021-02-11 2:28 ` Daniel Palmer 2021-02-11 2:55 ` Stephen Boyd 2021-02-11 2:55 ` Stephen Boyd 2020-11-14 13:50 ` [PATCH 3/6] clk: mstar: MStar/SigmaStar MPLL driver Daniel Palmer 2020-11-14 13:50 ` Daniel Palmer 2020-12-20 4:36 ` Stephen Boyd 2020-12-20 4:36 ` Stephen Boyd 2020-12-20 6:42 ` Daniel Palmer 2020-12-20 6:42 ` Daniel Palmer 2020-12-20 18:43 ` Stephen Boyd 2020-12-20 18:43 ` Stephen Boyd 2020-12-21 8:40 ` Daniel Palmer 2020-12-21 8:40 ` Daniel Palmer 2020-11-14 13:50 ` [PATCH 4/6] ARM: mstar: Select MSTAR_MSC313_MPLL Daniel Palmer 2020-11-14 13:50 ` Daniel Palmer 2020-11-14 13:50 ` [PATCH 5/6] ARM: mstar: Add the external clocks to the base dsti Daniel Palmer 2020-11-14 13:50 ` Daniel Palmer 2020-11-14 13:50 ` [PATCH 6/6] ARM: mstar: Add mpll to base dtsi Daniel Palmer 2020-11-14 13:50 ` Daniel Palmer
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