From: Steen Hegelund <steen.hegelund@microchip.com> To: "David S. Miller" <davem@davemloft.net>, Jakub Kicinski <kuba@kernel.org>, Rob Herring <robh+dt@kernel.org>, Device Tree List <devicetree@vger.kernel.org> Cc: Steen Hegelund <steen.hegelund@microchip.com>, Andrew Lunn <andrew@lunn.ch>, Russell King <linux@armlinux.org.uk>, Lars Povlsen <lars.povlsen@microchip.com>, Bjarni Jonasson <bjarni.jonasson@microchip.com>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, Alexandre Belloni <alexandre.belloni@bootlin.com>, Madalin Bucur <madalin.bucur@oss.nxp.com>, Nicolas Ferre <nicolas.ferre@microchip.com>, Mark Einon <mark.einon@gmail.com>, Masahiro Yamada <masahiroy@kernel.org>, Arnd Bergmann <arnd@arndb.de>, <netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org> Subject: [RFC PATCH v2 1/8] dt-bindings: net: sparx5: Add sparx5-switch bindings Date: Thu, 17 Dec 2020 08:51:27 +0100 [thread overview] Message-ID: <20201217075134.919699-2-steen.hegelund@microchip.com> (raw) In-Reply-To: <20201217075134.919699-1-steen.hegelund@microchip.com> Document the Sparx5 switch device driver bindings Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> --- .../bindings/net/microchip,sparx5-switch.yaml | 178 ++++++++++++++++++ 1 file changed, 178 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml new file mode 100644 index 000000000000..6e3ef8285e9a --- /dev/null +++ b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 Ethernet switch controller + +maintainers: + - Lars Povlsen <lars.povlsen@microchip.com> + - Steen Hegelund <steen.hegelund@microchip.com> + +description: | + The SparX-5 Enterprise Ethernet switch family provides a rich set of + Enterprise switching features such as advanced TCAM-based VLAN and + QoS processing enabling delivery of differentiated services, and + security through TCAM-based frame processing using versatile content + aware processor (VCAP). + + IPv4/IPv6 Layer 3 (L3) unicast and multicast routing is supported + with up to 18K IPv4/9K IPv6 unicast LPM entries and up to 9K IPv4/3K + IPv6 (S,G) multicast groups. + + L3 security features include source guard and reverse path + forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and + IP tunnels (IP over GRE/IP). + + The SparX-5 switch family targets managed Layer 2 and Layer 3 + equipment in SMB, SME, and Enterprise where high port count + 1G/2.5G/5G/10G switching with 10G/25G aggregation links is required. + +properties: + $nodename: + pattern: "^switch@[0-9a-f]+$" + + compatible: + const: microchip,sparx5-switch + + reg: + minItems: 2 + + reg-names: + minItems: 2 + items: + - const: devices + - const: gcb + + interrupts: + maxItems: 1 + description: Interrupt used for reception of packets to the CPU + + ethernet-ports: + type: object + properties: + '#address-cells': + const: 1 + '#size-cells': + const: 0 + + patternProperties: + "^port@[0-9]+$": + type: object + description: Switch ports + + allOf: + - $ref: ethernet-controller.yaml# + + properties: + reg: + description: Switch port number + + max-speed: + maxItems: 1 + description: Bandwidth allocated to this port + + phys: + description: phandle of a Ethernet Serdes PHY + + phy-handle: + description: phandle of a Ethernet PHY + + phy-mode: + description: Interface between the serdes and the phy + + sfp: + description: phandle of an SFP + + managed: + maxItems: 1 + description: SFP management + + required: + - reg + - max-speed + - phys + + oneOf: + - required: + - phy-handle + - phy-mode + - required: + - sfp + - managed + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - interrupts + - ethernet-ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + switch: switch@600000000 { + compatible = "microchip,sparx5-switch"; + reg = <0x10000000 0x800000>, + <0x11010000 0x1b00000>; + reg-names = "devices", "gcb"; + + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port0: port@0 { + reg = <0>; + max-speed = <1000>; + phys = <&serdes 13>; + phy-handle = <&phy0>; + phy-mode = "qsgmii"; + }; + /* ... */ + /* Then the 25G interfaces */ + port60: port@60 { + reg = <60>; + max-speed = <25000>; + phys = <&serdes 29>; + sfp = <&sfp_eth60>; + managed = "in-band-status"; + }; + port61: port@61 { + reg = <61>; + max-speed = <25000>; + phys = <&serdes 30>; + sfp = <&sfp_eth61>; + managed = "in-band-status"; + }; + port62: port@62 { + reg = <62>; + max-speed = <25000>; + phys = <&serdes 31>; + sfp = <&sfp_eth62>; + managed = "in-band-status"; + }; + port63: port@63 { + reg = <63>; + max-speed = <25000>; + phys = <&serdes 32>; + sfp = <&sfp_eth63>; + managed = "in-band-status"; + }; + /* Finally the Management interface */ + port64: port@64 { + reg = <64>; + max-speed = <1000>; + phys = <&serdes 0>; + phy-handle = <&phy64>; + phy-mode = "sgmii"; + }; + }; + }; + +... -- 2.29.2
WARNING: multiple messages have this Message-ID (diff)
From: Steen Hegelund <steen.hegelund@microchip.com> To: "David S. Miller" <davem@davemloft.net>, Jakub Kicinski <kuba@kernel.org>, Rob Herring <robh+dt@kernel.org>, Device Tree List <devicetree@vger.kernel.org> Cc: Andrew Lunn <andrew@lunn.ch>, Alexandre Belloni <alexandre.belloni@bootlin.com>, linux-kernel@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>, Bjarni Jonasson <bjarni.jonasson@microchip.com>, Madalin Bucur <madalin.bucur@oss.nxp.com>, netdev@vger.kernel.org, Steen Hegelund <steen.hegelund@microchip.com>, Russell King <linux@armlinux.org.uk>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, linux-arm-kernel@lists.infradead.org, Mark Einon <mark.einon@gmail.com>, Masahiro Yamada <masahiroy@kernel.org>, Lars Povlsen <lars.povlsen@microchip.com> Subject: [RFC PATCH v2 1/8] dt-bindings: net: sparx5: Add sparx5-switch bindings Date: Thu, 17 Dec 2020 08:51:27 +0100 [thread overview] Message-ID: <20201217075134.919699-2-steen.hegelund@microchip.com> (raw) In-Reply-To: <20201217075134.919699-1-steen.hegelund@microchip.com> Document the Sparx5 switch device driver bindings Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> --- .../bindings/net/microchip,sparx5-switch.yaml | 178 ++++++++++++++++++ 1 file changed, 178 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml new file mode 100644 index 000000000000..6e3ef8285e9a --- /dev/null +++ b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 Ethernet switch controller + +maintainers: + - Lars Povlsen <lars.povlsen@microchip.com> + - Steen Hegelund <steen.hegelund@microchip.com> + +description: | + The SparX-5 Enterprise Ethernet switch family provides a rich set of + Enterprise switching features such as advanced TCAM-based VLAN and + QoS processing enabling delivery of differentiated services, and + security through TCAM-based frame processing using versatile content + aware processor (VCAP). + + IPv4/IPv6 Layer 3 (L3) unicast and multicast routing is supported + with up to 18K IPv4/9K IPv6 unicast LPM entries and up to 9K IPv4/3K + IPv6 (S,G) multicast groups. + + L3 security features include source guard and reverse path + forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and + IP tunnels (IP over GRE/IP). + + The SparX-5 switch family targets managed Layer 2 and Layer 3 + equipment in SMB, SME, and Enterprise where high port count + 1G/2.5G/5G/10G switching with 10G/25G aggregation links is required. + +properties: + $nodename: + pattern: "^switch@[0-9a-f]+$" + + compatible: + const: microchip,sparx5-switch + + reg: + minItems: 2 + + reg-names: + minItems: 2 + items: + - const: devices + - const: gcb + + interrupts: + maxItems: 1 + description: Interrupt used for reception of packets to the CPU + + ethernet-ports: + type: object + properties: + '#address-cells': + const: 1 + '#size-cells': + const: 0 + + patternProperties: + "^port@[0-9]+$": + type: object + description: Switch ports + + allOf: + - $ref: ethernet-controller.yaml# + + properties: + reg: + description: Switch port number + + max-speed: + maxItems: 1 + description: Bandwidth allocated to this port + + phys: + description: phandle of a Ethernet Serdes PHY + + phy-handle: + description: phandle of a Ethernet PHY + + phy-mode: + description: Interface between the serdes and the phy + + sfp: + description: phandle of an SFP + + managed: + maxItems: 1 + description: SFP management + + required: + - reg + - max-speed + - phys + + oneOf: + - required: + - phy-handle + - phy-mode + - required: + - sfp + - managed + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - interrupts + - ethernet-ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + switch: switch@600000000 { + compatible = "microchip,sparx5-switch"; + reg = <0x10000000 0x800000>, + <0x11010000 0x1b00000>; + reg-names = "devices", "gcb"; + + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port0: port@0 { + reg = <0>; + max-speed = <1000>; + phys = <&serdes 13>; + phy-handle = <&phy0>; + phy-mode = "qsgmii"; + }; + /* ... */ + /* Then the 25G interfaces */ + port60: port@60 { + reg = <60>; + max-speed = <25000>; + phys = <&serdes 29>; + sfp = <&sfp_eth60>; + managed = "in-band-status"; + }; + port61: port@61 { + reg = <61>; + max-speed = <25000>; + phys = <&serdes 30>; + sfp = <&sfp_eth61>; + managed = "in-band-status"; + }; + port62: port@62 { + reg = <62>; + max-speed = <25000>; + phys = <&serdes 31>; + sfp = <&sfp_eth62>; + managed = "in-band-status"; + }; + port63: port@63 { + reg = <63>; + max-speed = <25000>; + phys = <&serdes 32>; + sfp = <&sfp_eth63>; + managed = "in-band-status"; + }; + /* Finally the Management interface */ + port64: port@64 { + reg = <64>; + max-speed = <1000>; + phys = <&serdes 0>; + phy-handle = <&phy64>; + phy-mode = "sgmii"; + }; + }; + }; + +... -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-12-17 7:53 UTC|newest] Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-12-17 7:51 [RFC PATCH v2 0/8] Adding the Sparx5 Switch Driver Steen Hegelund 2020-12-17 7:51 ` Steen Hegelund 2020-12-17 7:51 ` Steen Hegelund [this message] 2020-12-17 7:51 ` [RFC PATCH v2 1/8] dt-bindings: net: sparx5: Add sparx5-switch bindings Steen Hegelund 2020-12-19 17:54 ` Andrew Lunn 2020-12-19 17:54 ` Andrew Lunn 2020-12-21 0:55 ` Florian Fainelli 2020-12-21 0:55 ` Florian Fainelli 2020-12-21 10:00 ` Steen Hegelund 2020-12-21 10:00 ` Steen Hegelund 2020-12-21 21:40 ` Rob Herring 2020-12-21 21:40 ` Rob Herring 2020-12-22 7:30 ` Steen Hegelund 2020-12-22 7:30 ` Steen Hegelund 2020-12-17 7:51 ` [RFC PATCH v2 2/8] net: sparx5: add the basic sparx5 driver Steen Hegelund 2020-12-19 19:11 ` Andrew Lunn 2020-12-19 19:11 ` Andrew Lunn 2020-12-22 13:50 ` Steen Hegelund 2020-12-22 13:50 ` Steen Hegelund 2020-12-22 15:01 ` Andrew Lunn 2020-12-22 15:01 ` Andrew Lunn 2020-12-22 16:56 ` Alexandre Belloni 2020-12-22 16:56 ` Alexandre Belloni 2020-12-23 9:03 ` Lars Povlsen 2020-12-23 9:03 ` Lars Povlsen 2020-12-23 8:52 ` Steen Hegelund 2020-12-23 8:52 ` Steen Hegelund 2020-12-17 7:51 ` [RFC PATCH v2 3/8] net: sparx5: add hostmode with phylink support Steen Hegelund 2020-12-17 7:51 ` Steen Hegelund 2020-12-19 19:51 ` Andrew Lunn 2020-12-19 19:51 ` Andrew Lunn 2020-12-22 9:46 ` Steen Hegelund 2020-12-22 9:46 ` Steen Hegelund 2020-12-22 14:41 ` Andrew Lunn 2020-12-22 14:41 ` Andrew Lunn 2020-12-23 13:29 ` Steen Hegelund 2020-12-23 13:29 ` Steen Hegelund 2020-12-23 20:58 ` Alexandre Belloni 2020-12-23 20:58 ` Alexandre Belloni 2020-12-23 21:05 ` Andrew Lunn 2020-12-23 21:05 ` Andrew Lunn 2020-12-17 7:51 ` [RFC PATCH v2 4/8] net: sparx5: add port module support Steen Hegelund 2020-12-17 7:51 ` Steen Hegelund 2020-12-20 23:35 ` Andrew Lunn 2020-12-20 23:35 ` Andrew Lunn 2020-12-22 14:55 ` Bjarni Jonasson 2020-12-22 14:55 ` Bjarni Jonasson 2020-12-22 15:08 ` Andrew Lunn 2020-12-22 15:08 ` Andrew Lunn 2020-12-17 7:51 ` [RFC PATCH v2 5/8] net: sparx5: add switching, vlan and mactable support Steen Hegelund 2020-12-17 7:51 ` Steen Hegelund 2020-12-21 0:25 ` Andrew Lunn 2020-12-21 0:25 ` Andrew Lunn 2020-12-23 13:54 ` Steen Hegelund 2020-12-23 13:54 ` Steen Hegelund 2020-12-17 7:51 ` [RFC PATCH v2 6/8] net: sparx5: add calendar bandwidth allocation support Steen Hegelund 2020-12-17 7:51 ` Steen Hegelund 2020-12-17 7:51 ` [RFC PATCH v2 7/8] net: sparx5: add ethtool configuration and statistics support Steen Hegelund 2020-12-17 7:51 ` Steen Hegelund 2020-12-19 23:31 ` Andrew Lunn 2020-12-19 23:31 ` Andrew Lunn 2020-12-17 7:51 ` [RFC PATCH v2 8/8] arm64: dts: sparx5: Add the Sparx5 switch node Steen Hegelund 2020-12-17 7:51 ` Steen Hegelund 2020-12-19 20:24 ` Andrew Lunn 2020-12-19 20:24 ` Andrew Lunn 2020-12-23 14:31 ` Steen Hegelund 2020-12-23 14:31 ` Steen Hegelund 2020-12-23 15:49 ` Andrew Lunn 2020-12-23 15:49 ` Andrew Lunn 2020-12-21 0:58 ` [RFC PATCH v2 0/8] Adding the Sparx5 Switch Driver Florian Fainelli 2020-12-21 0:58 ` Florian Fainelli 2020-12-21 14:31 ` Steen Hegelund 2020-12-21 14:31 ` Steen Hegelund 2020-12-22 11:29 ` Lars Povlsen 2020-12-22 11:29 ` Lars Povlsen
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