From: Krzysztof Kozlowski <krzk@kernel.org> To: Jagan Teki <jagan@amarulasolutions.com> Cc: Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Li Yang <leoyang.li@nxp.com>, Fabio Estevam <festevam@gmail.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team <linux-imx@nxp.com>, linux-amarula@amarulasolutions.com, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Matteo Lisi <matteo.lisi@engicam.com> Subject: Re: [PATCH v2 3/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM Date: Mon, 21 Dec 2020 14:52:32 +0100 [thread overview] Message-ID: <20201221135232.GC31176@kozik-lap> (raw) In-Reply-To: <20201221113151.94515-4-jagan@amarulasolutions.com> On Mon, Dec 21, 2020 at 05:01:48PM +0530, Jagan Teki wrote: > i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini > from Engicam. > > General features: > - NXP i.MX8M Mini > - Up to 2GB LDDR4 > - 8/16GB eMMC > - Gigabit Ethernet > - USB 2.0 Host/OTG > - PCIe Gen2 interface > - I2S > - MIPI DSI to LVDS > - rest of i.MX8M Mini features > > i.Core MX8M Mini needs to mount on top of Engicam baseboards > for creating complete platform solutions. > > Add support for it. > > Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > Changes for v2: > - updated commit message > - add cpu nodes > - add fec1 node > - fixed pmic tree comments > - dropped engicam from filename since it aligned with imx6 engicam > dts files naming conventions. Thanks for the changes. > > .../dts/freescale/imx8mm-icore-mx8mm.dtsi | 232 ++++++++++++++++++ > 1 file changed, 232 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi > new file mode 100644 > index 000000000000..e67865fd102a > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi > @@ -0,0 +1,232 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2018 NXP > + * Copyright (c) 2019 Engicam srl > + * Copyright (c) 2020 Amarula Solutons(India) > + */ > + > +/ { > + compatible = "engicam,icore-mx8mm", "fsl,imx8mm"; > +}; > + > +&A53_0 { > + cpu-supply = <®_buck4>; > +}; > + > +&A53_1 { > + cpu-supply = <®_buck4>; > +}; > + > +&A53_2 { > + cpu-supply = <®_buck4>; > +}; > + > +&A53_3 { > + cpu-supply = <®_buck4>; > +}; > + > +&fec1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_fec1>; > + phy-mode = "rgmii-id"; > + phy-handle = <ðphy>; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy: ethernet-phy@3 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <3>; > + reset-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; > + reset-assert-us = <10000>; > + }; > + }; > +}; > + > +&i2c1 { > + clock-frequency = <400000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_i2c1>; > + status = "okay"; > + > + pmic@8 { > + compatible = "nxp,pf8121a"; > + reg = <0x08>; > + > + regulators { > + reg_ldo1: ldo1 { > + regulator-max-microvolt = <5000000>; > + regulator-min-microvolt = <1500000>; I mentioned previously min/max hoping it will be obvious (as most or even all of DTS follow this convention... although not example in your regulator) but let be more specific: first min, then max. Don't reverse the logic. See also example in the regulator.yaml. Best regards, Krzysztof
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org> To: Jagan Teki <jagan@amarulasolutions.com> Cc: devicetree@vger.kernel.org, Matteo Lisi <matteo.lisi@engicam.com>, Will Deacon <will@kernel.org>, Shawn Guo <shawnguo@kernel.org>, linux-kernel@vger.kernel.org, Li Yang <leoyang.li@nxp.com>, Rob Herring <robh+dt@kernel.org>, NXP Linux Team <linux-imx@nxp.com>, Catalin Marinas <catalin.marinas@arm.com>, Fabio Estevam <festevam@gmail.com>, linux-amarula@amarulasolutions.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 3/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM Date: Mon, 21 Dec 2020 14:52:32 +0100 [thread overview] Message-ID: <20201221135232.GC31176@kozik-lap> (raw) In-Reply-To: <20201221113151.94515-4-jagan@amarulasolutions.com> On Mon, Dec 21, 2020 at 05:01:48PM +0530, Jagan Teki wrote: > i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini > from Engicam. > > General features: > - NXP i.MX8M Mini > - Up to 2GB LDDR4 > - 8/16GB eMMC > - Gigabit Ethernet > - USB 2.0 Host/OTG > - PCIe Gen2 interface > - I2S > - MIPI DSI to LVDS > - rest of i.MX8M Mini features > > i.Core MX8M Mini needs to mount on top of Engicam baseboards > for creating complete platform solutions. > > Add support for it. > > Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > Changes for v2: > - updated commit message > - add cpu nodes > - add fec1 node > - fixed pmic tree comments > - dropped engicam from filename since it aligned with imx6 engicam > dts files naming conventions. Thanks for the changes. > > .../dts/freescale/imx8mm-icore-mx8mm.dtsi | 232 ++++++++++++++++++ > 1 file changed, 232 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi > new file mode 100644 > index 000000000000..e67865fd102a > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi > @@ -0,0 +1,232 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2018 NXP > + * Copyright (c) 2019 Engicam srl > + * Copyright (c) 2020 Amarula Solutons(India) > + */ > + > +/ { > + compatible = "engicam,icore-mx8mm", "fsl,imx8mm"; > +}; > + > +&A53_0 { > + cpu-supply = <®_buck4>; > +}; > + > +&A53_1 { > + cpu-supply = <®_buck4>; > +}; > + > +&A53_2 { > + cpu-supply = <®_buck4>; > +}; > + > +&A53_3 { > + cpu-supply = <®_buck4>; > +}; > + > +&fec1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_fec1>; > + phy-mode = "rgmii-id"; > + phy-handle = <ðphy>; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy: ethernet-phy@3 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <3>; > + reset-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; > + reset-assert-us = <10000>; > + }; > + }; > +}; > + > +&i2c1 { > + clock-frequency = <400000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_i2c1>; > + status = "okay"; > + > + pmic@8 { > + compatible = "nxp,pf8121a"; > + reg = <0x08>; > + > + regulators { > + reg_ldo1: ldo1 { > + regulator-max-microvolt = <5000000>; > + regulator-min-microvolt = <1500000>; I mentioned previously min/max hoping it will be obvious (as most or even all of DTS follow this convention... although not example in your regulator) but let be more specific: first min, then max. Don't reverse the logic. See also example in the regulator.yaml. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-12-21 13:53 UTC|newest] Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-12-21 11:31 [PATCH v2 0/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini Jagan Teki 2020-12-21 11:31 ` Jagan Teki 2020-12-21 11:31 ` [PATCH v2 1/6] arm64: defconfig: Enable REGULATOR_PF8X00 Jagan Teki 2020-12-21 11:31 ` Jagan Teki 2020-12-21 13:42 ` Krzysztof Kozlowski 2020-12-21 13:42 ` Krzysztof Kozlowski 2020-12-21 11:31 ` [PATCH v2 2/6] dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0 Jagan Teki 2020-12-21 11:31 ` Jagan Teki 2020-12-21 13:46 ` Krzysztof Kozlowski 2020-12-21 13:46 ` Krzysztof Kozlowski 2020-12-21 13:59 ` Jagan Teki 2020-12-21 13:59 ` Jagan Teki 2020-12-21 14:05 ` Krzysztof Kozlowski 2020-12-21 14:05 ` Krzysztof Kozlowski 2020-12-21 14:39 ` Jagan Teki 2020-12-21 14:39 ` Jagan Teki 2020-12-21 14:42 ` Krzysztof Kozlowski 2020-12-21 14:42 ` Krzysztof Kozlowski 2020-12-21 14:47 ` Jagan Teki 2020-12-21 14:47 ` Jagan Teki 2020-12-22 18:28 ` Jagan Teki 2020-12-22 18:28 ` Jagan Teki 2020-12-22 20:25 ` Krzysztof Kozlowski 2020-12-22 20:25 ` Krzysztof Kozlowski 2020-12-22 20:32 ` Krzysztof Kozlowski 2020-12-22 20:32 ` Krzysztof Kozlowski 2020-12-21 11:31 ` [PATCH v2 3/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM Jagan Teki 2020-12-21 11:31 ` Jagan Teki 2020-12-21 13:52 ` Krzysztof Kozlowski [this message] 2020-12-21 13:52 ` Krzysztof Kozlowski 2020-12-21 11:31 ` [PATCH v2 4/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0 Jagan Teki 2020-12-21 11:31 ` Jagan Teki 2020-12-21 14:01 ` Krzysztof Kozlowski 2020-12-21 14:01 ` Krzysztof Kozlowski 2020-12-21 11:31 ` [PATCH v2 5/6] dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit Jagan Teki 2020-12-21 11:31 ` Jagan Teki 2020-12-21 11:31 ` [PATCH v2 6/6] arm64: dts: imx8mm: " Jagan Teki 2020-12-21 11:31 ` Jagan Teki 2020-12-21 14:06 ` Krzysztof Kozlowski 2020-12-21 14:06 ` Krzysztof Kozlowski 2020-12-21 19:33 ` Jagan Teki 2020-12-21 19:33 ` Jagan Teki 2020-12-21 21:06 ` Krzysztof Kozlowski 2020-12-21 21:06 ` Krzysztof Kozlowski 2020-12-22 8:50 ` Jagan Teki 2020-12-22 8:50 ` Jagan Teki 2020-12-22 8:53 ` Krzysztof Kozlowski 2020-12-22 8:53 ` Krzysztof Kozlowski 2020-12-22 9:05 ` Jagan Teki 2020-12-22 9:05 ` Jagan Teki
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