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From: Drew Fustini <drew@beagleboard.org>
To: Christoph Hellwig <hch@lst.de>
Cc: Guo Ren <guoren@kernel.org>, Anup Patel <anup.patel@wdc.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	wefu@redhat.com, lazyparser@gmail.com,
	linux-riscv <linux-riscv@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-arch <linux-arch@vger.kernel.org>,
	linux-sunxi@lists.linux.dev, Guo Ren <guoren@linux.alibaba.com>,
	paul.walmsley@sifive.com
Subject: Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
Date: Tue, 18 May 2021 23:54:31 -0700	[thread overview]
Message-ID: <20210519065431.GB3076809@x1> (raw)
In-Reply-To: <20210519060617.GA28397@lst.de>

On Wed, May 19, 2021 at 08:06:17AM +0200, Christoph Hellwig wrote:
> On Wed, May 19, 2021 at 02:05:00PM +0800, Guo Ren wrote:
> > Since the existing RISC-V ISA cannot solve this problem, it is better
> > to provide some configuration for the SOC vendor to customize.
> 
> We've been talking about this problem for close to five years.  So no,
> if you don't manage to get the feature into the ISA it can't be
> supported.

Isn't it a good goal for Linux to support the capabilities present in
the SoC that a currently being fab'd?

I believe the CMO group only started last year [1] so the RV64GC SoCs
that are going into mass production this year would not have had the
opporuntiy of utilizing any RISC-V ISA extension for handling cache
management.

Thanks,
Drew

[1] https://github.com/riscv/riscv-CMOs

WARNING: multiple messages have this Message-ID (diff)
From: Drew Fustini <drew@beagleboard.org>
To: Christoph Hellwig <hch@lst.de>
Cc: Guo Ren <guoren@kernel.org>, Anup Patel <anup.patel@wdc.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	wefu@redhat.com, lazyparser@gmail.com,
	linux-riscv <linux-riscv@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-arch <linux-arch@vger.kernel.org>,
	linux-sunxi@lists.linux.dev, Guo Ren <guoren@linux.alibaba.com>,
	paul.walmsley@sifive.com
Subject: Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
Date: Tue, 18 May 2021 23:54:31 -0700	[thread overview]
Message-ID: <20210519065431.GB3076809@x1> (raw)
In-Reply-To: <20210519060617.GA28397@lst.de>

On Wed, May 19, 2021 at 08:06:17AM +0200, Christoph Hellwig wrote:
> On Wed, May 19, 2021 at 02:05:00PM +0800, Guo Ren wrote:
> > Since the existing RISC-V ISA cannot solve this problem, it is better
> > to provide some configuration for the SOC vendor to customize.
> 
> We've been talking about this problem for close to five years.  So no,
> if you don't manage to get the feature into the ISA it can't be
> supported.

Isn't it a good goal for Linux to support the capabilities present in
the SoC that a currently being fab'd?

I believe the CMO group only started last year [1] so the RV64GC SoCs
that are going into mass production this year would not have had the
opporuntiy of utilizing any RISC-V ISA extension for handling cache
management.

Thanks,
Drew

[1] https://github.com/riscv/riscv-CMOs

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2021-05-19  6:54 UTC|newest]

Thread overview: 124+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-19  5:04 [PATCH RFC 0/3] riscv: Add DMA_COHERENT support guoren
2021-05-19  5:04 ` guoren
2021-05-19  5:04 ` [PATCH RFC 1/3] riscv: pgtable.h: Fixup _PAGE_CHG_MASK usage guoren
2021-05-19  5:04   ` guoren
2021-05-19  5:04 ` [PATCH RFC 2/3] riscv: Add DMA_COHERENT for custom PTE attributes guoren
2021-05-19  5:04   ` guoren
2021-05-19  5:04 ` [PATCH RFC 3/3] riscv: Add SYNC_DMA_FOR_CPU/DEVICE for DMA_COHERENT guoren
2021-05-19  5:04   ` guoren
2021-05-19  6:32   ` Guo Ren
2021-05-19  6:32     ` Guo Ren
2021-05-19  6:32     ` Guo Ren
2021-05-19  5:20 ` [PATCH RFC 0/3] riscv: Add DMA_COHERENT support Christoph Hellwig
2021-05-19  5:20   ` Christoph Hellwig
2021-05-19  5:48   ` Guo Ren
2021-05-19  5:48     ` Guo Ren
2021-05-19  5:48     ` Guo Ren
2021-05-19  5:55     ` Christoph Hellwig
2021-05-19  5:55       ` Christoph Hellwig
2021-05-19  6:09       ` Guo Ren
2021-05-19  6:09         ` Guo Ren
2021-05-19  6:09         ` Guo Ren
2021-05-19  6:44     ` Drew Fustini
2021-05-19  6:44       ` Drew Fustini
2021-05-19  6:53       ` Christoph Hellwig
2021-05-19  6:53         ` Christoph Hellwig
2021-05-20  1:45         ` Guo Ren
2021-05-20  1:45           ` Guo Ren
2021-05-20  1:45           ` Guo Ren
2021-05-20  5:48           ` Christoph Hellwig
2021-05-20  5:48             ` Christoph Hellwig
2021-06-06 18:14           ` Nick Kossifidis
2021-06-06 18:14             ` Nick Kossifidis
2021-06-07  0:04             ` Guo Ren
2021-06-07  0:04               ` Guo Ren
2021-06-07  2:16               ` Nick Kossifidis
2021-06-07  2:16                 ` Nick Kossifidis
2021-06-07  3:19                 ` Guo Ren
2021-06-07  3:19                   ` Guo Ren
2021-06-07  6:27                   ` Christoph Hellwig
2021-06-07  6:27                     ` Christoph Hellwig
2021-06-07  6:41                     ` Guo Ren
2021-06-07  6:41                       ` Guo Ren
2021-06-07  6:51                       ` Christoph Hellwig
2021-06-07  6:51                         ` Christoph Hellwig
2021-06-07  7:46                         ` Guo Ren
2021-06-07  7:46                           ` Guo Ren
2021-06-08 15:00                     ` David Laight
2021-06-08 15:00                       ` David Laight
2021-06-08 15:32                       ` 'Christoph Hellwig'
2021-06-08 15:32                         ` 'Christoph Hellwig'
2021-06-08 16:11                         ` David Laight
2021-06-08 16:11                           ` David Laight
2021-06-07  8:35                   ` Nick Kossifidis
2021-06-07  8:35                     ` Nick Kossifidis
2021-06-09  3:28             ` Guo Ren
2021-06-09  3:28               ` Guo Ren
2021-06-09  6:05               ` Jisheng Zhang
2021-06-09  6:05                 ` Jisheng Zhang
2021-06-09  9:45               ` Nick Kossifidis
2021-06-09  9:45                 ` Nick Kossifidis
2021-06-09 12:43                 ` Guo Ren
2021-06-09 12:43                   ` Guo Ren
2021-05-19  6:05   ` Guo Ren
2021-05-19  6:05     ` Guo Ren
2021-05-19  6:05     ` Guo Ren
2021-05-19  6:06     ` Christoph Hellwig
2021-05-19  6:06       ` Christoph Hellwig
2021-05-19  6:11       ` Guo Ren
2021-05-19  6:11         ` Guo Ren
2021-05-19  6:11         ` Guo Ren
2021-05-19  6:54       ` Drew Fustini [this message]
2021-05-19  6:54         ` Drew Fustini
2021-05-19  6:56         ` Christoph Hellwig
2021-05-19  6:56           ` Christoph Hellwig
2021-05-19  7:14         ` Anup Patel
2021-05-19  7:14           ` Anup Patel
2021-05-19  8:25           ` Damien Le Moal
2021-05-19  8:25             ` Damien Le Moal
2021-05-20  1:47           ` Guo Ren
2021-05-20  1:47             ` Guo Ren
2021-05-20  1:59             ` Guo Ren
2021-05-20  1:59               ` Guo Ren
2021-05-22  0:36           ` Guo Ren
2021-05-22  0:36             ` Guo Ren
2021-05-30  0:30             ` Palmer Dabbelt
2021-05-30  0:30               ` Palmer Dabbelt
2021-06-03  4:13               ` Palmer Dabbelt
2021-06-03  4:13                 ` Palmer Dabbelt
2021-06-03  6:00                 ` Anup Patel
2021-06-03  6:00                   ` Anup Patel
2021-06-03 15:39                   ` Palmer Dabbelt
2021-06-03 15:39                     ` Palmer Dabbelt
2021-06-04  9:02                     ` David Laight
2021-06-04  9:02                       ` David Laight
2021-06-04  9:53                     ` Arnd Bergmann
2021-06-04  9:53                       ` Arnd Bergmann
2021-06-04  9:53                       ` Arnd Bergmann
2021-06-04 14:47                       ` Guo Ren
2021-06-04 14:47                         ` Guo Ren
2021-06-04 16:12                         ` Palmer Dabbelt
2021-06-04 16:12                           ` Palmer Dabbelt
2021-06-04 21:26                           ` Arnd Bergmann
2021-06-04 21:26                             ` Arnd Bergmann
2021-06-04 21:26                             ` Arnd Bergmann
2021-06-04 22:10                             ` Palmer Dabbelt
2021-06-04 22:10                               ` Palmer Dabbelt
2021-06-08 12:26                           ` Guo Ren
2021-06-08 12:26                             ` Guo Ren
2021-06-06 17:11                   ` Guo Ren
2021-06-06 17:11                     ` Guo Ren
2021-06-06 17:11                     ` Guo Ren
2021-06-07  3:38                     ` Anup Patel
2021-06-07  3:38                       ` Anup Patel
2021-06-07  4:22                       ` Guo Ren
2021-06-07  4:22                         ` Guo Ren
2021-06-07  4:22                         ` Guo Ren
2021-06-07  4:47                         ` Anup Patel
2021-06-07  4:47                           ` Anup Patel
2021-06-07  5:08                           ` Guo Ren
2021-06-07  5:08                             ` Guo Ren
2021-06-07  5:08                             ` Guo Ren
2021-06-07  5:13                           ` Guo Ren
2021-06-07  5:13                             ` Guo Ren
2021-06-07  5:13                             ` Guo Ren

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