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From: Peter Geis <pgwipeout@gmail.com>
To: Rob Herring <robh+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>
Cc: Peter Geis <pgwipeout@gmail.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 6/8] arm64: dts: rockchip: adjust rk3568 pll clocks
Date: Wed, 28 Jul 2021 14:00:32 -0400	[thread overview]
Message-ID: <20210728180034.717953-7-pgwipeout@gmail.com> (raw)
In-Reply-To: <20210728180034.717953-1-pgwipeout@gmail.com>

The rk3568 gpll should run at 1200mhz and the ppll should run at 200mhz.
These are set incorrectly by the bootloader, so fix them here.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index c74072941da1..66d1919dd7eb 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -226,6 +226,8 @@ cru: clock-controller@fdd20000 {
 		reg = <0x0 0xfdd20000 0x0 0x1000>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
+		assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
+		assigned-clock-rates = <1200000000>, <200000000>;
 	};
 
 	i2c0: i2c@fdd40000 {
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Peter Geis <pgwipeout@gmail.com>
To: Rob Herring <robh+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>
Cc: Peter Geis <pgwipeout@gmail.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 6/8] arm64: dts: rockchip: adjust rk3568 pll clocks
Date: Wed, 28 Jul 2021 14:00:32 -0400	[thread overview]
Message-ID: <20210728180034.717953-7-pgwipeout@gmail.com> (raw)
In-Reply-To: <20210728180034.717953-1-pgwipeout@gmail.com>

The rk3568 gpll should run at 1200mhz and the ppll should run at 200mhz.
These are set incorrectly by the bootloader, so fix them here.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index c74072941da1..66d1919dd7eb 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -226,6 +226,8 @@ cru: clock-controller@fdd20000 {
 		reg = <0x0 0xfdd20000 0x0 0x1000>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
+		assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
+		assigned-clock-rates = <1200000000>, <200000000>;
 	};
 
 	i2c0: i2c@fdd40000 {
-- 
2.25.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Peter Geis <pgwipeout@gmail.com>
To: Rob Herring <robh+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>
Cc: Peter Geis <pgwipeout@gmail.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 6/8] arm64: dts: rockchip: adjust rk3568 pll clocks
Date: Wed, 28 Jul 2021 14:00:32 -0400	[thread overview]
Message-ID: <20210728180034.717953-7-pgwipeout@gmail.com> (raw)
In-Reply-To: <20210728180034.717953-1-pgwipeout@gmail.com>

The rk3568 gpll should run at 1200mhz and the ppll should run at 200mhz.
These are set incorrectly by the bootloader, so fix them here.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index c74072941da1..66d1919dd7eb 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -226,6 +226,8 @@ cru: clock-controller@fdd20000 {
 		reg = <0x0 0xfdd20000 0x0 0x1000>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
+		assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
+		assigned-clock-rates = <1200000000>, <200000000>;
 	};
 
 	i2c0: i2c@fdd40000 {
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-07-28 18:01 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-28 18:00 [PATCH v2 0/8] fixes and enablement for rk356x Peter Geis
2021-07-28 18:00 ` Peter Geis
2021-07-28 18:00 ` Peter Geis
2021-07-28 18:00 ` [PATCH v2 1/8] arm64: dts: rockchip: fix rk3568 mbi-alias Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00 ` [PATCH v2 2/8] clk: rockchip: fix clk-pll rk356x early pll init Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00 ` [PATCH v2 3/8] arm64: dts: rockchip: add rk356x gpio debounce clocks Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00 ` [PATCH v2 4/8] arm64: dts: rockchip: add rk356x gmac1 node Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00 ` [PATCH v2 5/8] arm64: dts: rockchip: add rk3568 tsadc nodes Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 21:17   ` Heiko Stübner
2021-07-28 21:17     ` Heiko Stübner
2021-07-28 21:17     ` Heiko Stübner
2021-07-28 18:00 ` Peter Geis [this message]
2021-07-28 18:00   ` [PATCH v2 6/8] arm64: dts: rockchip: adjust rk3568 pll clocks Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00 ` [PATCH v2 7/8] arm64: dts: rockchip: enable gmac node on quartz64-a Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00 ` [PATCH v2 8/8] arm64: dts: rockchip: add thermal support to Quartz64 Model A Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-28 18:00   ` Peter Geis
2021-07-29 13:19 ` (subset) [PATCH v2 0/8] fixes and enablement for rk356x Heiko Stuebner
2021-07-29 13:19   ` Heiko Stuebner
2021-07-29 13:19   ` Heiko Stuebner
2021-08-18 21:25 ` Heiko Stuebner
2021-08-18 21:25   ` Heiko Stuebner
2021-08-18 21:25   ` Heiko Stuebner
2021-08-18 21:42 ` Heiko Stuebner
2021-08-18 21:42   ` Heiko Stuebner
2021-08-18 21:42   ` Heiko Stuebner

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