From: Jonathan Cameron <jic23@kernel.org> To: Billy Tsai <billy_tsai@aspeedtech.com> Cc: <lars@metafoo.de>, <pmeerw@pmeerw.net>, <robh+dt@kernel.org>, <joel@jms.id.au>, <andrew@aj.id.au>, <p.zabel@pengutronix.de>, <lgirdwood@gmail.com>, <broonie@kernel.org>, <linux-iio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>, <BMC-SW@aspeedtech.com> Subject: Re: [RESEND v4 11/15] iio: adc: aspeed: Fix the calculate error of clock. Date: Sun, 29 Aug 2021 16:33:46 +0100 [thread overview] Message-ID: <20210829163346.501fdb43@jic23-huawei> (raw) In-Reply-To: <20210824091243.9393-12-billy_tsai@aspeedtech.com> On Tue, 24 Aug 2021 17:12:39 +0800 Billy Tsai <billy_tsai@aspeedtech.com> wrote: > The adc clcok formula is clock > ast2400/2500: > ADC clock period = PCLK * 2 * (ADC0C[31:17] + 1) * (ADC0C[9:0] + 1) > ast2600: > ADC clock period = PCLK * 2 * (ADC0C[15:0] + 1) > They all have one fixed divided 2 and the legacy driver didn't handle it. > This patch register the fixed factory clock device as the parent of adc > clock scaler to fix this issue. What are the impacts of this being wrong before? Is this something we should look to backport? Comment inline. > > Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> > --- > drivers/iio/adc/aspeed_adc.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c > index ea3e9a52fcc9..8fe7da1a651f 100644 > --- a/drivers/iio/adc/aspeed_adc.c > +++ b/drivers/iio/adc/aspeed_adc.c > @@ -4,6 +4,12 @@ > * > * Copyright (C) 2017 Google, Inc. > * Copyright (C) 2021 Aspeed Technology Inc. > + * > + * ADC clock formula: > + * Ast2400/Ast2500: > + * clock period = period of PCLK * 2 * (ADC0C[31:17] + 1) * (ADC0C[9:0] + 1) > + * Ast2600: > + * clock period = period of PCLK * 2 * (ADC0C[15:0] + 1) > */ > > #include <linux/clk.h> > @@ -77,6 +83,7 @@ struct aspeed_adc_data { > struct regulator *regulator; > void __iomem *base; > spinlock_t clk_lock; > + struct clk_hw *fixed_div_clk; > struct clk_hw *clk_prescaler; > struct clk_hw *clk_scaler; > struct reset_control *rst; > @@ -196,6 +203,13 @@ static void aspeed_adc_unregister_divider(void *data) > clk_hw_unregister_divider(clk); > } > > +static void aspeed_adc_unregister_fixed_divider(void *data) > +{ > + struct clk_hw *clk = data; > + > + clk_hw_unregister_fixed_factor(clk); > +} > + > static void aspeed_adc_reset_assert(void *data) > { > struct reset_control *rst = data; > @@ -312,6 +326,18 @@ static int aspeed_adc_probe(struct platform_device *pdev) > /* Register ADC clock prescaler with source specified by device tree. */ > spin_lock_init(&data->clk_lock); > snprintf(clk_parent_name, 32, of_clk_get_parent_name(pdev->dev.of_node, 0)); > + snprintf(clk_name, 32, "%s-fixed-div", data->model_data->model_name); ARRAY_SIZE > + data->fixed_div_clk = clk_hw_register_fixed_factor( > + &pdev->dev, clk_name, clk_parent_name, 0, 1, 2); > + if (IS_ERR(data->fixed_div_clk)) > + return PTR_ERR(data->fixed_div_clk); > + > + ret = devm_add_action_or_reset(data->dev, > + aspeed_adc_unregister_fixed_divider, > + data->clk_prescaler); > + if (ret) > + return ret; > + snprintf(clk_parent_name, 32, clk_name); > if (data->model_data->need_prescaler) { > snprintf(clk_name, 32, "%s-prescaler", > data->model_data->model_name);
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <jic23@kernel.org> To: Billy Tsai <billy_tsai@aspeedtech.com> Cc: <lars@metafoo.de>, <pmeerw@pmeerw.net>, <robh+dt@kernel.org>, <joel@jms.id.au>, <andrew@aj.id.au>, <p.zabel@pengutronix.de>, <lgirdwood@gmail.com>, <broonie@kernel.org>, <linux-iio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>, <BMC-SW@aspeedtech.com> Subject: Re: [RESEND v4 11/15] iio: adc: aspeed: Fix the calculate error of clock. Date: Sun, 29 Aug 2021 16:33:46 +0100 [thread overview] Message-ID: <20210829163346.501fdb43@jic23-huawei> (raw) In-Reply-To: <20210824091243.9393-12-billy_tsai@aspeedtech.com> On Tue, 24 Aug 2021 17:12:39 +0800 Billy Tsai <billy_tsai@aspeedtech.com> wrote: > The adc clcok formula is clock > ast2400/2500: > ADC clock period = PCLK * 2 * (ADC0C[31:17] + 1) * (ADC0C[9:0] + 1) > ast2600: > ADC clock period = PCLK * 2 * (ADC0C[15:0] + 1) > They all have one fixed divided 2 and the legacy driver didn't handle it. > This patch register the fixed factory clock device as the parent of adc > clock scaler to fix this issue. What are the impacts of this being wrong before? Is this something we should look to backport? Comment inline. > > Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> > --- > drivers/iio/adc/aspeed_adc.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c > index ea3e9a52fcc9..8fe7da1a651f 100644 > --- a/drivers/iio/adc/aspeed_adc.c > +++ b/drivers/iio/adc/aspeed_adc.c > @@ -4,6 +4,12 @@ > * > * Copyright (C) 2017 Google, Inc. > * Copyright (C) 2021 Aspeed Technology Inc. > + * > + * ADC clock formula: > + * Ast2400/Ast2500: > + * clock period = period of PCLK * 2 * (ADC0C[31:17] + 1) * (ADC0C[9:0] + 1) > + * Ast2600: > + * clock period = period of PCLK * 2 * (ADC0C[15:0] + 1) > */ > > #include <linux/clk.h> > @@ -77,6 +83,7 @@ struct aspeed_adc_data { > struct regulator *regulator; > void __iomem *base; > spinlock_t clk_lock; > + struct clk_hw *fixed_div_clk; > struct clk_hw *clk_prescaler; > struct clk_hw *clk_scaler; > struct reset_control *rst; > @@ -196,6 +203,13 @@ static void aspeed_adc_unregister_divider(void *data) > clk_hw_unregister_divider(clk); > } > > +static void aspeed_adc_unregister_fixed_divider(void *data) > +{ > + struct clk_hw *clk = data; > + > + clk_hw_unregister_fixed_factor(clk); > +} > + > static void aspeed_adc_reset_assert(void *data) > { > struct reset_control *rst = data; > @@ -312,6 +326,18 @@ static int aspeed_adc_probe(struct platform_device *pdev) > /* Register ADC clock prescaler with source specified by device tree. */ > spin_lock_init(&data->clk_lock); > snprintf(clk_parent_name, 32, of_clk_get_parent_name(pdev->dev.of_node, 0)); > + snprintf(clk_name, 32, "%s-fixed-div", data->model_data->model_name); ARRAY_SIZE > + data->fixed_div_clk = clk_hw_register_fixed_factor( > + &pdev->dev, clk_name, clk_parent_name, 0, 1, 2); > + if (IS_ERR(data->fixed_div_clk)) > + return PTR_ERR(data->fixed_div_clk); > + > + ret = devm_add_action_or_reset(data->dev, > + aspeed_adc_unregister_fixed_divider, > + data->clk_prescaler); > + if (ret) > + return ret; > + snprintf(clk_parent_name, 32, clk_name); > if (data->model_data->need_prescaler) { > snprintf(clk_name, 32, "%s-prescaler", > data->model_data->model_name); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-08-29 15:30 UTC|newest] Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-24 9:12 [RESEND v4 00/15] Add support for ast2600 ADC Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` [RESEND v4 01/15] dt-bindings: iio: adc: Add ast2600-adc bindings Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` [RESEND v4 02/15] iio: adc: aspeed: completes the bitfield declare Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-29 15:07 ` Jonathan Cameron 2021-08-29 15:07 ` Jonathan Cameron 2021-08-24 9:12 ` [RESEND v4 03/15] iio: adc: aspeed: set driver data when adc probe Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-29 15:08 ` Jonathan Cameron 2021-08-29 15:08 ` Jonathan Cameron 2021-08-24 9:12 ` [RESEND v4 04/15] iio: adc: aspeed: Keep model data to driver data Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` [RESEND v4 05/15] iio: adc: aspeed: Refactory model data structure Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-29 15:13 ` Jonathan Cameron 2021-08-29 15:13 ` Jonathan Cameron 2021-08-24 9:12 ` [RESEND v4 06/15] iio: adc: aspeed: Add vref config function Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` [RESEND v4 07/15] iio: adc: aspeed: Set num_channels with model data Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` [RESEND v4 08/15] iio: adc: aspeed: Use model_data to set clk scaler Billy Tsai 2021-08-25 11:52 ` kernel test robot 2021-08-25 11:52 ` kernel test robot 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` [RESEND v4 09/15] iio: adc: aspeed: Use devm_add_action_or_reset Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` [RESEND v4 10/15] iio: adc: aspeed: Support ast2600 adc Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-29 15:31 ` Jonathan Cameron 2021-08-29 15:31 ` Jonathan Cameron 2021-08-24 9:12 ` [RESEND v4 11/15] iio: adc: aspeed: Fix the calculate error of clock Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-29 15:33 ` Jonathan Cameron [this message] 2021-08-29 15:33 ` Jonathan Cameron 2021-08-24 9:12 ` [RESEND v4 12/15] iio: adc: aspeed: Add func to set sampling rate Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-29 15:36 ` Jonathan Cameron 2021-08-29 15:36 ` Jonathan Cameron 2021-08-30 8:35 ` Billy Tsai 2021-08-30 8:35 ` Billy Tsai 2021-08-30 9:52 ` Jonathan Cameron 2021-08-30 9:52 ` Jonathan Cameron 2021-08-24 9:12 ` [RESEND v4 13/15] iio: adc: aspeed: Add compensation phase Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` [RESEND v4 14/15] iio: adc: aspeed: Support battery sensing Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-29 15:43 ` Jonathan Cameron 2021-08-29 15:43 ` Jonathan Cameron 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` [RESEND v4 15/15] iio: adc: aspeed: Get and set trimming data Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai 2021-08-24 9:12 ` Billy Tsai [not found] ` <202108250006.17P06IgG097015@twspam01.aspeedtech.com> 2021-08-29 15:20 ` [RESEND v4 08/15] iio: adc: aspeed: Use model_data to set clk scaler Jonathan Cameron 2021-08-29 15:20 ` Jonathan Cameron [not found] ` <202108250004.17P04FdD094082@twspam01.aspeedtech.com> 2021-08-29 15:25 ` [RESEND v4 09/15] iio: adc: aspeed: Use devm_add_action_or_reset Jonathan Cameron 2021-08-29 15:25 ` Jonathan Cameron [not found] ` <202108250006.17P066YP096721@twspam01.aspeedtech.com> 2021-08-29 15:39 ` [RESEND v4 13/15] iio: adc: aspeed: Add compensation phase Jonathan Cameron 2021-08-29 15:39 ` Jonathan Cameron [not found] ` <202108250007.17P07NFj097422@twspam01.aspeedtech.com> 2021-08-29 15:45 ` [RESEND v4 15/15] iio: adc: aspeed: Get and set trimming data Jonathan Cameron 2021-08-29 15:45 ` Jonathan Cameron
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