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From: Claudiu Beznea <claudiu.beznea@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
	<ludovic.desroches@microchip.com>
Cc: <linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Claudiu Beznea <claudiu.beznea@microchip.com>
Subject: [PATCH v3 15/17] clk: use clk_core_get_rate_recalc() in clk_rate_get()
Date: Fri, 17 Sep 2021 15:06:40 +0300	[thread overview]
Message-ID: <20210917120642.8993-16-claudiu.beznea@microchip.com> (raw)
In-Reply-To: <20210917120642.8993-1-claudiu.beznea@microchip.com>

In case clock flags contains CLK_GET_RATE_NOCACHE the clk_rate_get()
will return the cached rate. Thus, use clk_core_get_rate_recalc() which
takes proper action when clock flags contains CLK_GET_RATE_NOCACHE.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 drivers/clk/clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 65508eb89ec9..64838754cdef 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -3108,7 +3108,7 @@ static int clk_rate_get(void *data, u64 *val)
 {
 	struct clk_core *core = data;
 
-	*val = core->rate;
+	*val = clk_core_get_rate_recalc(core);
 	return 0;
 }
 
-- 
2.25.1


WARNING: multiple messages have this Message-ID
From: Claudiu Beznea <claudiu.beznea@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
	<ludovic.desroches@microchip.com>
Cc: <linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Claudiu Beznea <claudiu.beznea@microchip.com>
Subject: [PATCH v3 15/17] clk: use clk_core_get_rate_recalc() in clk_rate_get()
Date: Fri, 17 Sep 2021 15:06:40 +0300	[thread overview]
Message-ID: <20210917120642.8993-16-claudiu.beznea@microchip.com> (raw)
In-Reply-To: <20210917120642.8993-1-claudiu.beznea@microchip.com>

In case clock flags contains CLK_GET_RATE_NOCACHE the clk_rate_get()
will return the cached rate. Thus, use clk_core_get_rate_recalc() which
takes proper action when clock flags contains CLK_GET_RATE_NOCACHE.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 drivers/clk/clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 65508eb89ec9..64838754cdef 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -3108,7 +3108,7 @@ static int clk_rate_get(void *data, u64 *val)
 {
 	struct clk_core *core = data;
 
-	*val = core->rate;
+	*val = clk_core_get_rate_recalc(core);
 	return 0;
 }
 
-- 
2.25.1


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  parent reply	other threads:[~2021-09-17 12:07 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-17 12:06 [PATCH v3 00/17] clk: at91: updates for power management and dvfs Claudiu Beznea
2021-09-17 12:06 ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 01/17] clk: at91: re-factor clocks suspend/resume Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:20   ` Claudiu.Beznea
2021-09-17 12:20     ` Claudiu.Beznea
2021-09-17 12:06 ` [PATCH v3 02/17] clk: at91: pmc: execute suspend/resume only for backup mode Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 03/17] clk: at91: sama7g5: add securam's peripheral clock Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 04/17] clk: at91: clk-master: add register definition for sama7g5's master clock Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 05/17] clk: at91: clk-master: improve readability by using local variables Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 06/17] clk: at91: pmc: add sama7g5 to the list of available pmcs Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 07/17] clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 08/17] clk: at91: clk-master: check if div or pres is zero Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 09/17] clk: at91: clk-master: mask mckr against layout->mask Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 10/17] clk: at91: clk-master: fix prescaler logic Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 11/17] clk: at91: clk-sam9x60-pll: add notifier for div part of PLL Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 12/17] clk: at91: clk-master: add notifier for divider Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 13/17] clk: at91: sama7g5: remove prescaler part of master clock Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 14/17] clk: at91: sama7g5: set low limit for mck0 at 32KHz Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` Claudiu Beznea [this message]
2021-09-17 12:06   ` [PATCH v3 15/17] clk: use clk_core_get_rate_recalc() in clk_rate_get() Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 16/17] clk: remove extra empty line Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea
2021-09-17 12:06 ` [PATCH v3 17/17] clk: do not initialize ret Claudiu Beznea
2021-09-17 12:06   ` Claudiu Beznea

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