From: Claudiu Beznea <claudiu.beznea@microchip.com> To: <mturquette@baylibre.com>, <sboyd@kernel.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <ludovic.desroches@microchip.com> Cc: <linux-clk@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Claudiu Beznea <claudiu.beznea@microchip.com> Subject: [PATCH v3 08/17] clk: at91: clk-master: check if div or pres is zero Date: Fri, 17 Sep 2021 15:06:33 +0300 [thread overview] Message-ID: <20210917120642.8993-9-claudiu.beznea@microchip.com> (raw) In-Reply-To: <20210917120642.8993-1-claudiu.beznea@microchip.com> Check if div or pres is zero before using it as argument for ffs(). In case div is zero ffs() will return 0 and thus substracting from zero will lead to invalid values to be setup in registers. Fixes: 7a110b9107ed8 ("clk: at91: clk-master: re-factor master clock") Fixes: 75c88143f3b87 ("clk: at91: clk-master: add master clock support for SAMA7G5") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- drivers/clk/at91/clk-master.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index 9a2c8e64cacf..2093e13b5068 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c @@ -344,7 +344,7 @@ static int clk_master_pres_set_rate(struct clk_hw *hw, unsigned long rate, else if (pres == 3) pres = MASTER_PRES_MAX; - else + else if (pres) pres = ffs(pres) - 1; spin_lock_irqsave(master->lock, flags); @@ -757,7 +757,7 @@ static int clk_sama7g5_master_set_rate(struct clk_hw *hw, unsigned long rate, if (div == 3) div = MASTER_PRES_MAX; - else + else if (div) div = ffs(div) - 1; spin_lock_irqsave(master->lock, flags); -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Claudiu Beznea <claudiu.beznea@microchip.com> To: <mturquette@baylibre.com>, <sboyd@kernel.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <ludovic.desroches@microchip.com> Cc: <linux-clk@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Claudiu Beznea <claudiu.beznea@microchip.com> Subject: [PATCH v3 08/17] clk: at91: clk-master: check if div or pres is zero Date: Fri, 17 Sep 2021 15:06:33 +0300 [thread overview] Message-ID: <20210917120642.8993-9-claudiu.beznea@microchip.com> (raw) In-Reply-To: <20210917120642.8993-1-claudiu.beznea@microchip.com> Check if div or pres is zero before using it as argument for ffs(). In case div is zero ffs() will return 0 and thus substracting from zero will lead to invalid values to be setup in registers. Fixes: 7a110b9107ed8 ("clk: at91: clk-master: re-factor master clock") Fixes: 75c88143f3b87 ("clk: at91: clk-master: add master clock support for SAMA7G5") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- drivers/clk/at91/clk-master.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index 9a2c8e64cacf..2093e13b5068 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c @@ -344,7 +344,7 @@ static int clk_master_pres_set_rate(struct clk_hw *hw, unsigned long rate, else if (pres == 3) pres = MASTER_PRES_MAX; - else + else if (pres) pres = ffs(pres) - 1; spin_lock_irqsave(master->lock, flags); @@ -757,7 +757,7 @@ static int clk_sama7g5_master_set_rate(struct clk_hw *hw, unsigned long rate, if (div == 3) div = MASTER_PRES_MAX; - else + else if (div) div = ffs(div) - 1; spin_lock_irqsave(master->lock, flags); -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-09-17 12:07 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-17 12:06 [PATCH v3 00/17] clk: at91: updates for power management and dvfs Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 01/17] clk: at91: re-factor clocks suspend/resume Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:20 ` Claudiu.Beznea 2021-09-17 12:20 ` Claudiu.Beznea 2021-09-17 12:06 ` [PATCH v3 02/17] clk: at91: pmc: execute suspend/resume only for backup mode Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 03/17] clk: at91: sama7g5: add securam's peripheral clock Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 04/17] clk: at91: clk-master: add register definition for sama7g5's master clock Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 05/17] clk: at91: clk-master: improve readability by using local variables Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 06/17] clk: at91: pmc: add sama7g5 to the list of available pmcs Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 07/17] clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea [this message] 2021-09-17 12:06 ` [PATCH v3 08/17] clk: at91: clk-master: check if div or pres is zero Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 09/17] clk: at91: clk-master: mask mckr against layout->mask Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 10/17] clk: at91: clk-master: fix prescaler logic Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 11/17] clk: at91: clk-sam9x60-pll: add notifier for div part of PLL Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 12/17] clk: at91: clk-master: add notifier for divider Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 13/17] clk: at91: sama7g5: remove prescaler part of master clock Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 14/17] clk: at91: sama7g5: set low limit for mck0 at 32KHz Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 15/17] clk: use clk_core_get_rate_recalc() in clk_rate_get() Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 16/17] clk: remove extra empty line Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea 2021-09-17 12:06 ` [PATCH v3 17/17] clk: do not initialize ret Claudiu Beznea 2021-09-17 12:06 ` Claudiu Beznea
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