From: kernel test robot <lkp@intel.com> To: Qin Jian <qinjian@cqplus1.com>, robh+dt@kernel.org Cc: kbuild-all@lists.01.org, mturquette@baylibre.com, sboyd@kernel.org, tglx@linutronix.de, maz@kernel.org, p.zabel@pengutronix.de, broonie@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 8/8] irqchip: Add support for Sunplus SP7021 interrupt controller Date: Sun, 31 Oct 2021 03:29:44 +0800 [thread overview] Message-ID: <202110310355.VZBT49OU-lkp@intel.com> (raw) In-Reply-To: <833a3060692f2d9e20ed2c821ba9e45a938eb294.1635496594.git.qinjian@cqplus1.com> [-- Attachment #1: Type: text/plain, Size: 5525 bytes --] Hi Qin, I love your patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on pza/reset/next clk/clk-next linus/master v5.15-rc7] [cannot apply to tip/irq/core next-20211029] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Qin-Jian/Add-Sunplus-SP7021-SoC-Support/20211029-171054 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm-allyesconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/91ab876ddb6d1a596c50c43a79d3e06b9695dee7 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Qin-Jian/Add-Sunplus-SP7021-SoC-Support/20211029-171054 git checkout 91ab876ddb6d1a596c50c43a79d3e06b9695dee7 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=arm If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): >> drivers/irqchip/irq-sp7021-intc.c:211:5: error: no previous prototype for 'sp_intc_xlate_of' [-Werror=missing-prototypes] 211 | int sp_intc_xlate_of(struct irq_domain *d, struct device_node *node, | ^~~~~~~~~~~~~~~~ >> drivers/irqchip/irq-sp7021-intc.c:274:12: error: no previous prototype for 'sp_intc_init_dt' [-Werror=missing-prototypes] 274 | int __init sp_intc_init_dt( | ^~~~~~~~~~~~~~~ cc1: all warnings being treated as errors vim +/sp_intc_xlate_of +211 drivers/irqchip/irq-sp7021-intc.c 210 > 211 int sp_intc_xlate_of(struct irq_domain *d, struct device_node *node, 212 const u32 *intspec, unsigned int intsize, 213 irq_hw_number_t *out_hwirq, unsigned int *out_type) 214 { 215 int ret; 216 217 ret = irq_domain_xlate_twocell(d, node, 218 intspec, intsize, out_hwirq, out_type); 219 if (!ret) { 220 /* intspec[1]: IRQ_TYPE | SP_INTC_EXT_INT 221 * SP_INTC_EXT_INT: 0-1, 222 * to indicate route to which parent irq: EXT_INT0/EXT_INT1 223 */ 224 u32 ext_int = (intspec[1] & SP_INTC_EXT_INT_MASK) >> SP_INTC_EXT_INT_SHFIT; 225 226 /* priority = 0, route to EXT_INT1 227 * otherwise, route to EXT_INT0 228 */ 229 sp_intc_set_priority(*out_hwirq, 1 - ext_int); 230 } 231 232 return ret; 233 } 234 235 static struct irq_chip sp_intc_chip = { 236 .name = "sp_intc", 237 .irq_ack = sp_intc_ack_irq, 238 .irq_mask = sp_intc_mask_irq, 239 .irq_unmask = sp_intc_unmask_irq, 240 .irq_set_type = sp_intc_set_type, 241 }; 242 243 static int sp_intc_irq_domain_map(struct irq_domain *domain, 244 unsigned int irq, irq_hw_number_t hwirq) 245 { 246 irq_set_chip_and_handler(irq, &sp_intc_chip, handle_level_irq); 247 irq_set_chip_data(irq, &sp_intc_chip); 248 irq_set_noprobe(irq); 249 250 return 0; 251 } 252 253 static const struct irq_domain_ops sp_intc_dm_ops = { 254 .xlate = sp_intc_xlate_of, 255 .map = sp_intc_irq_domain_map, 256 }; 257 258 #ifdef CONFIG_OF 259 static int sp_intc_irq_map(struct device_node *node, int i) 260 { 261 sp_intc.virq[i] = irq_of_parse_and_map(node, i); 262 if (!sp_intc.virq[i]) { 263 pr_err("%s: missed EXT_INT%d in DT\n", __func__, i); 264 return -ENOENT; 265 } 266 267 pr_info("%s: EXT_INT%d = %d\n", __func__, i, sp_intc.virq[i]); 268 irq_set_chained_handler_and_data(sp_intc.virq[i], 269 sp_intc_handle_ext_cascaded, (void *)i); 270 271 return 0; 272 } 273 > 274 int __init sp_intc_init_dt( 275 struct device_node *node, struct device_node *parent) 276 { 277 void __iomem *base0, *base1; 278 279 base0 = of_iomap(node, 0); 280 if (!base0) { 281 pr_err("unable to map sp-intc base 0\n"); 282 return -EINVAL; 283 } 284 285 base1 = of_iomap(node, 1); 286 if (!base1) { 287 pr_err("unable to map sp-intc base 1\n"); 288 return -EINVAL; 289 } 290 291 sp_intc.node = node; 292 293 sp_intc_chip_init(base0, base1); 294 295 sp_intc.domain = irq_domain_add_linear(node, 296 SP_INTC_HWIRQ_MAX - SP_INTC_HWIRQ_MIN, 297 &sp_intc_dm_ops, &sp_intc); 298 if (!sp_intc.domain) { 299 pr_err("%s: unable to create linear domain\n", __func__); 300 return -EINVAL; 301 } 302 303 raw_spin_lock_init(&sp_intc.lock); 304 305 if (parent) { 306 /* secondary chained controller */ 307 if (sp_intc_irq_map(node, 0)) // EXT_INT0 308 return -ENOENT; 309 310 if (sp_intc_irq_map(node, 1)) // EXT_INT1 311 return -ENOENT; 312 } else { 313 /* primary controller */ 314 set_handle_irq(sp_intc_handle_irq); 315 } 316 317 return 0; 318 } 319 IRQCHIP_DECLARE(sp_intc, "sunplus,sp7021-intc", sp_intc_init_dt); 320 #endif 321 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 79260 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: kernel test robot <lkp@intel.com> To: kbuild-all@lists.01.org Subject: Re: [PATCH v2 8/8] irqchip: Add support for Sunplus SP7021 interrupt controller Date: Sun, 31 Oct 2021 03:29:44 +0800 [thread overview] Message-ID: <202110310355.VZBT49OU-lkp@intel.com> (raw) In-Reply-To: <833a3060692f2d9e20ed2c821ba9e45a938eb294.1635496594.git.qinjian@cqplus1.com> [-- Attachment #1: Type: text/plain, Size: 5684 bytes --] Hi Qin, I love your patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on pza/reset/next clk/clk-next linus/master v5.15-rc7] [cannot apply to tip/irq/core next-20211029] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Qin-Jian/Add-Sunplus-SP7021-SoC-Support/20211029-171054 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm-allyesconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/91ab876ddb6d1a596c50c43a79d3e06b9695dee7 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Qin-Jian/Add-Sunplus-SP7021-SoC-Support/20211029-171054 git checkout 91ab876ddb6d1a596c50c43a79d3e06b9695dee7 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=arm If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): >> drivers/irqchip/irq-sp7021-intc.c:211:5: error: no previous prototype for 'sp_intc_xlate_of' [-Werror=missing-prototypes] 211 | int sp_intc_xlate_of(struct irq_domain *d, struct device_node *node, | ^~~~~~~~~~~~~~~~ >> drivers/irqchip/irq-sp7021-intc.c:274:12: error: no previous prototype for 'sp_intc_init_dt' [-Werror=missing-prototypes] 274 | int __init sp_intc_init_dt( | ^~~~~~~~~~~~~~~ cc1: all warnings being treated as errors vim +/sp_intc_xlate_of +211 drivers/irqchip/irq-sp7021-intc.c 210 > 211 int sp_intc_xlate_of(struct irq_domain *d, struct device_node *node, 212 const u32 *intspec, unsigned int intsize, 213 irq_hw_number_t *out_hwirq, unsigned int *out_type) 214 { 215 int ret; 216 217 ret = irq_domain_xlate_twocell(d, node, 218 intspec, intsize, out_hwirq, out_type); 219 if (!ret) { 220 /* intspec[1]: IRQ_TYPE | SP_INTC_EXT_INT 221 * SP_INTC_EXT_INT: 0-1, 222 * to indicate route to which parent irq: EXT_INT0/EXT_INT1 223 */ 224 u32 ext_int = (intspec[1] & SP_INTC_EXT_INT_MASK) >> SP_INTC_EXT_INT_SHFIT; 225 226 /* priority = 0, route to EXT_INT1 227 * otherwise, route to EXT_INT0 228 */ 229 sp_intc_set_priority(*out_hwirq, 1 - ext_int); 230 } 231 232 return ret; 233 } 234 235 static struct irq_chip sp_intc_chip = { 236 .name = "sp_intc", 237 .irq_ack = sp_intc_ack_irq, 238 .irq_mask = sp_intc_mask_irq, 239 .irq_unmask = sp_intc_unmask_irq, 240 .irq_set_type = sp_intc_set_type, 241 }; 242 243 static int sp_intc_irq_domain_map(struct irq_domain *domain, 244 unsigned int irq, irq_hw_number_t hwirq) 245 { 246 irq_set_chip_and_handler(irq, &sp_intc_chip, handle_level_irq); 247 irq_set_chip_data(irq, &sp_intc_chip); 248 irq_set_noprobe(irq); 249 250 return 0; 251 } 252 253 static const struct irq_domain_ops sp_intc_dm_ops = { 254 .xlate = sp_intc_xlate_of, 255 .map = sp_intc_irq_domain_map, 256 }; 257 258 #ifdef CONFIG_OF 259 static int sp_intc_irq_map(struct device_node *node, int i) 260 { 261 sp_intc.virq[i] = irq_of_parse_and_map(node, i); 262 if (!sp_intc.virq[i]) { 263 pr_err("%s: missed EXT_INT%d in DT\n", __func__, i); 264 return -ENOENT; 265 } 266 267 pr_info("%s: EXT_INT%d = %d\n", __func__, i, sp_intc.virq[i]); 268 irq_set_chained_handler_and_data(sp_intc.virq[i], 269 sp_intc_handle_ext_cascaded, (void *)i); 270 271 return 0; 272 } 273 > 274 int __init sp_intc_init_dt( 275 struct device_node *node, struct device_node *parent) 276 { 277 void __iomem *base0, *base1; 278 279 base0 = of_iomap(node, 0); 280 if (!base0) { 281 pr_err("unable to map sp-intc base 0\n"); 282 return -EINVAL; 283 } 284 285 base1 = of_iomap(node, 1); 286 if (!base1) { 287 pr_err("unable to map sp-intc base 1\n"); 288 return -EINVAL; 289 } 290 291 sp_intc.node = node; 292 293 sp_intc_chip_init(base0, base1); 294 295 sp_intc.domain = irq_domain_add_linear(node, 296 SP_INTC_HWIRQ_MAX - SP_INTC_HWIRQ_MIN, 297 &sp_intc_dm_ops, &sp_intc); 298 if (!sp_intc.domain) { 299 pr_err("%s: unable to create linear domain\n", __func__); 300 return -EINVAL; 301 } 302 303 raw_spin_lock_init(&sp_intc.lock); 304 305 if (parent) { 306 /* secondary chained controller */ 307 if (sp_intc_irq_map(node, 0)) // EXT_INT0 308 return -ENOENT; 309 310 if (sp_intc_irq_map(node, 1)) // EXT_INT1 311 return -ENOENT; 312 } else { 313 /* primary controller */ 314 set_handle_irq(sp_intc_handle_irq); 315 } 316 317 return 0; 318 } 319 IRQCHIP_DECLARE(sp_intc, "sunplus,sp7021-intc", sp_intc_init_dt); 320 #endif 321 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org [-- Attachment #2: config.gz --] [-- Type: application/gzip, Size: 79260 bytes --]
next prev parent reply other threads:[~2021-10-30 19:31 UTC|newest] Thread overview: 124+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-29 8:44 [PATCH v2 0/8] Add Sunplus SP7021 SoC Support Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 1/8] dt-bindings: vendor-prefixes: Add Sunplus Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 2/8] dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 3/8] dt-bindings: reset: Add bindings for SP7021 reset driver Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 4/8] reset: Add Sunplus " Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-30 4:18 ` kernel test robot 2021-10-30 4:18 ` kernel test robot 2021-10-30 4:18 ` kernel test robot 2021-10-29 8:44 ` [PATCH v2 5/8] dt-bindings: clock: Add bindings for SP7021 clock driver Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 6/8] clk: Add Sunplus " Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 7/8] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 8/8] irqchip: Add support for Sunplus " Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 15:25 ` Marc Zyngier 2021-10-29 15:25 ` Marc Zyngier 2021-11-01 5:01 ` [PATCH v3 0/8] Add Sunplus SP7021 SoC Support Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 5:01 ` [PATCH v3 1/8] dt-bindings: vendor-prefixes: Add Sunplus Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-02 17:44 ` Rob Herring 2021-11-02 17:44 ` Rob Herring 2021-11-01 5:01 ` [PATCH v3 2/8] dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 19:58 ` Rob Herring 2021-11-01 19:58 ` Rob Herring 2021-11-01 5:01 ` [PATCH v3 3/8] dt-bindings: reset: Add bindings for SP7021 reset driver Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-02 11:51 ` Philipp Zabel 2021-11-02 11:51 ` Philipp Zabel 2021-11-03 1:20 ` 答复: " qinjian[覃健] 2021-11-03 1:20 ` qinjian[覃健] 2021-11-01 5:01 ` [PATCH v3 4/8] reset: Add Sunplus " Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-02 12:22 ` Philipp Zabel 2021-11-02 12:22 ` Philipp Zabel 2021-11-03 2:42 ` 答复: " qinjian[覃健] 2021-11-03 2:42 ` qinjian[覃健] 2021-11-01 5:01 ` [PATCH v3 5/8] dt-bindings: clock: Add bindings for SP7021 clock driver Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 19:59 ` Rob Herring 2021-11-01 19:59 ` Rob Herring 2021-11-01 5:01 ` [PATCH v3 6/8] clk: Add Sunplus " Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 10:16 ` kernel test robot 2021-11-01 10:16 ` kernel test robot 2021-11-01 10:16 ` kernel test robot 2021-11-01 5:01 ` [PATCH v3 7/8] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-02 17:45 ` Rob Herring 2021-11-02 17:45 ` Rob Herring 2021-11-01 5:01 ` [PATCH v3 8/8] irqchip: Add Sunplus SP7021 interrupt controller driver Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 8:27 ` kernel test robot 2021-11-01 8:27 ` kernel test robot 2021-11-01 8:27 ` kernel test robot 2021-11-01 10:26 ` kernel test robot 2021-11-01 10:26 ` kernel test robot 2021-11-01 10:26 ` kernel test robot 2021-10-30 15:30 ` [PATCH v2 8/8] irqchip: Add support for Sunplus SP7021 interrupt controller kernel test robot 2021-10-30 15:30 ` kernel test robot 2021-10-30 15:30 ` kernel test robot 2021-10-30 19:29 ` kernel test robot [this message] 2021-10-30 19:29 ` kernel test robot 2021-11-04 2:56 ` [PATCH v4 00/10] Add Sunplus SP7021 SoC Support Qin Jian 2021-11-04 2:56 ` Qin Jian 2021-11-04 2:56 ` [PATCH v4 01/10] dt-bindings: vendor-prefixes: Add Sunplus Qin Jian 2021-11-04 2:56 ` Qin Jian 2021-11-08 17:45 ` Rob Herring 2021-11-08 17:45 ` Rob Herring 2021-11-04 2:56 ` [PATCH v4 02/10] dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards Qin Jian 2021-11-04 2:56 ` Qin Jian 2021-11-08 17:46 ` Rob Herring 2021-11-08 17:46 ` Rob Herring 2021-11-04 2:57 ` [PATCH v4 03/10] dt-bindings: reset: Add bindings for SP7021 reset driver Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-12 21:56 ` Rob Herring 2021-11-12 21:56 ` Rob Herring 2021-11-04 2:57 ` [PATCH v4 04/10] reset: Add Sunplus " Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 2:57 ` [PATCH v4 05/10] dt-bindings: clock: Add bindings for SP7021 clock driver Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-08 17:46 ` Rob Herring 2021-11-08 17:46 ` Rob Herring 2021-11-04 2:57 ` [PATCH v4 06/10] clk: Add Sunplus " Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 11:32 ` kernel test robot 2021-11-04 11:32 ` kernel test robot 2021-11-04 11:32 ` kernel test robot 2021-11-05 4:02 ` kernel test robot 2021-11-05 4:02 ` kernel test robot 2021-11-05 4:02 ` kernel test robot 2021-11-04 2:57 ` [PATCH v4 07/10] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-08 17:46 ` Rob Herring 2021-11-08 17:46 ` Rob Herring 2021-11-04 2:57 ` [PATCH v4 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 2:57 ` [PATCH v4 09/10] ARM: sunplus: Add initial support for Sunplus SP7021 SoC Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 15:23 ` kernel test robot 2021-11-04 15:23 ` kernel test robot 2021-11-04 15:23 ` kernel test robot 2021-11-04 2:57 ` [PATCH v4 10/10] ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 8:22 ` [PATCH v4 00/10] Add Sunplus SP7021 SoC Support Marc Zyngier 2021-11-04 8:22 ` Marc Zyngier 2021-11-04 8:35 ` 答复: " qinjian[覃健] 2021-11-04 8:35 ` qinjian[覃健]
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=202110310355.VZBT49OU-lkp@intel.com \ --to=lkp@intel.com \ --cc=broonie@kernel.org \ --cc=devicetree@vger.kernel.org \ --cc=kbuild-all@lists.01.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=maz@kernel.org \ --cc=mturquette@baylibre.com \ --cc=p.zabel@pengutronix.de \ --cc=qinjian@cqplus1.com \ --cc=robh+dt@kernel.org \ --cc=sboyd@kernel.org \ --cc=tglx@linutronix.de \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.