From: Qin Jian <qinjian@cqplus1.com> To: robh+dt@kernel.org Cc: mturquette@baylibre.com, sboyd@kernel.org, tglx@linutronix.de, maz@kernel.org, p.zabel@pengutronix.de, broonie@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, wells.lu@sunplus.com, Qin Jian <qinjian@cqplus1.com> Subject: [PATCH v2 3/8] dt-bindings: reset: Add bindings for SP7021 reset driver Date: Fri, 29 Oct 2021 16:44:29 +0800 [thread overview] Message-ID: <852e24e942cf40b8240ced4de4ac78acc7694355.1635496594.git.qinjian@cqplus1.com> (raw) In-Reply-To: <cover.1635496594.git.qinjian@cqplus1.com> Add documentation to describe Sunplus SP7021 reset driver bindings. Signed-off-by: Qin Jian <qinjian@cqplus1.com> --- .../bindings/reset/sunplus,reset.yaml | 40 ++++++++ MAINTAINERS | 2 + include/dt-bindings/reset/sp-sp7021.h | 99 +++++++++++++++++++ 3 files changed, 141 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/sunplus,reset.yaml create mode 100644 include/dt-bindings/reset/sp-sp7021.h diff --git a/Documentation/devicetree/bindings/reset/sunplus,reset.yaml b/Documentation/devicetree/bindings/reset/sunplus,reset.yaml new file mode 100644 index 000000000..bf55f4ee2 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/sunplus,reset.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) Sunplus Co., Ltd. 2021 +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/sunplus,reset.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Sunplus SoC Reset Controller + +maintainers: + - Qin Jian <qinjian@cqplus1.com> + +properties: + compatible: + enum: + - sunplus,sp7021-reset # Reset Controller on SP7021 and compatible SoCs + - sunplus,q645-reset # Reset Controller on Q645 and compatible SoCs + + "#reset-cells": + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - "#reset-cells" + - reg + +additionalProperties: false + +examples: + - | + rstc: reset@9c000054 { + compatible = "sunplus,sp7021-reset"; + #reset-cells = <1>; + reg = <0x9c000054 0x28>; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 6a5422f10..652f42cab 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2661,6 +2661,8 @@ L: linux-arm-kernel@lists.infradead.org (moderated for mon-subscribers) S: Maintained W: https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview F: Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml +F: Documentation/devicetree/bindings/reset/sunplus,reset.yaml +F: include/dt-bindings/reset/sp-sp7021.h ARM/Synaptics SoC support M: Jisheng Zhang <Jisheng.Zhang@synaptics.com> diff --git a/include/dt-bindings/reset/sp-sp7021.h b/include/dt-bindings/reset/sp-sp7021.h new file mode 100644 index 000000000..8823d25ce --- /dev/null +++ b/include/dt-bindings/reset/sp-sp7021.h @@ -0,0 +1,99 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (C) Sunplus Technology Co., Ltd. + * All rights reserved. + */ +#ifndef _DT_BINDINGS_RST_SUNPLUS_SP7021_H +#define _DT_BINDINGS_RST_SUNPLUS_SP7021_H + +/* mo_reset0 ~ mo_reset9 */ +#define RST_SYSTEM 0x00 +#define RST_RTC 0x02 +#define RST_IOCTL 0x03 +#define RST_IOP 0x04 +#define RST_OTPRX 0x05 +#define RST_NOC 0x06 +#define RST_BR 0x07 +#define RST_RBUS_L00 0x08 +#define RST_SPIFL 0x09 +#define RST_SDCTRL0 0x0a +#define RST_PERI0 0x0b +#define RST_A926 0x0d +#define RST_UMCTL2 0x0e +#define RST_PERI1 0x0f + +#define RST_DDR_PHY0 0x10 +#define RST_ACHIP 0x12 +#define RST_STC0 0x14 +#define RST_STC_AV0 0x15 +#define RST_STC_AV1 0x16 +#define RST_STC_AV2 0x17 +#define RST_UA0 0x18 +#define RST_UA1 0x19 +#define RST_UA2 0x1a +#define RST_UA3 0x1b +#define RST_UA4 0x1c +#define RST_HWUA 0x1d +#define RST_DDC0 0x1e +#define RST_UADMA 0x1f + +#define RST_CBDMA0 0x20 +#define RST_CBDMA1 0x21 +#define RST_SPI_COMBO_0 0x22 +#define RST_SPI_COMBO_1 0x23 +#define RST_SPI_COMBO_2 0x24 +#define RST_SPI_COMBO_3 0x25 +#define RST_AUD 0x26 +#define RST_USBC0 0x2a +#define RST_USBC1 0x2b +#define RST_UPHY0 0x2d +#define RST_UPHY1 0x2e + +#define RST_I2CM0 0x30 +#define RST_I2CM1 0x31 +#define RST_I2CM2 0x32 +#define RST_I2CM3 0x33 +#define RST_PMC 0x3d +#define RST_CARD_CTL0 0x3e +#define RST_CARD_CTL1 0x3f + +#define RST_CARD_CTL4 0x42 +#define RST_BCH 0x44 +#define RST_DDFCH 0x4b +#define RST_CSIIW0 0x4c +#define RST_CSIIW1 0x4d +#define RST_MIPICSI0 0x4e +#define RST_MIPICSI1 0x4f + +#define RST_HDMI_TX 0x50 +#define RST_VPOST 0x55 + +#define RST_TGEN 0x60 +#define RST_DMIX 0x61 +#define RST_TCON 0x6a +#define RST_INTERRUPT 0x6f + +#define RST_RGST 0x70 +#define RST_GPIO 0x73 +#define RST_RBUS_TOP 0x74 + +#define RST_MAILBOX 0x86 +#define RST_SPIND 0x8a +#define RST_I2C2CBUS 0x8b +#define RST_SEC 0x8d +#define RST_DVE 0x8e +#define RST_GPOST0 0x8f + +#define RST_OSD0 0x90 +#define RST_DISP_PWM 0x92 +#define RST_UADBG 0x93 +#define RST_DUMMY_MASTER 0x94 +#define RST_FIO_CTL 0x95 +#define RST_FPGA 0x96 +#define RST_L2SW 0x97 +#define RST_ICM 0x98 +#define RST_AXI_GLOBAL 0x99 + +#define RST_MAX 0xA0 + +#endif -- 2.33.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Qin Jian <qinjian@cqplus1.com> To: robh+dt@kernel.org Cc: mturquette@baylibre.com, sboyd@kernel.org, tglx@linutronix.de, maz@kernel.org, p.zabel@pengutronix.de, broonie@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, wells.lu@sunplus.com, Qin Jian <qinjian@cqplus1.com> Subject: [PATCH v2 3/8] dt-bindings: reset: Add bindings for SP7021 reset driver Date: Fri, 29 Oct 2021 16:44:29 +0800 [thread overview] Message-ID: <852e24e942cf40b8240ced4de4ac78acc7694355.1635496594.git.qinjian@cqplus1.com> (raw) In-Reply-To: <cover.1635496594.git.qinjian@cqplus1.com> Add documentation to describe Sunplus SP7021 reset driver bindings. Signed-off-by: Qin Jian <qinjian@cqplus1.com> --- .../bindings/reset/sunplus,reset.yaml | 40 ++++++++ MAINTAINERS | 2 + include/dt-bindings/reset/sp-sp7021.h | 99 +++++++++++++++++++ 3 files changed, 141 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/sunplus,reset.yaml create mode 100644 include/dt-bindings/reset/sp-sp7021.h diff --git a/Documentation/devicetree/bindings/reset/sunplus,reset.yaml b/Documentation/devicetree/bindings/reset/sunplus,reset.yaml new file mode 100644 index 000000000..bf55f4ee2 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/sunplus,reset.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) Sunplus Co., Ltd. 2021 +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/sunplus,reset.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Sunplus SoC Reset Controller + +maintainers: + - Qin Jian <qinjian@cqplus1.com> + +properties: + compatible: + enum: + - sunplus,sp7021-reset # Reset Controller on SP7021 and compatible SoCs + - sunplus,q645-reset # Reset Controller on Q645 and compatible SoCs + + "#reset-cells": + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - "#reset-cells" + - reg + +additionalProperties: false + +examples: + - | + rstc: reset@9c000054 { + compatible = "sunplus,sp7021-reset"; + #reset-cells = <1>; + reg = <0x9c000054 0x28>; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 6a5422f10..652f42cab 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2661,6 +2661,8 @@ L: linux-arm-kernel@lists.infradead.org (moderated for mon-subscribers) S: Maintained W: https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview F: Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml +F: Documentation/devicetree/bindings/reset/sunplus,reset.yaml +F: include/dt-bindings/reset/sp-sp7021.h ARM/Synaptics SoC support M: Jisheng Zhang <Jisheng.Zhang@synaptics.com> diff --git a/include/dt-bindings/reset/sp-sp7021.h b/include/dt-bindings/reset/sp-sp7021.h new file mode 100644 index 000000000..8823d25ce --- /dev/null +++ b/include/dt-bindings/reset/sp-sp7021.h @@ -0,0 +1,99 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (C) Sunplus Technology Co., Ltd. + * All rights reserved. + */ +#ifndef _DT_BINDINGS_RST_SUNPLUS_SP7021_H +#define _DT_BINDINGS_RST_SUNPLUS_SP7021_H + +/* mo_reset0 ~ mo_reset9 */ +#define RST_SYSTEM 0x00 +#define RST_RTC 0x02 +#define RST_IOCTL 0x03 +#define RST_IOP 0x04 +#define RST_OTPRX 0x05 +#define RST_NOC 0x06 +#define RST_BR 0x07 +#define RST_RBUS_L00 0x08 +#define RST_SPIFL 0x09 +#define RST_SDCTRL0 0x0a +#define RST_PERI0 0x0b +#define RST_A926 0x0d +#define RST_UMCTL2 0x0e +#define RST_PERI1 0x0f + +#define RST_DDR_PHY0 0x10 +#define RST_ACHIP 0x12 +#define RST_STC0 0x14 +#define RST_STC_AV0 0x15 +#define RST_STC_AV1 0x16 +#define RST_STC_AV2 0x17 +#define RST_UA0 0x18 +#define RST_UA1 0x19 +#define RST_UA2 0x1a +#define RST_UA3 0x1b +#define RST_UA4 0x1c +#define RST_HWUA 0x1d +#define RST_DDC0 0x1e +#define RST_UADMA 0x1f + +#define RST_CBDMA0 0x20 +#define RST_CBDMA1 0x21 +#define RST_SPI_COMBO_0 0x22 +#define RST_SPI_COMBO_1 0x23 +#define RST_SPI_COMBO_2 0x24 +#define RST_SPI_COMBO_3 0x25 +#define RST_AUD 0x26 +#define RST_USBC0 0x2a +#define RST_USBC1 0x2b +#define RST_UPHY0 0x2d +#define RST_UPHY1 0x2e + +#define RST_I2CM0 0x30 +#define RST_I2CM1 0x31 +#define RST_I2CM2 0x32 +#define RST_I2CM3 0x33 +#define RST_PMC 0x3d +#define RST_CARD_CTL0 0x3e +#define RST_CARD_CTL1 0x3f + +#define RST_CARD_CTL4 0x42 +#define RST_BCH 0x44 +#define RST_DDFCH 0x4b +#define RST_CSIIW0 0x4c +#define RST_CSIIW1 0x4d +#define RST_MIPICSI0 0x4e +#define RST_MIPICSI1 0x4f + +#define RST_HDMI_TX 0x50 +#define RST_VPOST 0x55 + +#define RST_TGEN 0x60 +#define RST_DMIX 0x61 +#define RST_TCON 0x6a +#define RST_INTERRUPT 0x6f + +#define RST_RGST 0x70 +#define RST_GPIO 0x73 +#define RST_RBUS_TOP 0x74 + +#define RST_MAILBOX 0x86 +#define RST_SPIND 0x8a +#define RST_I2C2CBUS 0x8b +#define RST_SEC 0x8d +#define RST_DVE 0x8e +#define RST_GPOST0 0x8f + +#define RST_OSD0 0x90 +#define RST_DISP_PWM 0x92 +#define RST_UADBG 0x93 +#define RST_DUMMY_MASTER 0x94 +#define RST_FIO_CTL 0x95 +#define RST_FPGA 0x96 +#define RST_L2SW 0x97 +#define RST_ICM 0x98 +#define RST_AXI_GLOBAL 0x99 + +#define RST_MAX 0xA0 + +#endif -- 2.33.1
next prev parent reply other threads:[~2021-10-29 8:50 UTC|newest] Thread overview: 124+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-29 8:44 [PATCH v2 0/8] Add Sunplus SP7021 SoC Support Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 1/8] dt-bindings: vendor-prefixes: Add Sunplus Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 2/8] dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` Qin Jian [this message] 2021-10-29 8:44 ` [PATCH v2 3/8] dt-bindings: reset: Add bindings for SP7021 reset driver Qin Jian 2021-10-29 8:44 ` [PATCH v2 4/8] reset: Add Sunplus " Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-30 4:18 ` kernel test robot 2021-10-30 4:18 ` kernel test robot 2021-10-30 4:18 ` kernel test robot 2021-10-29 8:44 ` [PATCH v2 5/8] dt-bindings: clock: Add bindings for SP7021 clock driver Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 6/8] clk: Add Sunplus " Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 7/8] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 8:44 ` [PATCH v2 8/8] irqchip: Add support for Sunplus " Qin Jian 2021-10-29 8:44 ` Qin Jian 2021-10-29 15:25 ` Marc Zyngier 2021-10-29 15:25 ` Marc Zyngier 2021-11-01 5:01 ` [PATCH v3 0/8] Add Sunplus SP7021 SoC Support Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 5:01 ` [PATCH v3 1/8] dt-bindings: vendor-prefixes: Add Sunplus Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-02 17:44 ` Rob Herring 2021-11-02 17:44 ` Rob Herring 2021-11-01 5:01 ` [PATCH v3 2/8] dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 19:58 ` Rob Herring 2021-11-01 19:58 ` Rob Herring 2021-11-01 5:01 ` [PATCH v3 3/8] dt-bindings: reset: Add bindings for SP7021 reset driver Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-02 11:51 ` Philipp Zabel 2021-11-02 11:51 ` Philipp Zabel 2021-11-03 1:20 ` 答复: " qinjian[覃健] 2021-11-03 1:20 ` qinjian[覃健] 2021-11-01 5:01 ` [PATCH v3 4/8] reset: Add Sunplus " Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-02 12:22 ` Philipp Zabel 2021-11-02 12:22 ` Philipp Zabel 2021-11-03 2:42 ` 答复: " qinjian[覃健] 2021-11-03 2:42 ` qinjian[覃健] 2021-11-01 5:01 ` [PATCH v3 5/8] dt-bindings: clock: Add bindings for SP7021 clock driver Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 19:59 ` Rob Herring 2021-11-01 19:59 ` Rob Herring 2021-11-01 5:01 ` [PATCH v3 6/8] clk: Add Sunplus " Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 10:16 ` kernel test robot 2021-11-01 10:16 ` kernel test robot 2021-11-01 10:16 ` kernel test robot 2021-11-01 5:01 ` [PATCH v3 7/8] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-02 17:45 ` Rob Herring 2021-11-02 17:45 ` Rob Herring 2021-11-01 5:01 ` [PATCH v3 8/8] irqchip: Add Sunplus SP7021 interrupt controller driver Qin Jian 2021-11-01 5:01 ` Qin Jian 2021-11-01 8:27 ` kernel test robot 2021-11-01 8:27 ` kernel test robot 2021-11-01 8:27 ` kernel test robot 2021-11-01 10:26 ` kernel test robot 2021-11-01 10:26 ` kernel test robot 2021-11-01 10:26 ` kernel test robot 2021-10-30 15:30 ` [PATCH v2 8/8] irqchip: Add support for Sunplus SP7021 interrupt controller kernel test robot 2021-10-30 15:30 ` kernel test robot 2021-10-30 15:30 ` kernel test robot 2021-10-30 19:29 ` kernel test robot 2021-10-30 19:29 ` kernel test robot 2021-11-04 2:56 ` [PATCH v4 00/10] Add Sunplus SP7021 SoC Support Qin Jian 2021-11-04 2:56 ` Qin Jian 2021-11-04 2:56 ` [PATCH v4 01/10] dt-bindings: vendor-prefixes: Add Sunplus Qin Jian 2021-11-04 2:56 ` Qin Jian 2021-11-08 17:45 ` Rob Herring 2021-11-08 17:45 ` Rob Herring 2021-11-04 2:56 ` [PATCH v4 02/10] dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards Qin Jian 2021-11-04 2:56 ` Qin Jian 2021-11-08 17:46 ` Rob Herring 2021-11-08 17:46 ` Rob Herring 2021-11-04 2:57 ` [PATCH v4 03/10] dt-bindings: reset: Add bindings for SP7021 reset driver Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-12 21:56 ` Rob Herring 2021-11-12 21:56 ` Rob Herring 2021-11-04 2:57 ` [PATCH v4 04/10] reset: Add Sunplus " Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 2:57 ` [PATCH v4 05/10] dt-bindings: clock: Add bindings for SP7021 clock driver Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-08 17:46 ` Rob Herring 2021-11-08 17:46 ` Rob Herring 2021-11-04 2:57 ` [PATCH v4 06/10] clk: Add Sunplus " Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 11:32 ` kernel test robot 2021-11-04 11:32 ` kernel test robot 2021-11-04 11:32 ` kernel test robot 2021-11-05 4:02 ` kernel test robot 2021-11-05 4:02 ` kernel test robot 2021-11-05 4:02 ` kernel test robot 2021-11-04 2:57 ` [PATCH v4 07/10] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-08 17:46 ` Rob Herring 2021-11-08 17:46 ` Rob Herring 2021-11-04 2:57 ` [PATCH v4 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 2:57 ` [PATCH v4 09/10] ARM: sunplus: Add initial support for Sunplus SP7021 SoC Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 5:09 ` Randy Dunlap 2021-11-04 15:23 ` kernel test robot 2021-11-04 15:23 ` kernel test robot 2021-11-04 15:23 ` kernel test robot 2021-11-04 2:57 ` [PATCH v4 10/10] ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig Qin Jian 2021-11-04 2:57 ` Qin Jian 2021-11-04 8:22 ` [PATCH v4 00/10] Add Sunplus SP7021 SoC Support Marc Zyngier 2021-11-04 8:22 ` Marc Zyngier 2021-11-04 8:35 ` 答复: " qinjian[覃健] 2021-11-04 8:35 ` qinjian[覃健]
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