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From: Romain Perier <romain.perier@gmail.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Daniel Palmer <daniel@0x0f.com>,
	Romain Perier <romain.perier@gmail.com>,
	Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 2/5] clocksource: msc313e: Add support for ssd20xd-based platforms
Date: Fri, 26 Nov 2021 21:21:41 +0100	[thread overview]
Message-ID: <20211126202144.72936-4-romain.perier@gmail.com> (raw)
In-Reply-To: <20211126202144.72936-1-romain.perier@gmail.com>

SSD20X family SoCs have an oscillator running at ~432Mhz for timer1 and
timer2, while timer0 is running at 12Mhz. There are no ways to reduce or
divide these clocks in the clktree. However, SSD20X SoCs provide an
internal "timer_divide" register that can act on this input oscillator.
This commit adds support for this register, as timer1 and timer2 are
used as clockevents these will run at 48Mhz.

Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
 drivers/clocksource/timer-msc313e.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/clocksource/timer-msc313e.c b/drivers/clocksource/timer-msc313e.c
index 81f161744349..6e7a0ece6601 100644
--- a/drivers/clocksource/timer-msc313e.c
+++ b/drivers/clocksource/timer-msc313e.c
@@ -30,7 +30,9 @@
 #define MSC313E_REG_TIMER_MAX_HIGH	0x0c
 #define MSC313E_REG_COUNTER_LOW		0x10
 #define MSC313E_REG_COUNTER_HIGH	0x14
+#define MSC313E_REG_TIMER_DIVIDE	0x18
 
+#define MSC313E_CLK_DIVIDER		9
 #define TIMER_SYNC_TICKS		3
 
 struct msc313e_delay {
@@ -165,6 +167,12 @@ static int __init msc313e_clkevt_init(struct device_node *np)
 	if (ret)
 		return ret;
 
+	if (of_device_is_compatible(np, "mstar,ssd20xd-timer")) {
+		to->of_clk.rate = clk_get_rate(to->of_clk.clk) / MSC313E_CLK_DIVIDER;
+		to->of_clk.period = DIV_ROUND_UP(to->of_clk.rate, HZ);
+		writew(MSC313E_CLK_DIVIDER - 1, timer_of_base(to) + MSC313E_REG_TIMER_DIVIDE);
+	}
+
 	msc313e_clkevt.cpumask = cpu_possible_mask;
 	msc313e_clkevt.irq = to->of_irq.irq;
 	to->clkevt = msc313e_clkevt;
@@ -226,3 +234,4 @@ static int __init msc313e_timer_init(struct device_node *np)
 }
 
 TIMER_OF_DECLARE(msc313, "mstar,msc313e-timer", msc313e_timer_init);
+TIMER_OF_DECLARE(ssd20xd, "mstar,ssd20xd-timer", msc313e_timer_init);
-- 
2.33.0


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WARNING: multiple messages have this Message-ID (diff)
From: Romain Perier <romain.perier@gmail.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Daniel Palmer <daniel@0x0f.com>,
	Romain Perier <romain.perier@gmail.com>,
	Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 2/5] clocksource: msc313e: Add support for ssd20xd-based platforms
Date: Fri, 26 Nov 2021 21:21:41 +0100	[thread overview]
Message-ID: <20211126202144.72936-4-romain.perier@gmail.com> (raw)
In-Reply-To: <20211126202144.72936-1-romain.perier@gmail.com>

SSD20X family SoCs have an oscillator running at ~432Mhz for timer1 and
timer2, while timer0 is running at 12Mhz. There are no ways to reduce or
divide these clocks in the clktree. However, SSD20X SoCs provide an
internal "timer_divide" register that can act on this input oscillator.
This commit adds support for this register, as timer1 and timer2 are
used as clockevents these will run at 48Mhz.

Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
 drivers/clocksource/timer-msc313e.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/clocksource/timer-msc313e.c b/drivers/clocksource/timer-msc313e.c
index 81f161744349..6e7a0ece6601 100644
--- a/drivers/clocksource/timer-msc313e.c
+++ b/drivers/clocksource/timer-msc313e.c
@@ -30,7 +30,9 @@
 #define MSC313E_REG_TIMER_MAX_HIGH	0x0c
 #define MSC313E_REG_COUNTER_LOW		0x10
 #define MSC313E_REG_COUNTER_HIGH	0x14
+#define MSC313E_REG_TIMER_DIVIDE	0x18
 
+#define MSC313E_CLK_DIVIDER		9
 #define TIMER_SYNC_TICKS		3
 
 struct msc313e_delay {
@@ -165,6 +167,12 @@ static int __init msc313e_clkevt_init(struct device_node *np)
 	if (ret)
 		return ret;
 
+	if (of_device_is_compatible(np, "mstar,ssd20xd-timer")) {
+		to->of_clk.rate = clk_get_rate(to->of_clk.clk) / MSC313E_CLK_DIVIDER;
+		to->of_clk.period = DIV_ROUND_UP(to->of_clk.rate, HZ);
+		writew(MSC313E_CLK_DIVIDER - 1, timer_of_base(to) + MSC313E_REG_TIMER_DIVIDE);
+	}
+
 	msc313e_clkevt.cpumask = cpu_possible_mask;
 	msc313e_clkevt.irq = to->of_irq.irq;
 	to->clkevt = msc313e_clkevt;
@@ -226,3 +234,4 @@ static int __init msc313e_timer_init(struct device_node *np)
 }
 
 TIMER_OF_DECLARE(msc313, "mstar,msc313e-timer", msc313e_timer_init);
+TIMER_OF_DECLARE(ssd20xd, "mstar,ssd20xd-timer", msc313e_timer_init);
-- 
2.33.0


  parent reply	other threads:[~2021-11-26 20:24 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-26 20:21 [PATCH 0/5] Add timers for Mstar SoCs Romain Perier
2021-11-26 20:21 ` Romain Perier
2021-11-26 20:21 ` [PATCH 1/5] clocksource: Add MStar MSC313e timer support Romain Perier
2021-11-26 20:21   ` Romain Perier
2021-11-29 17:02   ` Daniel Lezcano
2021-11-29 17:02     ` Daniel Lezcano
     [not found]     ` <CABgxDo+W3vg_dDTphkOLxRPzKER891CxTJnPPVuryj9YQOg1EQ@mail.gmail.com>
2021-11-30 14:39       ` Daniel Lezcano
2021-11-30 14:39         ` Daniel Lezcano
2021-11-26 20:21 ` [PATCH 2/4] ARM: dts: mstar: Remove unused rtc_xtal Romain Perier
2021-11-26 20:21   ` Romain Perier
2021-11-27  1:22   ` Daniel Palmer
2021-11-27  1:22     ` Daniel Palmer
2021-11-26 20:21 ` Romain Perier [this message]
2021-11-26 20:21   ` [PATCH 2/5] clocksource: msc313e: Add support for ssd20xd-based platforms Romain Perier
2021-11-26 20:21 ` [PATCH 3/5] dt-bindings: timer: Add Mstar MSC313e timer devicetree bindings documentation Romain Perier
2021-11-26 20:21   ` Romain Perier
2021-11-27  2:23   ` Daniel Palmer
2021-11-27  2:23     ` Daniel Palmer
2021-12-02  0:11   ` Rob Herring
2021-12-02  0:11     ` Rob Herring
2021-11-26 20:21 ` [PATCH 4/5] ARM: dts: mstar: Add timers device nodes Romain Perier
2021-11-26 20:21   ` Romain Perier
2021-11-26 20:21 ` [PATCH 5/5] ARM: dts: mstar: Switch to compatible "mstar,ssd20xd-timer" on ssd20xd Romain Perier
2021-11-26 20:21   ` [PATCH 5/5] ARM: dts: mstar: Switch to compatible "mstar, ssd20xd-timer" " Romain Perier
2021-11-27  2:34   ` [PATCH 5/5] ARM: dts: mstar: Switch to compatible "mstar,ssd20xd-timer" " Daniel Palmer
2021-11-27  2:34     ` Daniel Palmer
2021-11-28 13:17   ` Daniel Palmer
2021-11-28 13:17     ` Daniel Palmer
     [not found]     ` <CABgxDo+pF0RKK+HL+MVv5s0pn1T9a9Mqp6uPEkT0YPEH9kvQqw@mail.gmail.com>
2021-12-12 16:44       ` Daniel Palmer
2021-12-12 16:44         ` Daniel Palmer

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