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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>,
	Sven Peter <sven@svenpeter.dev>,
	Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dougall <dougallj@gmail.com>,
	kernel-team@android.com
Subject: [PATCH v3 09/10] drivers/perf: arm_pmu: Handle 47 bit counters
Date: Tue, 14 Dec 2021 18:26:33 +0000	[thread overview]
Message-ID: <20211214182634.727330-10-maz@kernel.org> (raw)
In-Reply-To: <20211214182634.727330-1-maz@kernel.org>

The current ARM PMU framework can only deal with 32 or 64bit counters.
Teach it about a 47bit flavour.

Yes, this is odd.

Reviewed-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 drivers/perf/arm_pmu.c       | 2 ++
 include/linux/perf/arm_pmu.h | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
index 295cc7952d0e..0a9ed1a061ac 100644
--- a/drivers/perf/arm_pmu.c
+++ b/drivers/perf/arm_pmu.c
@@ -109,6 +109,8 @@ static inline u64 arm_pmu_event_max_period(struct perf_event *event)
 {
 	if (event->hw.flags & ARMPMU_EVT_64BIT)
 		return GENMASK_ULL(63, 0);
+	else if (event->hw.flags & ARMPMU_EVT_47BIT)
+		return GENMASK_ULL(46, 0);
 	else
 		return GENMASK_ULL(31, 0);
 }
diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h
index 2512e2f9cd4e..0407a38b470a 100644
--- a/include/linux/perf/arm_pmu.h
+++ b/include/linux/perf/arm_pmu.h
@@ -26,6 +26,8 @@
  */
 /* Event uses a 64bit counter */
 #define ARMPMU_EVT_64BIT		1
+/* Event uses a 47bit counter */
+#define ARMPMU_EVT_47BIT		2
 
 #define HW_OP_UNSUPPORTED		0xFFFF
 #define C(_x)				PERF_COUNT_HW_CACHE_##_x
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>,
	Sven Peter <sven@svenpeter.dev>,
	Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dougall <dougallj@gmail.com>,
	kernel-team@android.com
Subject: [PATCH v3 09/10] drivers/perf: arm_pmu: Handle 47 bit counters
Date: Tue, 14 Dec 2021 18:26:33 +0000	[thread overview]
Message-ID: <20211214182634.727330-10-maz@kernel.org> (raw)
In-Reply-To: <20211214182634.727330-1-maz@kernel.org>

The current ARM PMU framework can only deal with 32 or 64bit counters.
Teach it about a 47bit flavour.

Yes, this is odd.

Reviewed-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 drivers/perf/arm_pmu.c       | 2 ++
 include/linux/perf/arm_pmu.h | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
index 295cc7952d0e..0a9ed1a061ac 100644
--- a/drivers/perf/arm_pmu.c
+++ b/drivers/perf/arm_pmu.c
@@ -109,6 +109,8 @@ static inline u64 arm_pmu_event_max_period(struct perf_event *event)
 {
 	if (event->hw.flags & ARMPMU_EVT_64BIT)
 		return GENMASK_ULL(63, 0);
+	else if (event->hw.flags & ARMPMU_EVT_47BIT)
+		return GENMASK_ULL(46, 0);
 	else
 		return GENMASK_ULL(31, 0);
 }
diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h
index 2512e2f9cd4e..0407a38b470a 100644
--- a/include/linux/perf/arm_pmu.h
+++ b/include/linux/perf/arm_pmu.h
@@ -26,6 +26,8 @@
  */
 /* Event uses a 64bit counter */
 #define ARMPMU_EVT_64BIT		1
+/* Event uses a 47bit counter */
+#define ARMPMU_EVT_47BIT		2
 
 #define HW_OP_UNSUPPORTED		0xFFFF
 #define C(_x)				PERF_COUNT_HW_CACHE_##_x
-- 
2.30.2


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  parent reply	other threads:[~2021-12-14 18:27 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-14 18:26 [PATCH v3 00/10] drivers/perf: CPU PMU driver for Apple M1 Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 01/10] dt-bindings: arm-pmu: Document Apple PMU compatible strings Marc Zyngier
2021-12-14 18:26   ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 02/10] dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts Marc Zyngier
2021-12-14 18:26   ` [PATCH v3 02/10] dt-bindings: apple, aic: " Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 03/10] dt-bindings: apple,aic: Add affinity description for " Marc Zyngier
2021-12-14 18:26   ` [PATCH v3 03/10] dt-bindings: apple, aic: " Marc Zyngier
2021-12-15 21:35   ` [PATCH v3 03/10] dt-bindings: apple,aic: " Rob Herring
2021-12-15 21:35     ` Rob Herring
2021-12-14 18:26 ` [PATCH v3 04/10] irqchip/apple-aic: Parse FIQ affinities from device-tree Marc Zyngier
2021-12-14 18:26   ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 05/10] irqchip/apple-aic: Wire PMU interrupts Marc Zyngier
2021-12-14 18:26   ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 06/10] arm64: dts: apple: Add t8103 PMU interrupt affinities Marc Zyngier
2021-12-14 18:26   ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 07/10] arm64: dts: apple: Add t8301 PMU nodes Marc Zyngier
2021-12-14 18:26   ` Marc Zyngier
2021-12-14 18:48   ` Alyssa Rosenzweig
2021-12-14 18:48     ` Alyssa Rosenzweig
2021-12-14 18:26 ` [PATCH v3 08/10] irqchip/apple-aic: Move PMU-specific registers to their own include file Marc Zyngier
2021-12-14 18:26   ` Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier [this message]
2021-12-14 18:26   ` [PATCH v3 09/10] drivers/perf: arm_pmu: Handle 47 bit counters Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 10/10] drivers/perf: Add Apple icestorm/firestorm CPU PMU driver Marc Zyngier
2021-12-14 18:26   ` Marc Zyngier

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