From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Rob Herring <robh+dt@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Dougall <dougallj@gmail.com>,
kernel-team@android.com, Rob Herring <robh@kernel.org>
Subject: [PATCH v3 02/10] dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts
Date: Tue, 14 Dec 2021 18:26:26 +0000 [thread overview]
Message-ID: <20211214182634.727330-3-maz@kernel.org> (raw)
In-Reply-To: <20211214182634.727330-1-maz@kernel.org>
Advertise the two pseudo-interrupts that tied to the two PMU
flavours present in the Apple M1 SoC.
We choose the expose two different pseudo-interrupts to the OS
as the e-core PMU is obviously different from the p-core one,
effectively presenting two different devices.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
.../devicetree/bindings/interrupt-controller/apple,aic.yaml | 2 ++
include/dt-bindings/interrupt-controller/apple-aic.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
index cf6c091a07b1..b95e41816953 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@ -56,6 +56,8 @@ properties:
- 1: virtual HV timer
- 2: physical guest timer
- 3: virtual guest timer
+ - 4: 'efficient' CPU PMU
+ - 5: 'performance' CPU PMU
The 3rd cell contains the interrupt flags. This is normally
IRQ_TYPE_LEVEL_HIGH (4).
diff --git a/include/dt-bindings/interrupt-controller/apple-aic.h b/include/dt-bindings/interrupt-controller/apple-aic.h
index 604f2bb30ac0..bf3aac0e5491 100644
--- a/include/dt-bindings/interrupt-controller/apple-aic.h
+++ b/include/dt-bindings/interrupt-controller/apple-aic.h
@@ -11,5 +11,7 @@
#define AIC_TMR_HV_VIRT 1
#define AIC_TMR_GUEST_PHYS 2
#define AIC_TMR_GUEST_VIRT 3
+#define AIC_CPU_PMU_E 4
+#define AIC_CPU_PMU_P 5
#endif
--
2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Rob Herring <robh+dt@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Dougall <dougallj@gmail.com>,
kernel-team@android.com, Rob Herring <robh@kernel.org>
Subject: [PATCH v3 02/10] dt-bindings: apple, aic: Add CPU PMU per-cpu pseudo-interrupts
Date: Tue, 14 Dec 2021 18:26:26 +0000 [thread overview]
Message-ID: <20211214182634.727330-3-maz@kernel.org> (raw)
In-Reply-To: <20211214182634.727330-1-maz@kernel.org>
Advertise the two pseudo-interrupts that tied to the two PMU
flavours present in the Apple M1 SoC.
We choose the expose two different pseudo-interrupts to the OS
as the e-core PMU is obviously different from the p-core one,
effectively presenting two different devices.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
.../devicetree/bindings/interrupt-controller/apple,aic.yaml | 2 ++
include/dt-bindings/interrupt-controller/apple-aic.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
index cf6c091a07b1..b95e41816953 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@ -56,6 +56,8 @@ properties:
- 1: virtual HV timer
- 2: physical guest timer
- 3: virtual guest timer
+ - 4: 'efficient' CPU PMU
+ - 5: 'performance' CPU PMU
The 3rd cell contains the interrupt flags. This is normally
IRQ_TYPE_LEVEL_HIGH (4).
diff --git a/include/dt-bindings/interrupt-controller/apple-aic.h b/include/dt-bindings/interrupt-controller/apple-aic.h
index 604f2bb30ac0..bf3aac0e5491 100644
--- a/include/dt-bindings/interrupt-controller/apple-aic.h
+++ b/include/dt-bindings/interrupt-controller/apple-aic.h
@@ -11,5 +11,7 @@
#define AIC_TMR_HV_VIRT 1
#define AIC_TMR_GUEST_PHYS 2
#define AIC_TMR_GUEST_VIRT 3
+#define AIC_CPU_PMU_E 4
+#define AIC_CPU_PMU_P 5
#endif
--
2.30.2
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next prev parent reply other threads:[~2021-12-14 18:27 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-14 18:26 [PATCH v3 00/10] drivers/perf: CPU PMU driver for Apple M1 Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 01/10] dt-bindings: arm-pmu: Document Apple PMU compatible strings Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier [this message]
2021-12-14 18:26 ` [PATCH v3 02/10] dt-bindings: apple, aic: Add CPU PMU per-cpu pseudo-interrupts Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 03/10] dt-bindings: apple,aic: Add affinity description for " Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 03/10] dt-bindings: apple, aic: " Marc Zyngier
2021-12-15 21:35 ` [PATCH v3 03/10] dt-bindings: apple,aic: " Rob Herring
2021-12-15 21:35 ` Rob Herring
2021-12-14 18:26 ` [PATCH v3 04/10] irqchip/apple-aic: Parse FIQ affinities from device-tree Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 05/10] irqchip/apple-aic: Wire PMU interrupts Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 06/10] arm64: dts: apple: Add t8103 PMU interrupt affinities Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 07/10] arm64: dts: apple: Add t8301 PMU nodes Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
2021-12-14 18:48 ` Alyssa Rosenzweig
2021-12-14 18:48 ` Alyssa Rosenzweig
2021-12-14 18:26 ` [PATCH v3 08/10] irqchip/apple-aic: Move PMU-specific registers to their own include file Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 09/10] drivers/perf: arm_pmu: Handle 47 bit counters Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
2021-12-14 18:26 ` [PATCH v3 10/10] drivers/perf: Add Apple icestorm/firestorm CPU PMU driver Marc Zyngier
2021-12-14 18:26 ` Marc Zyngier
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