From: Biju Das <biju.das.jz@bp.renesas.com> To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Mauro Carvalho Chehab <mchehab@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org> Cc: Biju Das <biju.das.jz@bp.renesas.com>, Geert Uytterhoeven <geert+renesas@glider.be>, linux-renesas-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson <Chris.Paterson2@renesas.com>, Biju Das <biju.das@bp.renesas.com>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [RFC 00/28] Add RZ/G2L Display support Date: Wed, 12 Jan 2022 17:45:44 +0000 [thread overview] Message-ID: <20220112174612.10773-1-biju.das.jz@bp.renesas.com> (raw) RZ/G2L LCD controller composed of Frame compression Processor(FCPVD), Video signal processor (VSPD) and Display unit(DU). The output of LCDC is connected to Display parallel interface and MIPI link video interface. This patch series aims to add basic display support on RZ/G2L SMARC EVK platform. The output from DSI is connected to ADV7535. Implemntation details:- Clock:- PLL5 generates 2 clock sources, FOUTPOSTDIV and FOUT1PH0 and vclk is sourced through DSI divider which is connected to a mux with the above clock sources. Pll5-->Mux->DSI divider--> vclk. The parameters used for generating PLL5 frequency is based on a LUT[1] from the bsp release. DSI mode and DPI mode needs different set of PLL5 parameters for generating the video clock. Currently we support only DSI mode. later extend this to support DPI mode. LCDC: DU shares same clocks and reset line with VSPD and FCPVD. it does not have DU group and plane registers like R-Car. it supports FHD@60 for DSI interface. VSPD: VSPD does not have version register, so a new compatible introduced to get version string. Please share your valuable comments on this patch series. [1]https://github.com/renesas-rz/rz_linux-cip/tree/rzg2l-cip41/drivers/gpu/drm/rcar-du Biju Das (28): clk: renesas: rzg2l: Add FOUTPOSTDIV clk support clk: renesas: rzg2l: Add PLL5_4 clk mux support clk: renesas: rzg2l: Add DSI divider clk support clk: renesas: r9a07g044: Add M1 clock support clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support clk: renesas: r9a07g044: Add M3 Clock support clk: renesas: r9a07g044: Add M4 Clock support clk: renesas: r9a07g044: Add LCDC clock and reset entries clk: renesas: r9a07g044: Add DSI clock and reset entries drm: rcar-du: of: Increase buff size for compatible variable drm: rcar-du: Add num_rpf to struct rcar_du_device_info drm: rcar-du: Add max_width and max_height to struct rcar_du_device_info drm: rcar-du: Add RCAR_DU_FEATURE_PLANE feature bit drm: rcar-du: Allow DU plane feature based on DU feature bit drm: rcar_du: Add RCAR_DU_FEATURE_GROUP feature bit drm: rcar-du: Allow DU group feature based on feature bit dt-bindings: display: renesas,du: Document r9a07g044l bindings drm: rcar-du: Add RZ/G2L LCDC Support media: dt-bindings: media: renesas,vsp1: Document RZ/{G2L,V2L} VSPD bindings media: vsp1: Add support for the RZ/G2L VSPD dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings drm: rcar-du: Add RZ/G2L DSI driver arm64: dts: renesas: r9a07g044: Add fcpvd node arm64: dts: renesas: r9a07g044: Add vspd node arm64: dts: renesas: r9a07g044: Add DU node arm64: dts: renesas: r9a07g044: Add dsi node arm64: dts: renesas: r9a07g044: Link DSI with DU node arm64: dts: renesas: rzg2l-smarc: Enable Display on carrier board .../bindings/display/bridge/renesas,dsi.yaml | 143 ++++ .../bindings/display/renesas,du.yaml | 54 ++ .../bindings/media/renesas,vsp1.yaml | 4 +- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 94 +++ arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 61 ++ drivers/clk/renesas/r9a07g044-cpg.c | 57 ++ drivers/clk/renesas/rzg2l-cpg.c | 426 +++++++++++ drivers/clk/renesas/rzg2l-cpg.h | 31 + drivers/gpu/drm/rcar-du/Kconfig | 7 + drivers/gpu/drm/rcar-du/Makefile | 1 + drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 151 +++- drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 2 + drivers/gpu/drm/rcar-du/rcar_du_drv.c | 144 +++- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 9 + drivers/gpu/drm/rcar-du/rcar_du_group.c | 15 +- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 17 +- drivers/gpu/drm/rcar-du/rcar_du_of.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_regs.h | 52 ++ drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 9 +- drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c | 676 ++++++++++++++++++ drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi_regs.h | 151 ++++ drivers/media/platform/vsp1/vsp1.h | 1 + drivers/media/platform/vsp1/vsp1_drv.c | 31 +- drivers/media/platform/vsp1/vsp1_lif.c | 7 +- drivers/media/platform/vsp1/vsp1_regs.h | 1 + 25 files changed, 2070 insertions(+), 76 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi_regs.h -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Biju Das <biju.das.jz@bp.renesas.com> To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Mauro Carvalho Chehab <mchehab@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org> Cc: devicetree@vger.kernel.org, Chris Paterson <Chris.Paterson2@renesas.com>, Geert Uytterhoeven <geert+renesas@glider.be>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>, dri-devel@lists.freedesktop.org, Biju Das <biju.das@bp.renesas.com>, linux-renesas-soc@vger.kernel.org, Biju Das <biju.das.jz@bp.renesas.com>, linux-clk@vger.kernel.org, linux-media@vger.kernel.org Subject: [RFC 00/28] Add RZ/G2L Display support Date: Wed, 12 Jan 2022 17:45:44 +0000 [thread overview] Message-ID: <20220112174612.10773-1-biju.das.jz@bp.renesas.com> (raw) RZ/G2L LCD controller composed of Frame compression Processor(FCPVD), Video signal processor (VSPD) and Display unit(DU). The output of LCDC is connected to Display parallel interface and MIPI link video interface. This patch series aims to add basic display support on RZ/G2L SMARC EVK platform. The output from DSI is connected to ADV7535. Implemntation details:- Clock:- PLL5 generates 2 clock sources, FOUTPOSTDIV and FOUT1PH0 and vclk is sourced through DSI divider which is connected to a mux with the above clock sources. Pll5-->Mux->DSI divider--> vclk. The parameters used for generating PLL5 frequency is based on a LUT[1] from the bsp release. DSI mode and DPI mode needs different set of PLL5 parameters for generating the video clock. Currently we support only DSI mode. later extend this to support DPI mode. LCDC: DU shares same clocks and reset line with VSPD and FCPVD. it does not have DU group and plane registers like R-Car. it supports FHD@60 for DSI interface. VSPD: VSPD does not have version register, so a new compatible introduced to get version string. Please share your valuable comments on this patch series. [1]https://github.com/renesas-rz/rz_linux-cip/tree/rzg2l-cip41/drivers/gpu/drm/rcar-du Biju Das (28): clk: renesas: rzg2l: Add FOUTPOSTDIV clk support clk: renesas: rzg2l: Add PLL5_4 clk mux support clk: renesas: rzg2l: Add DSI divider clk support clk: renesas: r9a07g044: Add M1 clock support clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support clk: renesas: r9a07g044: Add M3 Clock support clk: renesas: r9a07g044: Add M4 Clock support clk: renesas: r9a07g044: Add LCDC clock and reset entries clk: renesas: r9a07g044: Add DSI clock and reset entries drm: rcar-du: of: Increase buff size for compatible variable drm: rcar-du: Add num_rpf to struct rcar_du_device_info drm: rcar-du: Add max_width and max_height to struct rcar_du_device_info drm: rcar-du: Add RCAR_DU_FEATURE_PLANE feature bit drm: rcar-du: Allow DU plane feature based on DU feature bit drm: rcar_du: Add RCAR_DU_FEATURE_GROUP feature bit drm: rcar-du: Allow DU group feature based on feature bit dt-bindings: display: renesas,du: Document r9a07g044l bindings drm: rcar-du: Add RZ/G2L LCDC Support media: dt-bindings: media: renesas,vsp1: Document RZ/{G2L,V2L} VSPD bindings media: vsp1: Add support for the RZ/G2L VSPD dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings drm: rcar-du: Add RZ/G2L DSI driver arm64: dts: renesas: r9a07g044: Add fcpvd node arm64: dts: renesas: r9a07g044: Add vspd node arm64: dts: renesas: r9a07g044: Add DU node arm64: dts: renesas: r9a07g044: Add dsi node arm64: dts: renesas: r9a07g044: Link DSI with DU node arm64: dts: renesas: rzg2l-smarc: Enable Display on carrier board .../bindings/display/bridge/renesas,dsi.yaml | 143 ++++ .../bindings/display/renesas,du.yaml | 54 ++ .../bindings/media/renesas,vsp1.yaml | 4 +- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 94 +++ arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 61 ++ drivers/clk/renesas/r9a07g044-cpg.c | 57 ++ drivers/clk/renesas/rzg2l-cpg.c | 426 +++++++++++ drivers/clk/renesas/rzg2l-cpg.h | 31 + drivers/gpu/drm/rcar-du/Kconfig | 7 + drivers/gpu/drm/rcar-du/Makefile | 1 + drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 151 +++- drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 2 + drivers/gpu/drm/rcar-du/rcar_du_drv.c | 144 +++- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 9 + drivers/gpu/drm/rcar-du/rcar_du_group.c | 15 +- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 17 +- drivers/gpu/drm/rcar-du/rcar_du_of.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_regs.h | 52 ++ drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 9 +- drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c | 676 ++++++++++++++++++ drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi_regs.h | 151 ++++ drivers/media/platform/vsp1/vsp1.h | 1 + drivers/media/platform/vsp1/vsp1_drv.c | 31 +- drivers/media/platform/vsp1/vsp1_lif.c | 7 +- drivers/media/platform/vsp1/vsp1_regs.h | 1 + 25 files changed, 2070 insertions(+), 76 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi_regs.h -- 2.17.1
next reply other threads:[~2022-01-12 17:46 UTC|newest] Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-12 17:45 Biju Das [this message] 2022-01-12 17:45 ` [RFC 00/28] Add RZ/G2L Display support Biju Das 2022-01-12 17:45 ` [RFC 01/28] clk: renesas: rzg2l: Add FOUTPOSTDIV clk support Biju Das 2022-01-12 21:37 ` kernel test robot 2022-01-13 9:40 ` kernel test robot 2022-01-13 9:40 ` kernel test robot 2022-02-01 11:44 ` Geert Uytterhoeven 2022-03-18 10:21 ` Biju Das 2022-01-12 17:45 ` [RFC 02/28] clk: renesas: rzg2l: Add PLL5_4 clk mux support Biju Das 2022-02-01 14:33 ` Geert Uytterhoeven 2022-03-18 10:28 ` Biju Das 2022-01-12 17:45 ` [RFC 03/28] clk: renesas: rzg2l: Add DSI divider clk support Biju Das 2022-01-12 17:45 ` [RFC 04/28] clk: renesas: r9a07g044: Add M1 clock support Biju Das 2022-02-01 14:36 ` Geert Uytterhoeven 2022-03-18 10:29 ` Biju Das 2022-01-12 17:45 ` [RFC 05/28] clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support Biju Das 2022-02-01 9:19 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 06/28] clk: renesas: r9a07g044: Add M3 Clock support Biju Das 2022-02-01 9:19 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 07/28] clk: renesas: r9a07g044: Add M4 " Biju Das 2022-02-01 9:19 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 08/28] clk: renesas: r9a07g044: Add LCDC clock and reset entries Biju Das 2022-02-01 9:19 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 09/28] clk: renesas: r9a07g044: Add DSI " Biju Das 2022-02-01 9:21 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 10/28] drm: rcar-du: of: Increase buff size for compatible variable Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-14 10:17 ` Geert Uytterhoeven 2022-01-14 10:17 ` Geert Uytterhoeven 2022-01-14 12:54 ` Biju Das 2022-01-14 12:54 ` Biju Das 2022-01-23 13:52 ` Laurent Pinchart 2022-01-23 13:52 ` Laurent Pinchart 2022-01-24 8:18 ` Geert Uytterhoeven 2022-01-24 8:18 ` Geert Uytterhoeven 2022-01-26 0:53 ` Laurent Pinchart 2022-01-26 0:53 ` Laurent Pinchart 2022-01-26 6:55 ` Biju Das 2022-01-26 6:55 ` Biju Das 2022-01-12 17:45 ` [RFC 11/28] drm: rcar-du: Add num_rpf to struct rcar_du_device_info Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-23 13:55 ` Laurent Pinchart 2022-01-23 13:55 ` Laurent Pinchart 2022-03-13 10:12 ` Biju Das 2022-03-13 10:12 ` Biju Das 2022-01-12 17:45 ` [RFC 12/28] drm: rcar-du: Add max_width and max_height " Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-12 17:45 ` [RFC 13/28] drm: rcar-du: Add RCAR_DU_FEATURE_PLANE feature bit Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-12 17:45 ` [RFC 14/28] drm: rcar-du: Allow DU plane feature based on DU " Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-12 17:45 ` [RFC 15/28] drm: rcar_du: Add RCAR_DU_FEATURE_GROUP " Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-12 17:46 ` [RFC 16/28] drm: rcar-du: Allow DU group feature based on " Biju Das 2022-01-12 17:46 ` Biju Das 2022-01-23 13:57 ` Laurent Pinchart 2022-01-23 13:57 ` Laurent Pinchart 2022-01-12 17:46 ` [RFC 17/28] dt-bindings: display: renesas,du: Document r9a07g044l bindings Biju Das 2022-01-12 17:46 ` [RFC 17/28] dt-bindings: display: renesas, du: " Biju Das 2022-01-22 1:01 ` [RFC 17/28] dt-bindings: display: renesas,du: " Rob Herring 2022-01-22 1:01 ` Rob Herring 2022-01-22 11:20 ` Biju Das 2022-01-22 11:20 ` [RFC 17/28] dt-bindings: display: renesas, du: " Biju Das 2022-01-12 17:46 ` [RFC 18/28] drm: rcar-du: Add RZ/G2L LCDC Support Biju Das 2022-01-12 17:46 ` Biju Das 2022-01-23 1:35 ` Laurent Pinchart 2022-01-23 1:35 ` Laurent Pinchart 2022-03-08 18:54 ` Biju Das 2022-03-08 18:54 ` Biju Das 2022-01-12 17:46 ` [RFC 19/28] media: dt-bindings: media: renesas,vsp1: Document RZ/{G2L,V2L} VSPD bindings Biju Das 2022-01-22 1:02 ` Rob Herring 2022-01-22 11:23 ` Biju Das 2022-01-23 0:14 ` Laurent Pinchart 2022-01-23 14:47 ` Biju Das 2022-01-12 17:46 ` [RFC 20/28] media: vsp1: Add support for the RZ/G2L VSPD Biju Das 2022-01-23 1:26 ` Laurent Pinchart 2022-01-23 15:20 ` Biju Das 2022-01-24 8:06 ` Geert Uytterhoeven 2022-03-08 19:18 ` Biju Das 2022-01-12 17:46 ` [RFC 21/28] dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings Biju Das 2022-01-12 17:46 ` Biju Das 2022-01-22 1:05 ` Rob Herring 2022-01-22 1:05 ` Rob Herring 2022-01-22 11:19 ` Biju Das 2022-01-22 11:19 ` Biju Das 2022-01-12 17:46 ` [RFC 22/28] drm: rcar-du: Add RZ/G2L DSI driver Biju Das 2022-01-12 17:46 ` Biju Das 2022-01-14 10:24 ` Geert Uytterhoeven 2022-01-14 10:24 ` Geert Uytterhoeven 2022-01-14 12:48 ` Biju Das 2022-01-14 12:48 ` Biju Das 2022-01-14 10:28 ` Philipp Zabel 2022-01-14 10:28 ` Philipp Zabel 2022-01-14 12:49 ` Biju Das 2022-01-14 12:49 ` Biju Das 2022-01-23 13:51 ` Laurent Pinchart 2022-01-23 13:51 ` Laurent Pinchart 2022-03-14 14:33 ` Biju Das 2022-03-14 14:33 ` Biju Das 2022-01-12 17:46 ` [RFC 23/28] arm64: dts: renesas: r9a07g044: Add fcpvd node Biju Das 2022-01-13 9:47 ` Sergey Shtylyov 2022-01-12 17:46 ` [RFC 24/28] arm64: dts: renesas: r9a07g044: Add vspd node Biju Das 2022-01-13 9:46 ` Sergey Shtylyov 2022-01-12 17:46 ` [RFC 25/28] arm64: dts: renesas: r9a07g044: Add DU node Biju Das 2022-01-12 17:46 ` [RFC 26/28] arm64: dts: renesas: r9a07g044: Add dsi node Biju Das 2022-01-12 17:46 ` [RFC 27/28] arm64: dts: renesas: r9a07g044: Link DSI with DU node Biju Das 2022-01-12 17:46 ` [RFC 28/28] arm64: dts: renesas: rzg2l-smarc: Enable Display on carrier board Biju Das 2022-02-01 15:52 ` Geert Uytterhoeven
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220112174612.10773-1-biju.das.jz@bp.renesas.com \ --to=biju.das.jz@bp.renesas.com \ --cc=Chris.Paterson2@renesas.com \ --cc=airlied@linux.ie \ --cc=biju.das@bp.renesas.com \ --cc=daniel@ffwll.ch \ --cc=devicetree@vger.kernel.org \ --cc=dri-devel@lists.freedesktop.org \ --cc=geert+renesas@glider.be \ --cc=linux-clk@vger.kernel.org \ --cc=linux-media@vger.kernel.org \ --cc=linux-renesas-soc@vger.kernel.org \ --cc=mchehab@kernel.org \ --cc=mturquette@baylibre.com \ --cc=p.zabel@pengutronix.de \ --cc=prabhakar.mahadev-lad.rj@bp.renesas.com \ --cc=robh+dt@kernel.org \ --cc=sboyd@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.