From: Biju Das <biju.das.jz@bp.renesas.com> To: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>, "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>, "linux-renesas-soc@vger.kernel.org" <linux-renesas-soc@vger.kernel.org>, Geert Uytterhoeven <geert+renesas@glider.be>, Chris Paterson <Chris.Paterson2@renesas.com>, Biju Das <biju.das@bp.renesas.com>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: RE: [RFC 11/28] drm: rcar-du: Add num_rpf to struct rcar_du_device_info Date: Sun, 13 Mar 2022 10:12:17 +0000 [thread overview] Message-ID: <OS0PR01MB5922D1536F7C90A154F0515C860E9@OS0PR01MB5922.jpnprd01.prod.outlook.com> (raw) In-Reply-To: <Ye1eVmxyPtrmKzlK@pendragon.ideasonboard.com> Hi Laurent, Thanks for the feedback. > Subject: Re: [RFC 11/28] drm: rcar-du: Add num_rpf to struct > rcar_du_device_info > > Hi Biju, > > Thank you for the patch. > > On Wed, Jan 12, 2022 at 05:45:55PM +0000, Biju Das wrote: > > Number of RPF's VSP is different on R-Car and RZ/G2L R-Car Gen3 -> 5 > > RPF's R-Car Gen2 -> 4 RPF's RZ/G2L -> 2 RPF's > > > > Add num_rpf to struct rcar_du_device_info to support later SoC without > > any code changes. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > drivers/gpu/drm/rcar-du/rcar_du_drv.c | 17 +++++++++++++++++ > > drivers/gpu/drm/rcar-du/rcar_du_drv.h | 2 ++ > > drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 6 +----- > > 3 files changed, 20 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c > > b/drivers/gpu/drm/rcar-du/rcar_du_drv.c > > index 5a8131ef81d5..5ca7cd085794 100644 > > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c > > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c > > @@ -56,6 +56,7 @@ static const struct rcar_du_device_info > rzg1_du_r8a7743_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rzg1_du_r8a7745_info = { @@ > > -78,6 +79,7 @@ static const struct rcar_du_device_info > rzg1_du_r8a7745_info = { > > .port = 1, > > }, > > }, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rzg1_du_r8a77470_info = { @@ > > -105,6 +107,7 @@ static const struct rcar_du_device_info > rzg1_du_r8a77470_info = { > > .port = 2, > > }, > > }, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a774a1_info = { @@ > > -134,6 +137,7 @@ static const struct rcar_du_device_info > rcar_du_r8a774a1_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -164,6 +168,7 @@ static const struct rcar_du_device_info > rcar_du_r8a774b1_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -191,6 +196,7 @@ static const struct rcar_du_device_info > rcar_du_r8a774c0_info = { > > }, > > }, > > .num_lvds = 2, > > + .num_rpf = 4, > > .lvds_clk_mask = BIT(1) | BIT(0), > > }; > > > > @@ -221,6 +227,7 @@ static const struct rcar_du_device_info > rcar_du_r8a774e1_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -273,6 +280,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7790_info = { > > }, > > }, > > .num_lvds = 2, > > + .num_rpf = 4, > > }; > > > > /* M2-W (r8a7791) and M2-N (r8a7793) are identical */ @@ -298,6 > > +306,7 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = > { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a7792_info = { @@ > > -318,6 +327,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7792_info = { > > .port = 1, > > }, > > }, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a7794_info = { @@ > > -341,6 +351,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7794_info = { > > .port = 1, > > }, > > }, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a7795_info = { @@ > > -374,6 +385,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7795_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(2) | BIT(1), > > }; > > > > @@ -404,6 +416,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7796_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -434,6 +447,7 @@ static const struct rcar_du_device_info > rcar_du_r8a77965_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -460,6 +474,7 @@ static const struct rcar_du_device_info > rcar_du_r8a77970_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a7799x_info = { @@ > > -487,6 +502,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7799x_info = { > > }, > > }, > > .num_lvds = 2, > > + .num_rpf = 5, > > .lvds_clk_mask = BIT(1) | BIT(0), > > }; > > > > @@ -506,6 +522,7 @@ static const struct rcar_du_device_info > rcar_du_r8a779a0_info = { > > .port = 1, > > }, > > }, > > + .num_rpf = 5, > > .dsi_clk_mask = BIT(1) | BIT(0), > > }; > > > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h > > b/drivers/gpu/drm/rcar-du/rcar_du_drv.h > > index 101f42df86ea..9792a77590be 100644 > > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h > > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h > > @@ -69,6 +69,7 @@ struct rcar_du_output_routing { > > * @channels_mask: bit mask of available DU channels > > * @routes: array of CRTC to output routes, indexed by output > (RCAR_DU_OUTPUT_*) > > * @num_lvds: number of internal LVDS encoders > > + * @num_rpf: max number of rpf's in vsp > > s/rpf's/RPFs/ and s/vsp/VSP/ > > While the patch itself looks fine to me, the RZ/G2L has a display > controller that is completely unrelated to the DU, despite sharing the > same name. I'd rather have a rzg2l_du driver. It may be possibly to share > some code with the rcar_du driver (I'm thinking about the VSP handling for > instance), but in the end I'm not sure if even that would be worth it. OK, I have created separate RZ/G2L display driver with minimal code changes and Maximum code reuse. Please provide feedback on new patch serries[1] [1] https://lore.kernel.org/linux-renesas-soc/20220312215417.8023-1-biju.das.jz@bp.renesas.com/T/#t Regards, Biju > > > * @dpll_mask: bit mask of DU channels equipped with a DPLL > > * @dsi_clk_mask: bitmask of channels that can use the DSI clock as dot > clock > > * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as > > dot clock @@ -80,6 +81,7 @@ struct rcar_du_device_info { > > unsigned int channels_mask; > > struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX]; > > unsigned int num_lvds; > > + unsigned int num_rpf; > > unsigned int dpll_mask; > > unsigned int dsi_clk_mask; > > unsigned int lvds_clk_mask; > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > > b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > > index b7fc5b069cbc..cf045a203aa5 100644 > > --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > > +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > > @@ -415,11 +415,7 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp, > struct device_node *np, > > if (ret < 0) > > return ret; > > > > - /* > > - * The VSP2D (Gen3) has 5 RPFs, but the VSP1D (Gen2) is limited to > > - * 4 RPFs. > > - */ > > - num_planes = rcdu->info->gen >= 3 ? 5 : 4; > > + num_planes = rcdu->info->num_rpf; > > > > vsp->planes = kcalloc(num_planes, sizeof(*vsp->planes), GFP_KERNEL); > > if (!vsp->planes) > > -- > Regards, > > Laurent Pinchart
WARNING: multiple messages have this Message-ID (diff)
From: Biju Das <biju.das.jz@bp.renesas.com> To: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Chris Paterson <Chris.Paterson2@renesas.com>, Geert Uytterhoeven <geert+renesas@glider.be>, David Airlie <airlied@linux.ie>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>, "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>, Biju Das <biju.das@bp.renesas.com>, "linux-renesas-soc@vger.kernel.org" <linux-renesas-soc@vger.kernel.org>, Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Subject: RE: [RFC 11/28] drm: rcar-du: Add num_rpf to struct rcar_du_device_info Date: Sun, 13 Mar 2022 10:12:17 +0000 [thread overview] Message-ID: <OS0PR01MB5922D1536F7C90A154F0515C860E9@OS0PR01MB5922.jpnprd01.prod.outlook.com> (raw) In-Reply-To: <Ye1eVmxyPtrmKzlK@pendragon.ideasonboard.com> Hi Laurent, Thanks for the feedback. > Subject: Re: [RFC 11/28] drm: rcar-du: Add num_rpf to struct > rcar_du_device_info > > Hi Biju, > > Thank you for the patch. > > On Wed, Jan 12, 2022 at 05:45:55PM +0000, Biju Das wrote: > > Number of RPF's VSP is different on R-Car and RZ/G2L R-Car Gen3 -> 5 > > RPF's R-Car Gen2 -> 4 RPF's RZ/G2L -> 2 RPF's > > > > Add num_rpf to struct rcar_du_device_info to support later SoC without > > any code changes. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > drivers/gpu/drm/rcar-du/rcar_du_drv.c | 17 +++++++++++++++++ > > drivers/gpu/drm/rcar-du/rcar_du_drv.h | 2 ++ > > drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 6 +----- > > 3 files changed, 20 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c > > b/drivers/gpu/drm/rcar-du/rcar_du_drv.c > > index 5a8131ef81d5..5ca7cd085794 100644 > > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c > > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c > > @@ -56,6 +56,7 @@ static const struct rcar_du_device_info > rzg1_du_r8a7743_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rzg1_du_r8a7745_info = { @@ > > -78,6 +79,7 @@ static const struct rcar_du_device_info > rzg1_du_r8a7745_info = { > > .port = 1, > > }, > > }, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rzg1_du_r8a77470_info = { @@ > > -105,6 +107,7 @@ static const struct rcar_du_device_info > rzg1_du_r8a77470_info = { > > .port = 2, > > }, > > }, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a774a1_info = { @@ > > -134,6 +137,7 @@ static const struct rcar_du_device_info > rcar_du_r8a774a1_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -164,6 +168,7 @@ static const struct rcar_du_device_info > rcar_du_r8a774b1_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -191,6 +196,7 @@ static const struct rcar_du_device_info > rcar_du_r8a774c0_info = { > > }, > > }, > > .num_lvds = 2, > > + .num_rpf = 4, > > .lvds_clk_mask = BIT(1) | BIT(0), > > }; > > > > @@ -221,6 +227,7 @@ static const struct rcar_du_device_info > rcar_du_r8a774e1_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -273,6 +280,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7790_info = { > > }, > > }, > > .num_lvds = 2, > > + .num_rpf = 4, > > }; > > > > /* M2-W (r8a7791) and M2-N (r8a7793) are identical */ @@ -298,6 > > +306,7 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = > { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a7792_info = { @@ > > -318,6 +327,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7792_info = { > > .port = 1, > > }, > > }, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a7794_info = { @@ > > -341,6 +351,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7794_info = { > > .port = 1, > > }, > > }, > > + .num_rpf = 4, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a7795_info = { @@ > > -374,6 +385,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7795_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(2) | BIT(1), > > }; > > > > @@ -404,6 +416,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7796_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -434,6 +447,7 @@ static const struct rcar_du_device_info > rcar_du_r8a77965_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > .dpll_mask = BIT(1), > > }; > > > > @@ -460,6 +474,7 @@ static const struct rcar_du_device_info > rcar_du_r8a77970_info = { > > }, > > }, > > .num_lvds = 1, > > + .num_rpf = 5, > > }; > > > > static const struct rcar_du_device_info rcar_du_r8a7799x_info = { @@ > > -487,6 +502,7 @@ static const struct rcar_du_device_info > rcar_du_r8a7799x_info = { > > }, > > }, > > .num_lvds = 2, > > + .num_rpf = 5, > > .lvds_clk_mask = BIT(1) | BIT(0), > > }; > > > > @@ -506,6 +522,7 @@ static const struct rcar_du_device_info > rcar_du_r8a779a0_info = { > > .port = 1, > > }, > > }, > > + .num_rpf = 5, > > .dsi_clk_mask = BIT(1) | BIT(0), > > }; > > > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h > > b/drivers/gpu/drm/rcar-du/rcar_du_drv.h > > index 101f42df86ea..9792a77590be 100644 > > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h > > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h > > @@ -69,6 +69,7 @@ struct rcar_du_output_routing { > > * @channels_mask: bit mask of available DU channels > > * @routes: array of CRTC to output routes, indexed by output > (RCAR_DU_OUTPUT_*) > > * @num_lvds: number of internal LVDS encoders > > + * @num_rpf: max number of rpf's in vsp > > s/rpf's/RPFs/ and s/vsp/VSP/ > > While the patch itself looks fine to me, the RZ/G2L has a display > controller that is completely unrelated to the DU, despite sharing the > same name. I'd rather have a rzg2l_du driver. It may be possibly to share > some code with the rcar_du driver (I'm thinking about the VSP handling for > instance), but in the end I'm not sure if even that would be worth it. OK, I have created separate RZ/G2L display driver with minimal code changes and Maximum code reuse. Please provide feedback on new patch serries[1] [1] https://lore.kernel.org/linux-renesas-soc/20220312215417.8023-1-biju.das.jz@bp.renesas.com/T/#t Regards, Biju > > > * @dpll_mask: bit mask of DU channels equipped with a DPLL > > * @dsi_clk_mask: bitmask of channels that can use the DSI clock as dot > clock > > * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as > > dot clock @@ -80,6 +81,7 @@ struct rcar_du_device_info { > > unsigned int channels_mask; > > struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX]; > > unsigned int num_lvds; > > + unsigned int num_rpf; > > unsigned int dpll_mask; > > unsigned int dsi_clk_mask; > > unsigned int lvds_clk_mask; > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > > b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > > index b7fc5b069cbc..cf045a203aa5 100644 > > --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > > +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c > > @@ -415,11 +415,7 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp, > struct device_node *np, > > if (ret < 0) > > return ret; > > > > - /* > > - * The VSP2D (Gen3) has 5 RPFs, but the VSP1D (Gen2) is limited to > > - * 4 RPFs. > > - */ > > - num_planes = rcdu->info->gen >= 3 ? 5 : 4; > > + num_planes = rcdu->info->num_rpf; > > > > vsp->planes = kcalloc(num_planes, sizeof(*vsp->planes), GFP_KERNEL); > > if (!vsp->planes) > > -- > Regards, > > Laurent Pinchart
next prev parent reply other threads:[~2022-03-13 10:12 UTC|newest] Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-12 17:45 [RFC 00/28] Add RZ/G2L Display support Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-12 17:45 ` [RFC 01/28] clk: renesas: rzg2l: Add FOUTPOSTDIV clk support Biju Das 2022-01-12 21:37 ` kernel test robot 2022-01-13 9:40 ` kernel test robot 2022-01-13 9:40 ` kernel test robot 2022-02-01 11:44 ` Geert Uytterhoeven 2022-03-18 10:21 ` Biju Das 2022-01-12 17:45 ` [RFC 02/28] clk: renesas: rzg2l: Add PLL5_4 clk mux support Biju Das 2022-02-01 14:33 ` Geert Uytterhoeven 2022-03-18 10:28 ` Biju Das 2022-01-12 17:45 ` [RFC 03/28] clk: renesas: rzg2l: Add DSI divider clk support Biju Das 2022-01-12 17:45 ` [RFC 04/28] clk: renesas: r9a07g044: Add M1 clock support Biju Das 2022-02-01 14:36 ` Geert Uytterhoeven 2022-03-18 10:29 ` Biju Das 2022-01-12 17:45 ` [RFC 05/28] clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support Biju Das 2022-02-01 9:19 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 06/28] clk: renesas: r9a07g044: Add M3 Clock support Biju Das 2022-02-01 9:19 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 07/28] clk: renesas: r9a07g044: Add M4 " Biju Das 2022-02-01 9:19 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 08/28] clk: renesas: r9a07g044: Add LCDC clock and reset entries Biju Das 2022-02-01 9:19 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 09/28] clk: renesas: r9a07g044: Add DSI " Biju Das 2022-02-01 9:21 ` Geert Uytterhoeven 2022-01-12 17:45 ` [RFC 10/28] drm: rcar-du: of: Increase buff size for compatible variable Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-14 10:17 ` Geert Uytterhoeven 2022-01-14 10:17 ` Geert Uytterhoeven 2022-01-14 12:54 ` Biju Das 2022-01-14 12:54 ` Biju Das 2022-01-23 13:52 ` Laurent Pinchart 2022-01-23 13:52 ` Laurent Pinchart 2022-01-24 8:18 ` Geert Uytterhoeven 2022-01-24 8:18 ` Geert Uytterhoeven 2022-01-26 0:53 ` Laurent Pinchart 2022-01-26 0:53 ` Laurent Pinchart 2022-01-26 6:55 ` Biju Das 2022-01-26 6:55 ` Biju Das 2022-01-12 17:45 ` [RFC 11/28] drm: rcar-du: Add num_rpf to struct rcar_du_device_info Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-23 13:55 ` Laurent Pinchart 2022-01-23 13:55 ` Laurent Pinchart 2022-03-13 10:12 ` Biju Das [this message] 2022-03-13 10:12 ` Biju Das 2022-01-12 17:45 ` [RFC 12/28] drm: rcar-du: Add max_width and max_height " Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-12 17:45 ` [RFC 13/28] drm: rcar-du: Add RCAR_DU_FEATURE_PLANE feature bit Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-12 17:45 ` [RFC 14/28] drm: rcar-du: Allow DU plane feature based on DU " Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-12 17:45 ` [RFC 15/28] drm: rcar_du: Add RCAR_DU_FEATURE_GROUP " Biju Das 2022-01-12 17:45 ` Biju Das 2022-01-12 17:46 ` [RFC 16/28] drm: rcar-du: Allow DU group feature based on " Biju Das 2022-01-12 17:46 ` Biju Das 2022-01-23 13:57 ` Laurent Pinchart 2022-01-23 13:57 ` Laurent Pinchart 2022-01-12 17:46 ` [RFC 17/28] dt-bindings: display: renesas,du: Document r9a07g044l bindings Biju Das 2022-01-12 17:46 ` [RFC 17/28] dt-bindings: display: renesas, du: " Biju Das 2022-01-22 1:01 ` [RFC 17/28] dt-bindings: display: renesas,du: " Rob Herring 2022-01-22 1:01 ` Rob Herring 2022-01-22 11:20 ` Biju Das 2022-01-22 11:20 ` [RFC 17/28] dt-bindings: display: renesas, du: " Biju Das 2022-01-12 17:46 ` [RFC 18/28] drm: rcar-du: Add RZ/G2L LCDC Support Biju Das 2022-01-12 17:46 ` Biju Das 2022-01-23 1:35 ` Laurent Pinchart 2022-01-23 1:35 ` Laurent Pinchart 2022-03-08 18:54 ` Biju Das 2022-03-08 18:54 ` Biju Das 2022-01-12 17:46 ` [RFC 19/28] media: dt-bindings: media: renesas,vsp1: Document RZ/{G2L,V2L} VSPD bindings Biju Das 2022-01-22 1:02 ` Rob Herring 2022-01-22 11:23 ` Biju Das 2022-01-23 0:14 ` Laurent Pinchart 2022-01-23 14:47 ` Biju Das 2022-01-12 17:46 ` [RFC 20/28] media: vsp1: Add support for the RZ/G2L VSPD Biju Das 2022-01-23 1:26 ` Laurent Pinchart 2022-01-23 15:20 ` Biju Das 2022-01-24 8:06 ` Geert Uytterhoeven 2022-03-08 19:18 ` Biju Das 2022-01-12 17:46 ` [RFC 21/28] dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings Biju Das 2022-01-12 17:46 ` Biju Das 2022-01-22 1:05 ` Rob Herring 2022-01-22 1:05 ` Rob Herring 2022-01-22 11:19 ` Biju Das 2022-01-22 11:19 ` Biju Das 2022-01-12 17:46 ` [RFC 22/28] drm: rcar-du: Add RZ/G2L DSI driver Biju Das 2022-01-12 17:46 ` Biju Das 2022-01-14 10:24 ` Geert Uytterhoeven 2022-01-14 10:24 ` Geert Uytterhoeven 2022-01-14 12:48 ` Biju Das 2022-01-14 12:48 ` Biju Das 2022-01-14 10:28 ` Philipp Zabel 2022-01-14 10:28 ` Philipp Zabel 2022-01-14 12:49 ` Biju Das 2022-01-14 12:49 ` Biju Das 2022-01-23 13:51 ` Laurent Pinchart 2022-01-23 13:51 ` Laurent Pinchart 2022-03-14 14:33 ` Biju Das 2022-03-14 14:33 ` Biju Das 2022-01-12 17:46 ` [RFC 23/28] arm64: dts: renesas: r9a07g044: Add fcpvd node Biju Das 2022-01-13 9:47 ` Sergey Shtylyov 2022-01-12 17:46 ` [RFC 24/28] arm64: dts: renesas: r9a07g044: Add vspd node Biju Das 2022-01-13 9:46 ` Sergey Shtylyov 2022-01-12 17:46 ` [RFC 25/28] arm64: dts: renesas: r9a07g044: Add DU node Biju Das 2022-01-12 17:46 ` [RFC 26/28] arm64: dts: renesas: r9a07g044: Add dsi node Biju Das 2022-01-12 17:46 ` [RFC 27/28] arm64: dts: renesas: r9a07g044: Link DSI with DU node Biju Das 2022-01-12 17:46 ` [RFC 28/28] arm64: dts: renesas: rzg2l-smarc: Enable Display on carrier board Biju Das 2022-02-01 15:52 ` Geert Uytterhoeven
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