From: Biju Das <biju.das.jz@bp.renesas.com>
To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
dri-devel@lists.freedesktop.org,
linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>,
Chris Paterson <Chris.Paterson2@renesas.com>,
Biju Das <biju.das@bp.renesas.com>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [RFC 13/28] drm: rcar-du: Add RCAR_DU_FEATURE_PLANE feature bit
Date: Wed, 12 Jan 2022 17:45:57 +0000 [thread overview]
Message-ID: <20220112174612.10773-14-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20220112174612.10773-1-biju.das.jz@bp.renesas.com>
DU plane registers are available on R-Car, but it is not present
on RZ/G2L. Add RCAR_DU_FEATURE_PLANE feature bit to support
later SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/gpu/drm/rcar-du/rcar_du_drv.c | 51 ++++++++++++++++++---------
drivers/gpu/drm/rcar-du/rcar_du_drv.h | 1 +
2 files changed, 35 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index 7a492323afb3..2c1454731df4 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -40,7 +40,8 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -66,7 +67,8 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -91,7 +93,8 @@ static const struct rcar_du_device_info rzg1_du_r8a77470_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -122,7 +125,8 @@ static const struct rcar_du_device_info rcar_du_r8a774a1_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -155,7 +159,8 @@ static const struct rcar_du_device_info rcar_du_r8a774b1_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(3) | BIT(1) | BIT(0),
.routes = {
/*
@@ -186,7 +191,8 @@ static const struct rcar_du_device_info rcar_du_r8a774c0_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -218,7 +224,8 @@ static const struct rcar_du_device_info rcar_du_r8a774e1_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(3) | BIT(1) | BIT(0),
.routes = {
/*
@@ -273,7 +280,8 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.quirks = RCAR_DU_QUIRK_ALIGN_128B,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
@@ -307,7 +315,8 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -334,7 +343,8 @@ static const struct rcar_du_device_info rcar_du_r8a7792_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/* R8A7792 has two RGB outputs. */
@@ -357,7 +367,8 @@ static const struct rcar_du_device_info rcar_du_r8a7794_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -384,7 +395,8 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -421,7 +433,8 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -454,7 +467,8 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(3) | BIT(1) | BIT(0),
.routes = {
/*
@@ -487,7 +501,8 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(0),
.routes = {
/*
@@ -513,7 +528,8 @@ static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -543,7 +559,8 @@ static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
static const struct rcar_du_device_info rcar_du_r8a779a0_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/* R8A779A0 has two MIPI DSI outputs. */
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
index 2f0ccc9e67d1..020814e80f50 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
@@ -31,6 +31,7 @@ struct rcar_du_device;
#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(2) /* Has inputs from VSP1 */
#define RCAR_DU_FEATURE_INTERLACED BIT(3) /* HW supports interlaced */
#define RCAR_DU_FEATURE_TVM_SYNC BIT(4) /* Has TV switch/sync modes */
+#define RCAR_DU_FEATURE_PLANE BIT(5) /* HW supports DU planes */
#define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Biju Das <biju.das.jz@bp.renesas.com>
To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: Chris Paterson <Chris.Paterson2@renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
dri-devel@lists.freedesktop.org,
Biju Das <biju.das@bp.renesas.com>,
linux-renesas-soc@vger.kernel.org,
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Biju Das <biju.das.jz@bp.renesas.com>
Subject: [RFC 13/28] drm: rcar-du: Add RCAR_DU_FEATURE_PLANE feature bit
Date: Wed, 12 Jan 2022 17:45:57 +0000 [thread overview]
Message-ID: <20220112174612.10773-14-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20220112174612.10773-1-biju.das.jz@bp.renesas.com>
DU plane registers are available on R-Car, but it is not present
on RZ/G2L. Add RCAR_DU_FEATURE_PLANE feature bit to support
later SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/gpu/drm/rcar-du/rcar_du_drv.c | 51 ++++++++++++++++++---------
drivers/gpu/drm/rcar-du/rcar_du_drv.h | 1 +
2 files changed, 35 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index 7a492323afb3..2c1454731df4 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -40,7 +40,8 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -66,7 +67,8 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -91,7 +93,8 @@ static const struct rcar_du_device_info rzg1_du_r8a77470_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -122,7 +125,8 @@ static const struct rcar_du_device_info rcar_du_r8a774a1_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -155,7 +159,8 @@ static const struct rcar_du_device_info rcar_du_r8a774b1_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(3) | BIT(1) | BIT(0),
.routes = {
/*
@@ -186,7 +191,8 @@ static const struct rcar_du_device_info rcar_du_r8a774c0_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -218,7 +224,8 @@ static const struct rcar_du_device_info rcar_du_r8a774e1_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(3) | BIT(1) | BIT(0),
.routes = {
/*
@@ -273,7 +280,8 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.quirks = RCAR_DU_QUIRK_ALIGN_128B,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
@@ -307,7 +315,8 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -334,7 +343,8 @@ static const struct rcar_du_device_info rcar_du_r8a7792_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/* R8A7792 has two RGB outputs. */
@@ -357,7 +367,8 @@ static const struct rcar_du_device_info rcar_du_r8a7794_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -384,7 +395,8 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -421,7 +433,8 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -454,7 +467,8 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(3) | BIT(1) | BIT(0),
.routes = {
/*
@@ -487,7 +501,8 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = {
| RCAR_DU_FEATURE_CRTC_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(0),
.routes = {
/*
@@ -513,7 +528,8 @@ static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ
| RCAR_DU_FEATURE_CRTC_CLOCK
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
@@ -543,7 +559,8 @@ static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
static const struct rcar_du_device_info rcar_du_r8a779a0_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_PLANE,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/* R8A779A0 has two MIPI DSI outputs. */
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
index 2f0ccc9e67d1..020814e80f50 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
@@ -31,6 +31,7 @@ struct rcar_du_device;
#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(2) /* Has inputs from VSP1 */
#define RCAR_DU_FEATURE_INTERLACED BIT(3) /* HW supports interlaced */
#define RCAR_DU_FEATURE_TVM_SYNC BIT(4) /* Has TV switch/sync modes */
+#define RCAR_DU_FEATURE_PLANE BIT(5) /* HW supports DU planes */
#define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */
--
2.17.1
next prev parent reply other threads:[~2022-01-12 17:47 UTC|newest]
Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-12 17:45 [RFC 00/28] Add RZ/G2L Display support Biju Das
2022-01-12 17:45 ` Biju Das
2022-01-12 17:45 ` [RFC 01/28] clk: renesas: rzg2l: Add FOUTPOSTDIV clk support Biju Das
2022-01-12 21:37 ` kernel test robot
2022-01-13 9:40 ` kernel test robot
2022-01-13 9:40 ` kernel test robot
2022-02-01 11:44 ` Geert Uytterhoeven
2022-03-18 10:21 ` Biju Das
2022-01-12 17:45 ` [RFC 02/28] clk: renesas: rzg2l: Add PLL5_4 clk mux support Biju Das
2022-02-01 14:33 ` Geert Uytterhoeven
2022-03-18 10:28 ` Biju Das
2022-01-12 17:45 ` [RFC 03/28] clk: renesas: rzg2l: Add DSI divider clk support Biju Das
2022-01-12 17:45 ` [RFC 04/28] clk: renesas: r9a07g044: Add M1 clock support Biju Das
2022-02-01 14:36 ` Geert Uytterhoeven
2022-03-18 10:29 ` Biju Das
2022-01-12 17:45 ` [RFC 05/28] clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support Biju Das
2022-02-01 9:19 ` Geert Uytterhoeven
2022-01-12 17:45 ` [RFC 06/28] clk: renesas: r9a07g044: Add M3 Clock support Biju Das
2022-02-01 9:19 ` Geert Uytterhoeven
2022-01-12 17:45 ` [RFC 07/28] clk: renesas: r9a07g044: Add M4 " Biju Das
2022-02-01 9:19 ` Geert Uytterhoeven
2022-01-12 17:45 ` [RFC 08/28] clk: renesas: r9a07g044: Add LCDC clock and reset entries Biju Das
2022-02-01 9:19 ` Geert Uytterhoeven
2022-01-12 17:45 ` [RFC 09/28] clk: renesas: r9a07g044: Add DSI " Biju Das
2022-02-01 9:21 ` Geert Uytterhoeven
2022-01-12 17:45 ` [RFC 10/28] drm: rcar-du: of: Increase buff size for compatible variable Biju Das
2022-01-12 17:45 ` Biju Das
2022-01-14 10:17 ` Geert Uytterhoeven
2022-01-14 10:17 ` Geert Uytterhoeven
2022-01-14 12:54 ` Biju Das
2022-01-14 12:54 ` Biju Das
2022-01-23 13:52 ` Laurent Pinchart
2022-01-23 13:52 ` Laurent Pinchart
2022-01-24 8:18 ` Geert Uytterhoeven
2022-01-24 8:18 ` Geert Uytterhoeven
2022-01-26 0:53 ` Laurent Pinchart
2022-01-26 0:53 ` Laurent Pinchart
2022-01-26 6:55 ` Biju Das
2022-01-26 6:55 ` Biju Das
2022-01-12 17:45 ` [RFC 11/28] drm: rcar-du: Add num_rpf to struct rcar_du_device_info Biju Das
2022-01-12 17:45 ` Biju Das
2022-01-23 13:55 ` Laurent Pinchart
2022-01-23 13:55 ` Laurent Pinchart
2022-03-13 10:12 ` Biju Das
2022-03-13 10:12 ` Biju Das
2022-01-12 17:45 ` [RFC 12/28] drm: rcar-du: Add max_width and max_height " Biju Das
2022-01-12 17:45 ` Biju Das
2022-01-12 17:45 ` Biju Das [this message]
2022-01-12 17:45 ` [RFC 13/28] drm: rcar-du: Add RCAR_DU_FEATURE_PLANE feature bit Biju Das
2022-01-12 17:45 ` [RFC 14/28] drm: rcar-du: Allow DU plane feature based on DU " Biju Das
2022-01-12 17:45 ` Biju Das
2022-01-12 17:45 ` [RFC 15/28] drm: rcar_du: Add RCAR_DU_FEATURE_GROUP " Biju Das
2022-01-12 17:45 ` Biju Das
2022-01-12 17:46 ` [RFC 16/28] drm: rcar-du: Allow DU group feature based on " Biju Das
2022-01-12 17:46 ` Biju Das
2022-01-23 13:57 ` Laurent Pinchart
2022-01-23 13:57 ` Laurent Pinchart
2022-01-12 17:46 ` [RFC 17/28] dt-bindings: display: renesas,du: Document r9a07g044l bindings Biju Das
2022-01-12 17:46 ` [RFC 17/28] dt-bindings: display: renesas, du: " Biju Das
2022-01-22 1:01 ` [RFC 17/28] dt-bindings: display: renesas,du: " Rob Herring
2022-01-22 1:01 ` Rob Herring
2022-01-22 11:20 ` Biju Das
2022-01-22 11:20 ` [RFC 17/28] dt-bindings: display: renesas, du: " Biju Das
2022-01-12 17:46 ` [RFC 18/28] drm: rcar-du: Add RZ/G2L LCDC Support Biju Das
2022-01-12 17:46 ` Biju Das
2022-01-23 1:35 ` Laurent Pinchart
2022-01-23 1:35 ` Laurent Pinchart
2022-03-08 18:54 ` Biju Das
2022-03-08 18:54 ` Biju Das
2022-01-12 17:46 ` [RFC 19/28] media: dt-bindings: media: renesas,vsp1: Document RZ/{G2L,V2L} VSPD bindings Biju Das
2022-01-22 1:02 ` Rob Herring
2022-01-22 11:23 ` Biju Das
2022-01-23 0:14 ` Laurent Pinchart
2022-01-23 14:47 ` Biju Das
2022-01-12 17:46 ` [RFC 20/28] media: vsp1: Add support for the RZ/G2L VSPD Biju Das
2022-01-23 1:26 ` Laurent Pinchart
2022-01-23 15:20 ` Biju Das
2022-01-24 8:06 ` Geert Uytterhoeven
2022-03-08 19:18 ` Biju Das
2022-01-12 17:46 ` [RFC 21/28] dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings Biju Das
2022-01-12 17:46 ` Biju Das
2022-01-22 1:05 ` Rob Herring
2022-01-22 1:05 ` Rob Herring
2022-01-22 11:19 ` Biju Das
2022-01-22 11:19 ` Biju Das
2022-01-12 17:46 ` [RFC 22/28] drm: rcar-du: Add RZ/G2L DSI driver Biju Das
2022-01-12 17:46 ` Biju Das
2022-01-14 10:24 ` Geert Uytterhoeven
2022-01-14 10:24 ` Geert Uytterhoeven
2022-01-14 12:48 ` Biju Das
2022-01-14 12:48 ` Biju Das
2022-01-14 10:28 ` Philipp Zabel
2022-01-14 10:28 ` Philipp Zabel
2022-01-14 12:49 ` Biju Das
2022-01-14 12:49 ` Biju Das
2022-01-23 13:51 ` Laurent Pinchart
2022-01-23 13:51 ` Laurent Pinchart
2022-03-14 14:33 ` Biju Das
2022-03-14 14:33 ` Biju Das
2022-01-12 17:46 ` [RFC 23/28] arm64: dts: renesas: r9a07g044: Add fcpvd node Biju Das
2022-01-13 9:47 ` Sergey Shtylyov
2022-01-12 17:46 ` [RFC 24/28] arm64: dts: renesas: r9a07g044: Add vspd node Biju Das
2022-01-13 9:46 ` Sergey Shtylyov
2022-01-12 17:46 ` [RFC 25/28] arm64: dts: renesas: r9a07g044: Add DU node Biju Das
2022-01-12 17:46 ` [RFC 26/28] arm64: dts: renesas: r9a07g044: Add dsi node Biju Das
2022-01-12 17:46 ` [RFC 27/28] arm64: dts: renesas: r9a07g044: Link DSI with DU node Biju Das
2022-01-12 17:46 ` [RFC 28/28] arm64: dts: renesas: rzg2l-smarc: Enable Display on carrier board Biju Das
2022-02-01 15:52 ` Geert Uytterhoeven
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