From: Sascha Hauer <s.hauer@pengutronix.de>
To: Peter Geis <pgwipeout@gmail.com>
Cc: "Andrzej Hajda" <andrzej.hajda@intel.com>,
"Neil Armstrong" <narmstrong@baylibre.com>,
"Robert Foss" <robert.foss@linaro.org>,
"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
"Jonas Karlman" <jonas@kwiboo.se>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"David Airlie" <airlied@linux.ie>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Pierre-Hugues Husson" <phh@phh.me>,
"Archit Taneja" <architt@codeaurora.org>,
"Robin Murphy" <robin.murphy@arm.com>,
linux-rockchip@lists.infradead.org,
"Heiko Stübner" <heiko@sntech.de>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/bridge: synopsys/dw-hdmi: set cec clock rate
Date: Thu, 27 Jan 2022 10:33:07 +0100 [thread overview]
Message-ID: <20220127093307.GJ23490@pengutronix.de> (raw)
In-Reply-To: <20220126202427.3047814-1-pgwipeout@gmail.com>
Hi Peter,
On Wed, Jan 26, 2022 at 03:24:26PM -0500, Peter Geis wrote:
> The hdmi-cec clock must be 32khz in order for cec to work correctly.
> Ensure after enabling the clock we set it in order for the hardware to
> work as expected.
> Warn on failure, in case this is a static clock that is slighty off.
> Fixes hdmi-cec support on Rockchip devices.
You removed this sentence in v2, but I just wanted to mention that
clk_set_rate() won't fail when the desired clock rate can't be
archieved. Instead, you will get the best rate that actually can be
reached. If you want to check that you are happy with the rate you'll
have to do a clk_round_rate() before setting the rate or a
clk_get_rate() afterwards.
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: Peter Geis <pgwipeout@gmail.com>
Cc: Archit Taneja <architt@codeaurora.org>,
Jonas Karlman <jonas@kwiboo.se>, David Airlie <airlied@linux.ie>,
Robert Foss <robert.foss@linaro.org>,
dri-devel@lists.freedesktop.org,
Neil Armstrong <narmstrong@baylibre.com>,
linux-kernel@vger.kernel.org,
Jernej Skrabec <jernej.skrabec@gmail.com>,
linux-rockchip@lists.infradead.org,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Pierre-Hugues Husson <phh@phh.me>,
Robin Murphy <robin.murphy@arm.com>
Subject: Re: [PATCH] drm/bridge: synopsys/dw-hdmi: set cec clock rate
Date: Thu, 27 Jan 2022 10:33:07 +0100 [thread overview]
Message-ID: <20220127093307.GJ23490@pengutronix.de> (raw)
In-Reply-To: <20220126202427.3047814-1-pgwipeout@gmail.com>
Hi Peter,
On Wed, Jan 26, 2022 at 03:24:26PM -0500, Peter Geis wrote:
> The hdmi-cec clock must be 32khz in order for cec to work correctly.
> Ensure after enabling the clock we set it in order for the hardware to
> work as expected.
> Warn on failure, in case this is a static clock that is slighty off.
> Fixes hdmi-cec support on Rockchip devices.
You removed this sentence in v2, but I just wanted to mention that
clk_set_rate() won't fail when the desired clock rate can't be
archieved. Instead, you will get the best rate that actually can be
reached. If you want to check that you are happy with the rate you'll
have to do a clk_round_rate() before setting the rate or a
clk_get_rate() afterwards.
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: Peter Geis <pgwipeout@gmail.com>
Cc: "Andrzej Hajda" <andrzej.hajda@intel.com>,
"Neil Armstrong" <narmstrong@baylibre.com>,
"Robert Foss" <robert.foss@linaro.org>,
"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
"Jonas Karlman" <jonas@kwiboo.se>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"David Airlie" <airlied@linux.ie>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Pierre-Hugues Husson" <phh@phh.me>,
"Archit Taneja" <architt@codeaurora.org>,
"Robin Murphy" <robin.murphy@arm.com>,
linux-rockchip@lists.infradead.org,
"Heiko Stübner" <heiko@sntech.de>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/bridge: synopsys/dw-hdmi: set cec clock rate
Date: Thu, 27 Jan 2022 10:33:07 +0100 [thread overview]
Message-ID: <20220127093307.GJ23490@pengutronix.de> (raw)
In-Reply-To: <20220126202427.3047814-1-pgwipeout@gmail.com>
Hi Peter,
On Wed, Jan 26, 2022 at 03:24:26PM -0500, Peter Geis wrote:
> The hdmi-cec clock must be 32khz in order for cec to work correctly.
> Ensure after enabling the clock we set it in order for the hardware to
> work as expected.
> Warn on failure, in case this is a static clock that is slighty off.
> Fixes hdmi-cec support on Rockchip devices.
You removed this sentence in v2, but I just wanted to mention that
clk_set_rate() won't fail when the desired clock rate can't be
archieved. Instead, you will get the best rate that actually can be
reached. If you want to check that you are happy with the rate you'll
have to do a clk_round_rate() before setting the rate or a
clk_get_rate() afterwards.
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2022-01-27 9:33 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-26 20:24 [PATCH] drm/bridge: synopsys/dw-hdmi: set cec clock rate Peter Geis
2022-01-26 20:24 ` Peter Geis
2022-01-26 20:24 ` Peter Geis
2022-01-26 20:32 ` Fabio Estevam
2022-01-26 20:32 ` Fabio Estevam
2022-01-26 20:32 ` Fabio Estevam
2022-01-27 9:33 ` Sascha Hauer [this message]
2022-01-27 9:33 ` Sascha Hauer
2022-01-27 9:33 ` Sascha Hauer
2022-01-28 19:03 ` Peter Geis
2022-01-28 19:03 ` Peter Geis
2022-01-28 19:03 ` Peter Geis
2022-03-13 10:12 ` Piotr Oniszczuk
2022-03-13 10:12 ` Piotr Oniszczuk
2022-03-13 10:12 ` Piotr Oniszczuk
2022-03-13 12:56 ` Peter Geis
2022-03-13 12:56 ` Peter Geis
2022-03-13 12:56 ` Peter Geis
2022-03-13 16:14 ` Piotr Oniszczuk
2022-03-13 16:14 ` Piotr Oniszczuk
2022-03-13 16:14 ` Piotr Oniszczuk
2022-03-14 11:31 ` Robin Murphy
2022-03-14 11:31 ` Robin Murphy
2022-03-14 11:31 ` Robin Murphy
2022-03-14 16:34 ` Robin Murphy
2022-03-14 16:34 ` Robin Murphy
2022-03-14 16:34 ` Robin Murphy
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