From: Michael Cheng <michael.cheng@intel.com> To: intel-gfx@lists.freedesktop.org Cc: tvrtko.ursulin@linux.intel.com, michael.cheng@intel.com, wayne.boyer@intel.com, casey.g.bowman@intel.com, lucas.demarchi@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v5 2/5] drm/i915/gt: Drop invalidate_csb_entries Date: Fri, 4 Feb 2022 08:37:08 -0800 [thread overview] Message-ID: <20220204163711.439403-3-michael.cheng@intel.com> (raw) In-Reply-To: <20220204163711.439403-1-michael.cheng@intel.com> Drop invalidate_csb_entries and directly call drm_clflush_virt_range. This allows for one less function call, and prevent complier errors when building for non-x86 architectures. v2(Michael Cheng): Drop invalidate_csb_entries function and directly invoke drm_clflush_virt_range. Thanks to Tvrtko for the sugguestion. Signed-off-by: Michael Cheng <michael.cheng@intel.com> --- drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c index 9bb7c863172f..7500c06562da 100644 --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c @@ -1646,12 +1646,6 @@ cancel_port_requests(struct intel_engine_execlists * const execlists, return inactive; } -static void invalidate_csb_entries(const u64 *first, const u64 *last) -{ - clflush((void *)first); - clflush((void *)last); -} - /* * Starting with Gen12, the status has a new format: * @@ -1999,7 +1993,7 @@ process_csb(struct intel_engine_cs *engine, struct i915_request **inactive) * the wash as hardware, working or not, will need to do the * invalidation before. */ - invalidate_csb_entries(&buf[0], &buf[num_entries - 1]); + drm_clflush_virt_range(&buf[0], num_entries * sizeof(buf[0])); /* * We assume that any event reflects a change in context flow @@ -2783,8 +2777,8 @@ static void reset_csb_pointers(struct intel_engine_cs *engine) /* Check that the GPU does indeed update the CSB entries! */ memset(execlists->csb_status, -1, (reset_value + 1) * sizeof(u64)); - invalidate_csb_entries(&execlists->csb_status[0], - &execlists->csb_status[reset_value]); + drm_clflush_virt_range(&execlists->csb_status[0], + sizeof(&execlists->csb_status[reset_value])); /* Once more for luck and our trusty paranoia */ ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Michael Cheng <michael.cheng@intel.com> To: intel-gfx@lists.freedesktop.org Cc: michael.cheng@intel.com, lucas.demarchi@intel.com, dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v5 2/5] drm/i915/gt: Drop invalidate_csb_entries Date: Fri, 4 Feb 2022 08:37:08 -0800 [thread overview] Message-ID: <20220204163711.439403-3-michael.cheng@intel.com> (raw) In-Reply-To: <20220204163711.439403-1-michael.cheng@intel.com> Drop invalidate_csb_entries and directly call drm_clflush_virt_range. This allows for one less function call, and prevent complier errors when building for non-x86 architectures. v2(Michael Cheng): Drop invalidate_csb_entries function and directly invoke drm_clflush_virt_range. Thanks to Tvrtko for the sugguestion. Signed-off-by: Michael Cheng <michael.cheng@intel.com> --- drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c index 9bb7c863172f..7500c06562da 100644 --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c @@ -1646,12 +1646,6 @@ cancel_port_requests(struct intel_engine_execlists * const execlists, return inactive; } -static void invalidate_csb_entries(const u64 *first, const u64 *last) -{ - clflush((void *)first); - clflush((void *)last); -} - /* * Starting with Gen12, the status has a new format: * @@ -1999,7 +1993,7 @@ process_csb(struct intel_engine_cs *engine, struct i915_request **inactive) * the wash as hardware, working or not, will need to do the * invalidation before. */ - invalidate_csb_entries(&buf[0], &buf[num_entries - 1]); + drm_clflush_virt_range(&buf[0], num_entries * sizeof(buf[0])); /* * We assume that any event reflects a change in context flow @@ -2783,8 +2777,8 @@ static void reset_csb_pointers(struct intel_engine_cs *engine) /* Check that the GPU does indeed update the CSB entries! */ memset(execlists->csb_status, -1, (reset_value + 1) * sizeof(u64)); - invalidate_csb_entries(&execlists->csb_status[0], - &execlists->csb_status[reset_value]); + drm_clflush_virt_range(&execlists->csb_status[0], + sizeof(&execlists->csb_status[reset_value])); /* Once more for luck and our trusty paranoia */ ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR, -- 2.25.1
next prev parent reply other threads:[~2022-02-04 16:37 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-02-04 16:37 [PATCH v5 0/5] Use drm_clflush* instead of clflush Michael Cheng 2022-02-04 16:37 ` [Intel-gfx] " Michael Cheng 2022-02-04 16:37 ` [PATCH v5 1/5] drm/i915/gt: Re-work intel_write_status_page Michael Cheng 2022-02-04 16:37 ` [Intel-gfx] " Michael Cheng 2022-02-04 16:37 ` Michael Cheng [this message] 2022-02-04 16:37 ` [Intel-gfx] [PATCH v5 2/5] drm/i915/gt: Drop invalidate_csb_entries Michael Cheng 2022-02-07 11:57 ` Tvrtko Ursulin 2022-02-07 11:57 ` [Intel-gfx] " Tvrtko Ursulin 2022-02-07 18:47 ` Michael Cheng 2022-02-07 18:47 ` [Intel-gfx] " Michael Cheng 2022-02-04 16:37 ` [PATCH v5 3/5] drm/i915/gt: Re-work reset_csb Michael Cheng 2022-02-04 16:37 ` [Intel-gfx] " Michael Cheng 2022-02-04 16:37 ` [PATCH v5 4/5] drm/i915/: Re-work clflush_write32 Michael Cheng 2022-02-04 16:37 ` [Intel-gfx] " Michael Cheng 2022-02-04 16:37 ` [PATCH v5 5/5] drm/i915/gt: replace cache_clflush_range Michael Cheng 2022-02-04 16:37 ` [Intel-gfx] " Michael Cheng 2022-02-04 16:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Use drm_clflush* instead of clflush (rev4) Patchwork 2022-02-04 16:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2022-02-04 17:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-02-04 18:53 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2022-02-07 12:03 ` [PATCH v5 0/5] Use drm_clflush* instead of clflush Tvrtko Ursulin 2022-02-07 12:03 ` [Intel-gfx] " Tvrtko Ursulin 2022-02-07 12:44 ` Jani Nikula 2022-02-08 9:02 ` Tvrtko Ursulin
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