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From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 4/8] drm/i915: Reject excessive SAGV block time
Date: Wed, 16 Mar 2022 19:58:00 +0200	[thread overview]
Message-ID: <20220316175800.GG21723@intel.com> (raw)
In-Reply-To: <20220309164948.10671-5-ville.syrjala@linux.intel.com>

On Wed, Mar 09, 2022 at 06:49:44PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> If the mailbox returns an exceesively large SAGV block time let's just
> reject it. This avoids having to worry about overflows when we add the
> SAGV block time to the wm0 latency.
> 
> We shall put the limit arbitrarily at U16_MAX. >65msec latency
> doesn't really make sense to me in any case.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 36f5bccabf64..166246fa27e4 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3716,6 +3716,12 @@ static void intel_sagv_init(struct drm_i915_private *i915)
>  	drm_dbg_kms(&i915->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
>  		    str_yes_no(intel_has_sagv(i915)), i915->sagv_block_time_us);
>  
> +	/* avoid overflow when adding with wm0 latency/etc. */
> +	if (drm_WARN(&i915->drm, i915->sagv_block_time_us > U16_MAX,
> +		     "Excessive SAGV block time %u, ignoring\n",
> +		     i915->sagv_block_time_us))
> +		i915->sagv_block_time_us = 0;
> +
>  	if (!intel_has_sagv(i915))
>  		i915->sagv_block_time_us = 0;
>  }
> -- 
> 2.34.1
> 

  reply	other threads:[~2022-03-16 17:57 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-09 16:49 [Intel-gfx] [PATCH v2 0/8] drm/i915: SAGV block time fixes Ville Syrjala
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 1/8] drm/i915: Treat SAGV block time 0 as SAGV disabled Ville Syrjala
2022-03-09 16:49   ` Ville Syrjala
2022-03-09 19:29   ` [Intel-gfx] " Lisovskiy, Stanislav
2022-03-09 20:35     ` Ville Syrjälä
2022-03-16 17:55   ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 2/8] drm/i915: Rework SAGV block time probing Ville Syrjala
2022-03-16 17:55   ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 3/8] drm/i915: Probe whether SAGV works on pre-icl Ville Syrjala
2022-03-16 17:57   ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 4/8] drm/i915: Reject excessive SAGV block time Ville Syrjala
2022-03-16 17:58   ` Lisovskiy, Stanislav [this message]
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 5/8] drm/i915: Rename pre-icl SAGV enable/disable functions Ville Syrjala
2022-03-16 17:57   ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 6/8] drm/i915: Fix PSF GV point mask when SAGV is not possible Ville Syrjala
2022-03-09 16:49   ` Ville Syrjala
2022-03-09 18:59   ` Lisovskiy, Stanislav
2022-03-09 18:59     ` [Intel-gfx] " Lisovskiy, Stanislav
2022-03-09 19:08     ` Ville Syrjälä
2022-03-09 19:08       ` [Intel-gfx] " Ville Syrjälä
2022-03-09 19:34       ` Lisovskiy, Stanislav
2022-03-09 19:34         ` [Intel-gfx] " Lisovskiy, Stanislav
2022-03-09 20:21         ` Ville Syrjälä
2022-03-09 20:21           ` [Intel-gfx] " Ville Syrjälä
2022-03-16 18:01         ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 7/8] drm/i915: Unconfuses QGV vs. PSF point masks Ville Syrjala
2022-03-16 17:56   ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 8/8] drm/i915: Rename QGV request/response bits Ville Syrjala
2022-03-16 17:57   ` Lisovskiy, Stanislav
2022-03-09 19:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: SAGV block time fixes (rev2) Patchwork
2022-03-09 20:00 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-10  5:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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