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From: Weiwei Li <liweiwei@iscas.ac.cn>
To: richard.henderson@linaro.org, palmer@dabbelt.com,
	alistair.francis@wdc.com, bin.meng@windriver.com,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: wangjunqiang@iscas.ac.cn, Weiwei Li <liweiwei@iscas.ac.cn>,
	lazyparser@gmail.com, luruibo2000@163.com, lustrew@foxmail.com
Subject: [PATCH v10 14/14] target/riscv: rvk: expose zbk* and zk* properties
Date: Sat, 16 Apr 2022 10:35:49 +0800	[thread overview]
Message-ID: <20220416023549.28463-15-liweiwei@iscas.ac.cn> (raw)
In-Reply-To: <20220416023549.28463-1-liweiwei@iscas.ac.cn>

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/cpu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 365bdd5fe5..973dd5ea47 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -844,7 +844,20 @@ static Property riscv_cpu_properties[] = {
     DEFINE_PROP_BOOL("zba", RISCVCPU, cfg.ext_zba, true),
     DEFINE_PROP_BOOL("zbb", RISCVCPU, cfg.ext_zbb, true),
     DEFINE_PROP_BOOL("zbc", RISCVCPU, cfg.ext_zbc, true),
+    DEFINE_PROP_BOOL("zbkb", RISCVCPU, cfg.ext_zbkb, false),
+    DEFINE_PROP_BOOL("zbkc", RISCVCPU, cfg.ext_zbkc, false),
+    DEFINE_PROP_BOOL("zbkx", RISCVCPU, cfg.ext_zbkx, false),
     DEFINE_PROP_BOOL("zbs", RISCVCPU, cfg.ext_zbs, true),
+    DEFINE_PROP_BOOL("zk", RISCVCPU, cfg.ext_zk, false),
+    DEFINE_PROP_BOOL("zkn", RISCVCPU, cfg.ext_zkn, false),
+    DEFINE_PROP_BOOL("zknd", RISCVCPU, cfg.ext_zknd, false),
+    DEFINE_PROP_BOOL("zkne", RISCVCPU, cfg.ext_zkne, false),
+    DEFINE_PROP_BOOL("zknh", RISCVCPU, cfg.ext_zknh, false),
+    DEFINE_PROP_BOOL("zkr", RISCVCPU, cfg.ext_zkr, false),
+    DEFINE_PROP_BOOL("zks", RISCVCPU, cfg.ext_zks, false),
+    DEFINE_PROP_BOOL("zksed", RISCVCPU, cfg.ext_zksed, false),
+    DEFINE_PROP_BOOL("zksh", RISCVCPU, cfg.ext_zksh, false),
+    DEFINE_PROP_BOOL("zkt", RISCVCPU, cfg.ext_zkt, false),
 
     DEFINE_PROP_BOOL("zdinx", RISCVCPU, cfg.ext_zdinx, false),
     DEFINE_PROP_BOOL("zfinx", RISCVCPU, cfg.ext_zfinx, false),
-- 
2.17.1



WARNING: multiple messages have this Message-ID (diff)
From: Weiwei Li <liweiwei@iscas.ac.cn>
To: richard.henderson@linaro.org, palmer@dabbelt.com,
	alistair.francis@wdc.com, bin.meng@windriver.com,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: wangjunqiang@iscas.ac.cn, lazyparser@gmail.com,
	lustrew@foxmail.com, luruibo2000@163.com,
	Weiwei Li <liweiwei@iscas.ac.cn>
Subject: [PATCH v10 14/14] target/riscv: rvk: expose zbk* and zk* properties
Date: Sat, 16 Apr 2022 10:35:49 +0800	[thread overview]
Message-ID: <20220416023549.28463-15-liweiwei@iscas.ac.cn> (raw)
In-Reply-To: <20220416023549.28463-1-liweiwei@iscas.ac.cn>

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/cpu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 365bdd5fe5..973dd5ea47 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -844,7 +844,20 @@ static Property riscv_cpu_properties[] = {
     DEFINE_PROP_BOOL("zba", RISCVCPU, cfg.ext_zba, true),
     DEFINE_PROP_BOOL("zbb", RISCVCPU, cfg.ext_zbb, true),
     DEFINE_PROP_BOOL("zbc", RISCVCPU, cfg.ext_zbc, true),
+    DEFINE_PROP_BOOL("zbkb", RISCVCPU, cfg.ext_zbkb, false),
+    DEFINE_PROP_BOOL("zbkc", RISCVCPU, cfg.ext_zbkc, false),
+    DEFINE_PROP_BOOL("zbkx", RISCVCPU, cfg.ext_zbkx, false),
     DEFINE_PROP_BOOL("zbs", RISCVCPU, cfg.ext_zbs, true),
+    DEFINE_PROP_BOOL("zk", RISCVCPU, cfg.ext_zk, false),
+    DEFINE_PROP_BOOL("zkn", RISCVCPU, cfg.ext_zkn, false),
+    DEFINE_PROP_BOOL("zknd", RISCVCPU, cfg.ext_zknd, false),
+    DEFINE_PROP_BOOL("zkne", RISCVCPU, cfg.ext_zkne, false),
+    DEFINE_PROP_BOOL("zknh", RISCVCPU, cfg.ext_zknh, false),
+    DEFINE_PROP_BOOL("zkr", RISCVCPU, cfg.ext_zkr, false),
+    DEFINE_PROP_BOOL("zks", RISCVCPU, cfg.ext_zks, false),
+    DEFINE_PROP_BOOL("zksed", RISCVCPU, cfg.ext_zksed, false),
+    DEFINE_PROP_BOOL("zksh", RISCVCPU, cfg.ext_zksh, false),
+    DEFINE_PROP_BOOL("zkt", RISCVCPU, cfg.ext_zkt, false),
 
     DEFINE_PROP_BOOL("zdinx", RISCVCPU, cfg.ext_zdinx, false),
     DEFINE_PROP_BOOL("zfinx", RISCVCPU, cfg.ext_zfinx, false),
-- 
2.17.1



  parent reply	other threads:[~2022-04-16  2:50 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-16  2:35 [PATCH v10 00/14] support subsets of scalar crypto extension Weiwei Li
2022-04-16  2:35 ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 01/14] target/riscv: rvk: add cfg properties for zbk* and zk* Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 02/14] target/riscv: rvk: add support for zbkb extension Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 03/14] target/riscv: rvk: add support for zbkc extension Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 04/14] target/riscv: rvk: add support for zbkx extension Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 05/14] crypto: move sm4_sbox from target/arm Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 06/14] target/riscv: rvk: add support for zknd/zkne extension in RV32 Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:50   ` Richard Henderson
2022-04-16  2:50     ` Richard Henderson
2022-04-16  2:35 ` [PATCH v10 07/14] target/riscv: rvk: add support for zkne/zknd extension in RV64 Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:51   ` Richard Henderson
2022-04-16  2:51     ` Richard Henderson
2022-04-16  2:35 ` [PATCH v10 08/14] target/riscv: rvk: add support for sha256 related instructions in zknh extension Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 " Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 10/14] target/riscv: rvk: add support for sha512 related instructions for RV64 " Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 11/14] target/riscv: rvk: add support for zksed/zksh extension Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 12/14] target/riscv: rvk: add CSR support for Zkr Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` [PATCH v10 13/14] disas/riscv.c: rvk: add disas support for Zbk* and Zk* instructions Weiwei Li
2022-04-16  2:35   ` Weiwei Li
2022-04-16  2:35 ` Weiwei Li [this message]
2022-04-16  2:35   ` [PATCH v10 14/14] target/riscv: rvk: expose zbk* and zk* properties Weiwei Li

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