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From: Marco Felsch <m.felsch@pengutronix.de>
To: robert.foss@linaro.org, laurent.pinchart@ideasonboard.com,
	jernej.skrabec@gmail.com, jonas@kwiboo.se, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, sam@ravnborg.org,
	maxime@cerno.tech
Cc: devicetree@vger.kernel.org, kernel@pengutronix.de,
	dri-devel@lists.freedesktop.org
Subject: [PATCH 2/6] dt-bindings: drm/bridge: ti-sn65dsi83: add documentation for reverse lvds lanes
Date: Mon, 30 May 2022 17:05:45 +0200	[thread overview]
Message-ID: <20220530150548.1236307-3-m.felsch@pengutronix.de> (raw)
In-Reply-To: <20220530150548.1236307-1-m.felsch@pengutronix.de>

The TI converter chip can swap the LVDS data lanes in a pre-defined
manner. This can be useful to improve the layout characteristic.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
 .../bindings/display/bridge/ti,sn65dsi83.yaml | 58 ++++++++++++++++++-
 1 file changed, 56 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
index 48a97bb3e2e0..7306b9874dc3 100644
--- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
@@ -80,13 +80,67 @@ properties:
                   - const: 4
 
       port@2:
-        $ref: /schemas/graph.yaml#/properties/port
+        $ref: /schemas/graph.yaml#/$defs/port-base
+        unevaluatedProperties: false
         description: Video port for LVDS Channel-A output (panel or bridge).
 
+        properties:
+          endpoint:
+            $ref: /schemas/media/video-interfaces.yaml#
+            unevaluatedProperties: false
+
+            properties:
+              data-lanes:
+                description: |
+                  Array of physical LVDS data lane indexes in reverse or normal
+                  order. Specify it in reverse order to enable the bridge CHA
+                  reverse ordering. If not specified normal order is used.
+                items:
+                  oneOf:
+                    # reverse order
+                    - items:
+                        - const: 4
+                        - const: 3
+                        - const: 2
+                        - const: 1
+                    # normal order
+                    - items:
+                        - const: 1
+                        - const: 2
+                        - const: 3
+                        - const: 4
+
       port@3:
-        $ref: /schemas/graph.yaml#/properties/port
+        $ref: /schemas/graph.yaml#/$defs/port-base
+        unevaluatedProperties: false
         description: Video port for LVDS Channel-B output (panel or bridge).
 
+        properties:
+          endpoint:
+            $ref: /schemas/media/video-interfaces.yaml#
+            unevaluatedProperties: false
+
+            properties:
+              data-lanes:
+                description: |
+                  Array of physical LVDS data lane indexes in reverse or normal
+                  order. Specify it in reverse order to enable the bridge CHB
+                  reverse ordering. If not specified normal order is used.
+                items:
+                  oneOf:
+                    # reverse order
+                    - items:
+                        - const: 4
+                        - const: 3
+                        - const: 2
+                        - const: 1
+                    # normal order
+                    - items:
+                        - const: 1
+                        - const: 2
+                        - const: 3
+                        - const: 4
+
     required:
       - port@0
       - port@2
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Marco Felsch <m.felsch@pengutronix.de>
To: robert.foss@linaro.org, laurent.pinchart@ideasonboard.com,
	jernej.skrabec@gmail.com, jonas@kwiboo.se, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, sam@ravnborg.org,
	maxime@cerno.tech
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	kernel@pengutronix.de
Subject: [PATCH 2/6] dt-bindings: drm/bridge: ti-sn65dsi83: add documentation for reverse lvds lanes
Date: Mon, 30 May 2022 17:05:45 +0200	[thread overview]
Message-ID: <20220530150548.1236307-3-m.felsch@pengutronix.de> (raw)
In-Reply-To: <20220530150548.1236307-1-m.felsch@pengutronix.de>

The TI converter chip can swap the LVDS data lanes in a pre-defined
manner. This can be useful to improve the layout characteristic.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
 .../bindings/display/bridge/ti,sn65dsi83.yaml | 58 ++++++++++++++++++-
 1 file changed, 56 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
index 48a97bb3e2e0..7306b9874dc3 100644
--- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
@@ -80,13 +80,67 @@ properties:
                   - const: 4
 
       port@2:
-        $ref: /schemas/graph.yaml#/properties/port
+        $ref: /schemas/graph.yaml#/$defs/port-base
+        unevaluatedProperties: false
         description: Video port for LVDS Channel-A output (panel or bridge).
 
+        properties:
+          endpoint:
+            $ref: /schemas/media/video-interfaces.yaml#
+            unevaluatedProperties: false
+
+            properties:
+              data-lanes:
+                description: |
+                  Array of physical LVDS data lane indexes in reverse or normal
+                  order. Specify it in reverse order to enable the bridge CHA
+                  reverse ordering. If not specified normal order is used.
+                items:
+                  oneOf:
+                    # reverse order
+                    - items:
+                        - const: 4
+                        - const: 3
+                        - const: 2
+                        - const: 1
+                    # normal order
+                    - items:
+                        - const: 1
+                        - const: 2
+                        - const: 3
+                        - const: 4
+
       port@3:
-        $ref: /schemas/graph.yaml#/properties/port
+        $ref: /schemas/graph.yaml#/$defs/port-base
+        unevaluatedProperties: false
         description: Video port for LVDS Channel-B output (panel or bridge).
 
+        properties:
+          endpoint:
+            $ref: /schemas/media/video-interfaces.yaml#
+            unevaluatedProperties: false
+
+            properties:
+              data-lanes:
+                description: |
+                  Array of physical LVDS data lane indexes in reverse or normal
+                  order. Specify it in reverse order to enable the bridge CHB
+                  reverse ordering. If not specified normal order is used.
+                items:
+                  oneOf:
+                    # reverse order
+                    - items:
+                        - const: 4
+                        - const: 3
+                        - const: 2
+                        - const: 1
+                    # normal order
+                    - items:
+                        - const: 1
+                        - const: 2
+                        - const: 3
+                        - const: 4
+
     required:
       - port@0
       - port@2
-- 
2.30.2


  parent reply	other threads:[~2022-05-30 15:06 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-30 15:05 [PATCH 0/6] TI SN65DSI83 Features Marco Felsch
2022-05-30 15:05 ` Marco Felsch
2022-05-30 15:05 ` [PATCH 1/6] drm/bridge: ti-sn65dsi83: make lvds lane register setup more readable Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-05-30 15:05 ` Marco Felsch [this message]
2022-05-30 15:05   ` [PATCH 2/6] dt-bindings: drm/bridge: ti-sn65dsi83: add documentation for reverse lvds lanes Marco Felsch
2022-06-05 21:09   ` Rob Herring
2022-06-05 21:09     ` Rob Herring
2022-05-30 15:05 ` [PATCH 3/6] drm/bridge: ti-sn65dsi83: add support to swap the LVDS data lanes Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-05-30 15:05 ` [PATCH 4/6] drm/bridge: ti-sn65dsi83: make use of dev_err_probe Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-05-30 15:05 ` [PATCH 5/6] dt-bindings: drm/bridge: ti-sn65dsi83: Add reset controller documentation Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-05-31  7:33   ` (EXT) " Alexander Stein
2022-05-31  7:33     ` Alexander Stein
2022-05-31  8:29     ` Marco Felsch
2022-05-31  8:29       ` Marco Felsch
2022-05-30 15:05 ` [PATCH 6/6] drm/bridge: ti-sn65dsi83: add support for a external reset controller Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-07-26  9:12 ` [PATCH 0/6] TI SN65DSI83 Features Marco Felsch
2022-07-26  9:12   ` Marco Felsch
2022-08-29 15:06   ` Robert Foss
2022-08-29 15:06     ` Robert Foss
2022-08-31  8:13     ` Marco Felsch
2022-08-31  8:13       ` Marco Felsch

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