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From: Marco Felsch <m.felsch@pengutronix.de>
To: robert.foss@linaro.org, laurent.pinchart@ideasonboard.com,
	jernej.skrabec@gmail.com, jonas@kwiboo.se, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, sam@ravnborg.org,
	maxime@cerno.tech
Cc: devicetree@vger.kernel.org, kernel@pengutronix.de,
	dri-devel@lists.freedesktop.org
Subject: [PATCH 6/6] drm/bridge: ti-sn65dsi83: add support for a external reset controller
Date: Mon, 30 May 2022 17:05:49 +0200	[thread overview]
Message-ID: <20220530150548.1236307-7-m.felsch@pengutronix.de> (raw)
In-Reply-To: <20220530150548.1236307-1-m.felsch@pengutronix.de>

The bridge chip has an enable gpio which of course can enable/disable
the bridge. Most the time this gpio is connected directly to the host
but sometimes it is connected to a reset controller chip and the host
controlls the reset controller chip instead. This commit adds the
support to handle that.

Therefore we need either the reset controller or a gpio to be present
and valid. The behaviour is changed in that way that a gpio or a reset
controller have to be successfully requested else the driver probe
fails, like the current behaviour.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index 3c1dc16985b5..7b232a4f8bcb 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -35,6 +35,7 @@
 #include <linux/property.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
+#include <linux/reset.h>
 
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_bridge.h>
@@ -146,6 +147,7 @@ struct sn65dsi83 {
 	struct drm_bridge		*panel_bridge;
 	struct gpio_desc		*enable_gpio;
 	struct regulator		*vcc;
+	struct reset_control		*reset;
 	int				dsi_lanes;
 	bool				lvds_dual_link;
 	bool				lvds_dual_link_even_odd_swap;
@@ -350,6 +352,7 @@ static void sn65dsi83_atomic_enable(struct drm_bridge *bridge,
 
 	/* Deassert reset */
 	gpiod_set_value(ctx->enable_gpio, 1);
+	reset_control_deassert(ctx->reset);
 	usleep_range(1000, 1100);
 
 	/* Get the LVDS format from the bridge state. */
@@ -511,6 +514,7 @@ static void sn65dsi83_atomic_disable(struct drm_bridge *bridge,
 
 	/* Put the chip in reset, pull EN line low, and assure 10ms reset low timing. */
 	gpiod_set_value(ctx->enable_gpio, 0);
+	reset_control_assert(ctx->reset);
 	usleep_range(10000, 11000);
 
 	ret = regulator_disable(ctx->vcc);
@@ -760,6 +764,13 @@ static int sn65dsi83_probe(struct i2c_client *client,
 		return dev_err_probe(ctx->dev, PTR_ERR(ctx->enable_gpio),
 				     "Failed to get GPIO\n");
 
+	/* Or use a external reset chip to do so */
+	ctx->reset = devm_reset_control_get_optional(ctx->dev, NULL);
+	if (IS_ERR(ctx->reset))
+		return dev_err_probe(ctx->dev, PTR_ERR(ctx->reset),
+				     "Failed to get reset\n");
+	reset_control_assert(ctx->reset);
+
 	usleep_range(10000, 11000);
 
 	ret = sn65dsi83_parse_dt(ctx, model);
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Marco Felsch <m.felsch@pengutronix.de>
To: robert.foss@linaro.org, laurent.pinchart@ideasonboard.com,
	jernej.skrabec@gmail.com, jonas@kwiboo.se, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, sam@ravnborg.org,
	maxime@cerno.tech
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	kernel@pengutronix.de
Subject: [PATCH 6/6] drm/bridge: ti-sn65dsi83: add support for a external reset controller
Date: Mon, 30 May 2022 17:05:49 +0200	[thread overview]
Message-ID: <20220530150548.1236307-7-m.felsch@pengutronix.de> (raw)
In-Reply-To: <20220530150548.1236307-1-m.felsch@pengutronix.de>

The bridge chip has an enable gpio which of course can enable/disable
the bridge. Most the time this gpio is connected directly to the host
but sometimes it is connected to a reset controller chip and the host
controlls the reset controller chip instead. This commit adds the
support to handle that.

Therefore we need either the reset controller or a gpio to be present
and valid. The behaviour is changed in that way that a gpio or a reset
controller have to be successfully requested else the driver probe
fails, like the current behaviour.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index 3c1dc16985b5..7b232a4f8bcb 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -35,6 +35,7 @@
 #include <linux/property.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
+#include <linux/reset.h>
 
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_bridge.h>
@@ -146,6 +147,7 @@ struct sn65dsi83 {
 	struct drm_bridge		*panel_bridge;
 	struct gpio_desc		*enable_gpio;
 	struct regulator		*vcc;
+	struct reset_control		*reset;
 	int				dsi_lanes;
 	bool				lvds_dual_link;
 	bool				lvds_dual_link_even_odd_swap;
@@ -350,6 +352,7 @@ static void sn65dsi83_atomic_enable(struct drm_bridge *bridge,
 
 	/* Deassert reset */
 	gpiod_set_value(ctx->enable_gpio, 1);
+	reset_control_deassert(ctx->reset);
 	usleep_range(1000, 1100);
 
 	/* Get the LVDS format from the bridge state. */
@@ -511,6 +514,7 @@ static void sn65dsi83_atomic_disable(struct drm_bridge *bridge,
 
 	/* Put the chip in reset, pull EN line low, and assure 10ms reset low timing. */
 	gpiod_set_value(ctx->enable_gpio, 0);
+	reset_control_assert(ctx->reset);
 	usleep_range(10000, 11000);
 
 	ret = regulator_disable(ctx->vcc);
@@ -760,6 +764,13 @@ static int sn65dsi83_probe(struct i2c_client *client,
 		return dev_err_probe(ctx->dev, PTR_ERR(ctx->enable_gpio),
 				     "Failed to get GPIO\n");
 
+	/* Or use a external reset chip to do so */
+	ctx->reset = devm_reset_control_get_optional(ctx->dev, NULL);
+	if (IS_ERR(ctx->reset))
+		return dev_err_probe(ctx->dev, PTR_ERR(ctx->reset),
+				     "Failed to get reset\n");
+	reset_control_assert(ctx->reset);
+
 	usleep_range(10000, 11000);
 
 	ret = sn65dsi83_parse_dt(ctx, model);
-- 
2.30.2


  parent reply	other threads:[~2022-05-30 15:06 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-30 15:05 [PATCH 0/6] TI SN65DSI83 Features Marco Felsch
2022-05-30 15:05 ` Marco Felsch
2022-05-30 15:05 ` [PATCH 1/6] drm/bridge: ti-sn65dsi83: make lvds lane register setup more readable Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-05-30 15:05 ` [PATCH 2/6] dt-bindings: drm/bridge: ti-sn65dsi83: add documentation for reverse lvds lanes Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-06-05 21:09   ` Rob Herring
2022-06-05 21:09     ` Rob Herring
2022-05-30 15:05 ` [PATCH 3/6] drm/bridge: ti-sn65dsi83: add support to swap the LVDS data lanes Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-05-30 15:05 ` [PATCH 4/6] drm/bridge: ti-sn65dsi83: make use of dev_err_probe Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-05-30 15:05 ` [PATCH 5/6] dt-bindings: drm/bridge: ti-sn65dsi83: Add reset controller documentation Marco Felsch
2022-05-30 15:05   ` Marco Felsch
2022-05-31  7:33   ` (EXT) " Alexander Stein
2022-05-31  7:33     ` Alexander Stein
2022-05-31  8:29     ` Marco Felsch
2022-05-31  8:29       ` Marco Felsch
2022-05-30 15:05 ` Marco Felsch [this message]
2022-05-30 15:05   ` [PATCH 6/6] drm/bridge: ti-sn65dsi83: add support for a external reset controller Marco Felsch
2022-07-26  9:12 ` [PATCH 0/6] TI SN65DSI83 Features Marco Felsch
2022-07-26  9:12   ` Marco Felsch
2022-08-29 15:06   ` Robert Foss
2022-08-29 15:06     ` Robert Foss
2022-08-31  8:13     ` Marco Felsch
2022-08-31  8:13       ` Marco Felsch

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