[PATCH] RISC-V: Don't truncate a hartid in the cbom-block-size mismatch warning

[PATCH] RISC-V: Don't truncate a hartid in the cbom-block-size mismatch warning

[Palmer Dabbelt]

I forgot to update this when sorting out the 64-bit hartid code.

Fixes: 3aefb2ee5bdd ("riscv: implement Zicbom-based CMO instructions + the t-head variant")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/mm/dma-noncoherent.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
index cd2225304c82..61a4337cf7b1 100644
--- a/arch/riscv/mm/dma-noncoherent.c
+++ b/arch/riscv/mm/dma-noncoherent.c
@@ -83,8 +83,7 @@ void riscv_init_cbom_blocksize(void)
 	u32 val;
 
 	for_each_of_cpu_node(node) {
-		unsigned long hartid;
-		int cbom_hartid;
+		unsigned long hartid, cbom_hartid;
 
 		ret = riscv_of_processor_hartid(node, &hartid);
 		if (ret)
@@ -103,7 +102,7 @@ void riscv_init_cbom_blocksize(void)
 			cbom_hartid = hartid;
 		} else {
 			if (riscv_cbom_block_size != val)
-				pr_warn("cbom-block-size mismatched between harts %d and %lu\n",
+				pr_warn("cbom-block-size mismatched between harts %lu and %lu\n",
 					cbom_hartid, hartid);
 		}
 	}
-- 
2.34.1


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Re: [PATCH] RISC-V: Don't truncate a hartid in the cbom-block-size mismatch warning

[Anup Patel]

On Fri, Aug 12, 2022 at 7:54 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> I forgot to update this when sorting out the 64-bit hartid code.
>
> Fixes: 3aefb2ee5bdd ("riscv: implement Zicbom-based CMO instructions + the t-head variant")
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/mm/dma-noncoherent.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
> index cd2225304c82..61a4337cf7b1 100644
> --- a/arch/riscv/mm/dma-noncoherent.c
> +++ b/arch/riscv/mm/dma-noncoherent.c
> @@ -83,8 +83,7 @@ void riscv_init_cbom_blocksize(void)
>         u32 val;
>
>         for_each_of_cpu_node(node) {
> -               unsigned long hartid;
> -               int cbom_hartid;
> +               unsigned long hartid, cbom_hartid;
>
>                 ret = riscv_of_processor_hartid(node, &hartid);
>                 if (ret)
> @@ -103,7 +102,7 @@ void riscv_init_cbom_blocksize(void)
>                         cbom_hartid = hartid;
>                 } else {
>                         if (riscv_cbom_block_size != val)
> -                               pr_warn("cbom-block-size mismatched between harts %d and %lu\n",
> +                               pr_warn("cbom-block-size mismatched between harts %lu and %lu\n",
>                                         cbom_hartid, hartid);
>                 }
>         }
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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Re: [PATCH] RISC-V: Don't truncate a hartid in the cbom-block-size mismatch warning

[Conor.Dooley]

On 12/08/2022 15:24, Palmer Dabbelt wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> I forgot to update this when sorting out the 64-bit hartid code.

As much as to test your script as anything else & with cbom_hartid
initialised:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks. 
> 
> Fixes: 3aefb2ee5bdd ("riscv: implement Zicbom-based CMO instructions + the t-head variant")
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
>  arch/riscv/mm/dma-noncoherent.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
> index cd2225304c82..61a4337cf7b1 100644
> --- a/arch/riscv/mm/dma-noncoherent.c
> +++ b/arch/riscv/mm/dma-noncoherent.c
> @@ -83,8 +83,7 @@ void riscv_init_cbom_blocksize(void)
>         u32 val;
> 
>         for_each_of_cpu_node(node) {
> -               unsigned long hartid;
> -               int cbom_hartid;
> +               unsigned long hartid, cbom_hartid;
> 
>                 ret = riscv_of_processor_hartid(node, &hartid);
>                 if (ret)
> @@ -103,7 +102,7 @@ void riscv_init_cbom_blocksize(void)
>                         cbom_hartid = hartid;
>                 } else {
>                         if (riscv_cbom_block_size != val)
> -                               pr_warn("cbom-block-size mismatched between harts %d and %lu\n",
> +                               pr_warn("cbom-block-size mismatched between harts %lu and %lu\n",
>                                         cbom_hartid, hartid);
>                 }
>         }
> --
> 2.34.1
> 
> 
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> linux-riscv@lists.infradead.org
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Re: [PATCH] RISC-V: Don't truncate a hartid in the cbom-block-size mismatch warning

[Palmer Dabbelt]

On Fri, 12 Aug 2022 08:13:54 PDT (-0700), anup@brainfault.org wrote:
> On Fri, Aug 12, 2022 at 7:54 PM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>>
>> I forgot to update this when sorting out the 64-bit hartid code.
>>
>> Fixes: 3aefb2ee5bdd ("riscv: implement Zicbom-based CMO instructions + the t-head variant")
>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
>
> Looks good to me.

Actually it looks pretty bad to me, I just sent a v2: 
https://lore.kernel.org/r/20220812154010.18280-1-palmer@rivosinc.com

> Reviewed-by: Anup Patel <anup@brainfault.org>
>
> Regards,
> Anup
>
>> ---
>>  arch/riscv/mm/dma-noncoherent.c | 5 ++---
>>  1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
>> index cd2225304c82..61a4337cf7b1 100644
>> --- a/arch/riscv/mm/dma-noncoherent.c
>> +++ b/arch/riscv/mm/dma-noncoherent.c
>> @@ -83,8 +83,7 @@ void riscv_init_cbom_blocksize(void)
>>         u32 val;
>>
>>         for_each_of_cpu_node(node) {
>> -               unsigned long hartid;
>> -               int cbom_hartid;
>> +               unsigned long hartid, cbom_hartid;
>>
>>                 ret = riscv_of_processor_hartid(node, &hartid);
>>                 if (ret)
>> @@ -103,7 +102,7 @@ void riscv_init_cbom_blocksize(void)
>>                         cbom_hartid = hartid;
>>                 } else {
>>                         if (riscv_cbom_block_size != val)
>> -                               pr_warn("cbom-block-size mismatched between harts %d and %lu\n",
>> +                               pr_warn("cbom-block-size mismatched between harts %lu and %lu\n",
>>                                         cbom_hartid, hartid);
>>                 }
>>         }
>> --
>> 2.34.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

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