From: Jonathan Cameron <Jonathan.Cameron@huawei.com> To: Shuai Xue <xueshuai@linux.alibaba.com> Cc: Bjorn Helgaas <helgaas@kernel.org>, <will@kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <rdunlap@infradead.org>, <robin.murphy@arm.com>, <mark.rutland@arm.com>, <baolin.wang@linux.alibaba.com>, <zhuo.song@linux.alibaba.com>, <linux-pci@vger.kernel.org> Subject: Re: [PATCH v1 2/3] drivers/perf: add DesignWare PCIe PMU driver Date: Tue, 27 Sep 2022 11:04:35 +0100 [thread overview] Message-ID: <20220927110435.00005b4d@huawei.com> (raw) In-Reply-To: <7502d496-9ec1-1ca4-c643-376ec2aa662e@linux.alibaba.com> On Tue, 27 Sep 2022 13:13:29 +0800 Shuai Xue <xueshuai@linux.alibaba.com> wrote: > 在 2022/9/27 AM1:18, Bjorn Helgaas 写道: > > On Mon, Sep 26, 2022 at 09:31:34PM +0800, Shuai Xue wrote: > >> 在 2022/9/23 PM11:54, Jonathan Cameron 写道: > >>>> I found a similar definition in arch/ia64/pci/pci.c . > >>>> > >>>> #define PCI_SAL_ADDRESS(seg, bus, devfn, reg) \ > >>>> (((u64) seg << 24) | (bus << 16) | (devfn << 8) | (reg)) > >>>> > >>>> Should we move it into a common header first? > >>> > >>> Maybe. The bus, devfn, reg part is standard bdf, but I don't think > >>> the PCI 6.0 spec defined a version with the seg in the upper bits. > >>> I'm not sure if we want to adopt that in LInux. > >> > >> I found lots of code use seg,bus,devfn,reg with format "%04x:%02x:%02x.%x", > >> I am not quite familiar with PCIe spec. What do you think about it, Bjorn? > > > > The PCIe spec defines an address encoding for bus/device/function/reg > > for the purposes of ECAM (PCIe r6.0, sec 7.2.2), but as far as I know, > > it doesn't define anything similar that includes the segment. The > > segment is really outside the scope of PCIe because each segment is a > > completely separate PCIe hierarchy. > > Thank you for your explanation. > > > > > So I probably wouldn't make this a generic definition. But if/when > > you print things like this out, please do use the format spec you > > mentioned above so it matches the style used elsewhere. > > > > Agree. The print format of bus/device/function/reg is "%04x:%02x:%02x.%x", > so I named the PMU as the same format. Then the usage flow would be: > > - lspci to get the device root port in format seg/bus/device/function/reg. > 10:00.0 PCI bridge: Device 1ded:8000 (rev 01) > - select its PMU name pcie_bdf_100000. > - monitor with perf: > perf stat -a -e pcie_bdf_200/Rx_PCIe_TLP_Data_Payload/ I think you probably want something in there to indicate it's an RP and the bdf part may be redundant... Jonathan > > Bjorn and Jonathan, are you happy with this flow? > > Thank you. > > Best Regards, > Shuai >
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <Jonathan.Cameron@huawei.com> To: Shuai Xue <xueshuai@linux.alibaba.com> Cc: Bjorn Helgaas <helgaas@kernel.org>, <will@kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <rdunlap@infradead.org>, <robin.murphy@arm.com>, <mark.rutland@arm.com>, <baolin.wang@linux.alibaba.com>, <zhuo.song@linux.alibaba.com>, <linux-pci@vger.kernel.org> Subject: Re: [PATCH v1 2/3] drivers/perf: add DesignWare PCIe PMU driver Date: Tue, 27 Sep 2022 11:04:35 +0100 [thread overview] Message-ID: <20220927110435.00005b4d@huawei.com> (raw) In-Reply-To: <7502d496-9ec1-1ca4-c643-376ec2aa662e@linux.alibaba.com> On Tue, 27 Sep 2022 13:13:29 +0800 Shuai Xue <xueshuai@linux.alibaba.com> wrote: > 在 2022/9/27 AM1:18, Bjorn Helgaas 写道: > > On Mon, Sep 26, 2022 at 09:31:34PM +0800, Shuai Xue wrote: > >> 在 2022/9/23 PM11:54, Jonathan Cameron 写道: > >>>> I found a similar definition in arch/ia64/pci/pci.c . > >>>> > >>>> #define PCI_SAL_ADDRESS(seg, bus, devfn, reg) \ > >>>> (((u64) seg << 24) | (bus << 16) | (devfn << 8) | (reg)) > >>>> > >>>> Should we move it into a common header first? > >>> > >>> Maybe. The bus, devfn, reg part is standard bdf, but I don't think > >>> the PCI 6.0 spec defined a version with the seg in the upper bits. > >>> I'm not sure if we want to adopt that in LInux. > >> > >> I found lots of code use seg,bus,devfn,reg with format "%04x:%02x:%02x.%x", > >> I am not quite familiar with PCIe spec. What do you think about it, Bjorn? > > > > The PCIe spec defines an address encoding for bus/device/function/reg > > for the purposes of ECAM (PCIe r6.0, sec 7.2.2), but as far as I know, > > it doesn't define anything similar that includes the segment. The > > segment is really outside the scope of PCIe because each segment is a > > completely separate PCIe hierarchy. > > Thank you for your explanation. > > > > > So I probably wouldn't make this a generic definition. But if/when > > you print things like this out, please do use the format spec you > > mentioned above so it matches the style used elsewhere. > > > > Agree. The print format of bus/device/function/reg is "%04x:%02x:%02x.%x", > so I named the PMU as the same format. Then the usage flow would be: > > - lspci to get the device root port in format seg/bus/device/function/reg. > 10:00.0 PCI bridge: Device 1ded:8000 (rev 01) > - select its PMU name pcie_bdf_100000. > - monitor with perf: > perf stat -a -e pcie_bdf_200/Rx_PCIe_TLP_Data_Payload/ I think you probably want something in there to indicate it's an RP and the bdf part may be redundant... Jonathan > > Bjorn and Jonathan, are you happy with this flow? > > Thank you. > > Best Regards, > Shuai > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-27 10:04 UTC|newest] Thread overview: 158+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-17 12:10 [PATCH v1 0/3] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue 2022-09-17 12:10 ` Shuai Xue 2022-09-17 12:10 ` [PATCH v1 1/3] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue 2022-09-17 12:10 ` Shuai Xue 2022-09-22 13:25 ` Will Deacon 2022-09-22 13:25 ` Will Deacon 2022-09-23 13:51 ` Shuai Xue 2022-09-23 13:51 ` Shuai Xue 2022-11-07 15:28 ` Will Deacon 2022-11-07 15:28 ` Will Deacon 2022-09-23 1:27 ` Yicong Yang 2022-09-23 1:27 ` Yicong Yang 2022-09-23 14:47 ` Shuai Xue 2022-09-23 14:47 ` Shuai Xue 2022-09-17 12:10 ` [PATCH v1 2/3] drivers/perf: add " Shuai Xue 2022-09-17 12:10 ` Shuai Xue 2022-09-22 15:58 ` Jonathan Cameron 2022-09-22 15:58 ` Jonathan Cameron 2022-09-22 17:32 ` Bjorn Helgaas 2022-09-22 17:32 ` Bjorn Helgaas 2022-09-23 3:35 ` Yicong Yang 2022-09-23 3:35 ` Yicong Yang 2022-09-23 10:56 ` Jonathan Cameron 2022-09-23 10:56 ` Jonathan Cameron 2022-09-23 13:45 ` Shuai Xue 2022-09-23 13:45 ` Shuai Xue 2022-09-23 15:54 ` Jonathan Cameron 2022-09-23 15:54 ` Jonathan Cameron 2022-09-26 13:31 ` Shuai Xue 2022-09-26 13:31 ` Shuai Xue 2022-09-26 14:32 ` Robin Murphy 2022-09-26 14:32 ` Robin Murphy 2022-09-26 17:18 ` Bjorn Helgaas 2022-09-26 17:18 ` Bjorn Helgaas 2022-09-27 5:13 ` Shuai Xue 2022-09-27 5:13 ` Shuai Xue 2022-09-27 10:04 ` Jonathan Cameron [this message] 2022-09-27 10:04 ` Jonathan Cameron 2022-09-27 10:14 ` Robin Murphy 2022-09-27 10:14 ` Robin Murphy 2022-09-27 12:49 ` Shuai Xue 2022-09-27 12:49 ` Shuai Xue 2022-09-27 13:39 ` Jonathan Cameron 2022-09-27 13:39 ` Jonathan Cameron 2022-09-27 12:29 ` Shuai Xue 2022-09-27 12:29 ` Shuai Xue 2022-09-27 10:03 ` Jonathan Cameron 2022-09-27 10:03 ` Jonathan Cameron 2022-09-22 17:36 ` Bjorn Helgaas 2022-09-22 17:36 ` Bjorn Helgaas 2022-09-23 14:46 ` Shuai Xue 2022-09-23 14:46 ` Shuai Xue 2022-09-23 18:51 ` Bjorn Helgaas 2022-09-23 18:51 ` Bjorn Helgaas 2022-09-27 6:01 ` Shuai Xue 2022-09-27 6:01 ` Shuai Xue 2022-09-23 3:30 ` Yicong Yang 2022-09-23 3:30 ` Yicong Yang 2022-09-23 15:43 ` Shuai Xue 2022-09-23 15:43 ` Shuai Xue 2022-09-24 8:00 ` Yicong Yang 2022-09-24 8:00 ` Yicong Yang 2022-09-26 11:39 ` Shuai Xue 2022-09-26 11:39 ` Shuai Xue 2022-09-17 12:10 ` [PATCH v1 3/3] MAINTAINERS: add maintainers for " Shuai Xue 2022-09-17 12:10 ` Shuai Xue 2023-04-10 3:16 ` [PATCH v2 0/3] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue 2023-04-10 3:16 ` Shuai Xue 2023-04-10 3:17 ` [PATCH v2 1/3] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue 2023-04-10 3:17 ` Shuai Xue 2023-04-10 3:17 ` [PATCH v2 2/3] drivers/perf: add " Shuai Xue 2023-04-10 3:17 ` Shuai Xue 2023-04-10 7:25 ` kernel test robot 2023-04-10 7:25 ` kernel test robot 2023-04-11 3:17 ` Baolin Wang 2023-04-11 3:17 ` Baolin Wang 2023-04-17 1:16 ` Shuai Xue 2023-04-17 1:16 ` Shuai Xue 2023-04-18 1:51 ` Baolin Wang 2023-04-18 1:51 ` Baolin Wang 2023-04-19 1:39 ` Shuai Xue 2023-04-19 1:39 ` Shuai Xue 2023-04-10 3:17 ` [PATCH v2 3/3] MAINTAINERS: add maintainers for " Shuai Xue 2023-04-10 3:17 ` Shuai Xue 2023-04-17 6:17 ` [PATCH v3 0/3] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue 2023-04-17 6:17 ` Shuai Xue 2023-04-17 6:17 ` [PATCH v3 1/3] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue 2023-04-17 6:17 ` Shuai Xue 2023-05-16 14:32 ` Jonathan Cameron 2023-05-16 14:32 ` Jonathan Cameron 2023-05-17 1:27 ` Shuai Xue 2023-05-17 1:27 ` Shuai Xue 2023-04-17 6:17 ` [PATCH v3 2/3] drivers/perf: add " Shuai Xue 2023-04-17 6:17 ` Shuai Xue 2023-04-18 23:30 ` Robin Murphy 2023-04-18 23:30 ` Robin Murphy 2023-04-27 6:33 ` Shuai Xue 2023-04-27 6:33 ` Shuai Xue 2023-05-09 2:02 ` Shuai Xue 2023-05-16 15:03 ` Jonathan Cameron 2023-05-16 15:03 ` Jonathan Cameron 2023-05-16 19:17 ` Bjorn Helgaas 2023-05-16 19:17 ` Bjorn Helgaas 2023-05-17 9:54 ` Jonathan Cameron 2023-05-17 9:54 ` Jonathan Cameron 2023-05-17 16:27 ` Bjorn Helgaas 2023-05-17 16:27 ` Bjorn Helgaas 2023-05-19 10:08 ` Shuai Xue 2023-05-19 10:08 ` Shuai Xue 2023-04-17 6:17 ` [PATCH v3 3/3] MAINTAINERS: add maintainers for " Shuai Xue 2023-04-17 6:17 ` Shuai Xue 2023-05-16 13:01 ` [PATCH v4 0/4] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue 2023-05-16 13:01 ` Shuai Xue 2023-05-16 13:01 ` [PATCH v4 1/4] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue 2023-05-16 13:01 ` Shuai Xue 2023-05-16 13:01 ` [PATCH v4 2/4] PCI: move Alibaba Vendor ID linux/pci_ids.h Shuai Xue 2023-05-16 13:01 ` Shuai Xue 2023-05-16 13:01 ` [PATCH v4 3/4] drivers/perf: add DesignWare PCIe PMU driver Shuai Xue 2023-05-16 13:01 ` Shuai Xue 2023-05-16 19:19 ` Bjorn Helgaas 2023-05-16 19:19 ` Bjorn Helgaas 2023-05-17 2:35 ` Shuai Xue 2023-05-17 2:35 ` Shuai Xue 2023-05-16 23:21 ` kernel test robot 2023-05-17 3:37 ` Shuai Xue 2023-05-17 3:37 ` Shuai Xue 2023-05-16 13:01 ` [PATCH v4 4/4] MAINTAINERS: add maintainers for " Shuai Xue 2023-05-16 13:01 ` Shuai Xue 2023-05-22 3:54 ` [PATCH v5 0/4] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue 2023-05-22 3:54 ` Shuai Xue 2023-05-22 14:28 ` Jonathan Cameron 2023-05-22 14:28 ` Jonathan Cameron 2023-05-23 2:57 ` Shuai Xue 2023-05-23 2:57 ` Shuai Xue 2023-05-22 3:54 ` [PATCH v5 1/4] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue 2023-05-22 3:54 ` Shuai Xue 2023-05-29 3:45 ` Baolin Wang 2023-05-29 3:45 ` Baolin Wang 2023-05-29 6:31 ` Shuai Xue 2023-05-29 6:31 ` Shuai Xue 2023-05-22 3:54 ` [PATCH v5 2/4] PCI: move Alibaba Vendor ID linux/pci_ids.h Shuai Xue 2023-05-22 3:54 ` Shuai Xue 2023-05-22 16:04 ` Bjorn Helgaas 2023-05-22 16:04 ` Bjorn Helgaas 2023-05-23 3:22 ` Shuai Xue 2023-05-23 3:22 ` Shuai Xue 2023-05-23 11:54 ` Bjorn Helgaas 2023-05-23 11:54 ` Bjorn Helgaas 2023-05-23 12:49 ` Shuai Xue 2023-05-23 12:49 ` Shuai Xue 2023-05-22 3:54 ` [PATCH v5 3/4] drivers/perf: add DesignWare PCIe PMU driver Shuai Xue 2023-05-22 3:54 ` Shuai Xue 2023-05-29 6:13 ` Baolin Wang 2023-05-29 6:13 ` Baolin Wang 2023-05-29 6:33 ` Shuai Xue 2023-05-29 6:33 ` Shuai Xue 2023-05-22 3:54 ` [PATCH v5 4/4] MAINTAINERS: add maintainers for " Shuai Xue 2023-05-22 3:54 ` Shuai Xue
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