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* [PATCH v6 0/2] arm64: dts: qcom: add dts for sa8540p-ride board
@ 2022-10-20  7:30 Parikshit Pareek
  2022-10-20  7:30 ` [PATCH v6 1/2] dt-bindings: arm: qcom: Document additional sa8540p device Parikshit Pareek
  2022-10-20  7:30 ` [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3) Parikshit Pareek
  0 siblings, 2 replies; 10+ messages in thread
From: Parikshit Pareek @ 2022-10-20  7:30 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
	Shazad Hussain, Brian Masney, Johan Hovold, Parikshit Pareek

This series introduces the Qualcomm sa8540p-ride automotive development
  board, also called as Qdrive-3 board.

  Change in v6:
  - Introduced the new dts for the board, rather than moving common nodes
    between this one and SA8295 ADP board into dtsi file(Bjorn)
  - Drop 'adp' term to imply it being unrelated with ADP board(Internal
    discussion with Bjorn)
  - Removed Acked-by(Krzysztof) tag in dt-binding document, due to content
    change.
  - Not including Reviewed-by(Krzysztof), because of the content change.

  Change in v5:
  - Moved the usb and ufs nodes from sa8540p-adp.dtsi file to respective
    board specific dts files: sa8295p-adp.dts and sa8540p-adp-ride.dts.
    Took inputs from Shazad Hussain in this regard(John)
  - Added more description of the board differences(John)
  - Not including Reviewed-by for Krzysztof, because of the new changes to
    be reviewed.
  - Removed Reported-by tag(John).

  Changes in v4:
   - Removed the ufs_card_hc node, as it is not mounted on Qdrive-3 board.
   - Removed usb_1 relared nodes, as usb1 doesn't have any port connected
     on Qdrive3 board.
   - Added Reported-by tag for Shazad(for ufs and usb_1 node removals)

  Changes in v3:
   - Added Acked-by tag (Krzysztof)
   - Renamed dtsi to sa8540p-adp.dtsi (John)
   - Removed copyright from sa8295-adp.dts and sa8295-adp.dtsi(John)
   - Added cover letter

  change in v2:
  - Make dt-binding patch as the first one in the patch set
  - Add , after year 2022, in the license header

  Initial version:
  - Move the common nodes to sa8540p-adp.dtsi, and create qrive-3 board
    specific file sa8540p-adp-ride.dts.


Parikshit Pareek (2):
  dt-bindings: arm: qcom: Document additional sa8540p device
  arm64: dts: qcom: add SA8540P ride(Qdrive-3)

 .../devicetree/bindings/arm/qcom.yaml         |   1 +
 arch/arm64/boot/dts/qcom/Makefile             |   1 +
 arch/arm64/boot/dts/qcom/sa8540p-ride.dts     | 309 ++++++++++++++++++
 3 files changed, 311 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sa8540p-ride.dts

-- 
2.17.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v6 1/2] dt-bindings: arm: qcom: Document additional sa8540p device
  2022-10-20  7:30 [PATCH v6 0/2] arm64: dts: qcom: add dts for sa8540p-ride board Parikshit Pareek
@ 2022-10-20  7:30 ` Parikshit Pareek
  2022-10-20 13:46   ` Krzysztof Kozlowski
  2022-10-20 16:33   ` Brian Masney
  2022-10-20  7:30 ` [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3) Parikshit Pareek
  1 sibling, 2 replies; 10+ messages in thread
From: Parikshit Pareek @ 2022-10-20  7:30 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
	Shazad Hussain, Brian Masney, Johan Hovold, Parikshit Pareek

Add the qdrive3 ride device to the valid device compatibles found on the
sa8540p platform.

Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 207e28260206..f12b1ff19337 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -687,6 +687,7 @@ properties:
       - items:
           - enum:
               - qcom,sa8295p-adp
+              - qcom,sa8540p-ride
           - const: qcom,sa8540p
 
       - items:
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3)
  2022-10-20  7:30 [PATCH v6 0/2] arm64: dts: qcom: add dts for sa8540p-ride board Parikshit Pareek
  2022-10-20  7:30 ` [PATCH v6 1/2] dt-bindings: arm: qcom: Document additional sa8540p device Parikshit Pareek
@ 2022-10-20  7:30 ` Parikshit Pareek
  2022-10-20 11:49   ` konrad.dybcio
                     ` (2 more replies)
  1 sibling, 3 replies; 10+ messages in thread
From: Parikshit Pareek @ 2022-10-20  7:30 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
	Shazad Hussain, Brian Masney, Johan Hovold, Parikshit Pareek

Introduce the Qualcomm SA8540P ride automotive platform, also known as
Qdrive-3 development board.

This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh
regulators, debug UART, PMICs, remoteprocs and USB.

The SA8540P ride contains four PM8450 PMICs.

Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
---
 arch/arm64/boot/dts/qcom/Makefile         |   1 +
 arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 309 ++++++++++++++++++++++
 2 files changed, 310 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sa8540p-ride.dts

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index b0558d3389e5..c89d44756791 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qrb5165-rb5.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sa8295p-adp.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sa8540p-ride.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1-lte.dtb
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
new file mode 100644
index 000000000000..0faf06625b05
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
@@ -0,0 +1,309 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/spmi/spmi.h>
+
+#include "sa8540p.dtsi"
+
+/ {
+	model = "Qualcomm SA8540P Ride";
+	compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
+
+	aliases {
+		serial0 = &qup2_uart17;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&apps_rsc {
+	pmm8540-a-regulators {
+		compatible = "qcom,pm8150-rpmh-regulators";
+		qcom,pmic-id = "a";
+
+		vreg_l3a: ldo3 {
+			regulator-name = "vreg_l3a";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1208000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l5a: ldo5 {
+			regulator-name = "vreg_l5a";
+			regulator-min-microvolt = <912000>;
+			regulator-max-microvolt = <912000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7a: ldo7 {
+			regulator-name = "vreg_l7a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l13a: ldo13 {
+			regulator-name = "vreg_l13a";
+			regulator-min-microvolt = <3072000>;
+			regulator-max-microvolt = <3072000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	pmm8540-c-regulators {
+		compatible = "qcom,pm8150-rpmh-regulators";
+		qcom,pmic-id = "c";
+
+		vreg_l1c: ldo1 {
+			regulator-name = "vreg_l1c";
+			regulator-min-microvolt = <912000>;
+			regulator-max-microvolt = <912000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2c: ldo2 {
+			regulator-name = "vreg_l2c";
+			regulator-min-microvolt = <3072000>;
+			regulator-max-microvolt = <3072000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3c: ldo3 {
+			regulator-name = "vreg_l3c";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l4c: ldo4 {
+			regulator-name = "vreg_l4c";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1208000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l6c: ldo6 {
+			regulator-name = "vreg_l6c";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l7c: ldo7 {
+			regulator-name = "vreg_l7c";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10c: ldo10 {
+			regulator-name = "vreg_l10c";
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2504000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l17c: ldo17 {
+			regulator-name = "vreg_l17c";
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2504000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			regulator-allow-set-load;
+		};
+	};
+
+	pmm8540-g-regulators {
+		compatible = "qcom,pm8150-rpmh-regulators";
+		qcom,pmic-id = "g";
+
+		vreg_l3g: ldo3 {
+			regulator-name = "vreg_l3g";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7g: ldo7 {
+			regulator-name = "vreg_l7g";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l8g: ldo8 {
+			regulator-name = "vreg_l8g";
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <880000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+};
+
+&qup2 {
+	status = "okay";
+};
+
+&qup2_uart17 {
+	compatible = "qcom,geni-debug-uart";
+	status = "okay";
+};
+
+&remoteproc_adsp {
+	firmware-name = "qcom/sa8540p/adsp.mbn";
+	status = "okay";
+};
+
+&remoteproc_nsp0 {
+	firmware-name = "qcom/sa8540p/cdsp.mbn";
+	status = "okay";
+};
+
+&remoteproc_nsp1 {
+	firmware-name = "qcom/sa8540p/cdsp1.mbn";
+	status = "okay";
+};
+
+&spmi_bus {
+	pm8450a: pmic@0 {
+		compatible = "qcom,pm8150", "qcom,spmi-pmic";
+		reg = <0x0 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pm8450a_gpios: gpio@c000 {
+			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
+			reg = <0xc000>;
+			gpio-controller;
+			gpio-ranges = <&pm8450a_gpios 0 0 10>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+
+	pm8450c: pmic@4 {
+		compatible = "qcom,pm8150", "qcom,spmi-pmic";
+		reg = <0x4 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pm8450c_gpios: gpio@c000 {
+			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
+			reg = <0xc000>;
+			gpio-controller;
+			gpio-ranges = <&pm8450c_gpios 0 0 10>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+
+	pm8450e: pmic@8 {
+		compatible = "qcom,pm8150", "qcom,spmi-pmic";
+		reg = <0x8 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pm8450e_gpios: gpio@c000 {
+			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
+			reg = <0xc000>;
+			gpio-controller;
+			gpio-ranges = <&pm8450e_gpios 0 0 10>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+
+	pm8450g: pmic@c {
+		compatible = "qcom,pm8150", "qcom,spmi-pmic";
+		reg = <0xc SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pm8450g_gpios: gpio@c000 {
+			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
+			reg = <0xc000>;
+			gpio-controller;
+			gpio-ranges = <&pm8450g_gpios 0 0 10>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+};
+
+&ufs_mem_hc {
+	reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
+
+	vcc-supply = <&vreg_l17c>;
+	vcc-max-microamp = <800000>;
+	vccq-supply = <&vreg_l6c>;
+	vccq-max-microamp = <900000>;
+
+	status = "okay";
+};
+
+&ufs_mem_phy {
+	vdda-phy-supply = <&vreg_l8g>;
+	vdda-pll-supply = <&vreg_l3g>;
+
+	status = "okay";
+};
+
+&usb_0 {
+	status = "okay";
+};
+
+&usb_0_dwc3 {
+	/* TODO: Define USB-C connector properly */
+	dr_mode = "peripheral";
+};
+
+&usb_0_hsphy {
+	vdda-pll-supply = <&vreg_l5a>;
+	vdda18-supply = <&vreg_l7a>;
+	vdda33-supply = <&vreg_l13a>;
+
+	status = "okay";
+};
+
+&usb_0_qmpphy {
+	vdda-phy-supply = <&vreg_l3a>;
+	vdda-pll-supply = <&vreg_l5a>;
+
+	status = "okay";
+};
+
+&usb_2_hsphy0 {
+	vdda-pll-supply = <&vreg_l5a>;
+	vdda18-supply = <&vreg_l7g>;
+	vdda33-supply = <&vreg_l13a>;
+
+	status = "okay";
+};
+
+&usb_2_qmpphy0 {
+	vdda-phy-supply = <&vreg_l3a>;
+	vdda-pll-supply = <&vreg_l5a>;
+
+	status = "okay";
+};
+
+&xo_board_clk {
+	clock-frequency = <38400000>;
+};
+
+/* PINCTRL */
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3)
  2022-10-20  7:30 ` [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3) Parikshit Pareek
@ 2022-10-20 11:49   ` konrad.dybcio
  2022-10-28  7:50     ` Parikshit Pareek
  2022-10-20 16:39   ` Brian Masney
  2022-11-02  7:35   ` Shazad Hussain
  2 siblings, 1 reply; 10+ messages in thread
From: konrad.dybcio @ 2022-10-20 11:49 UTC (permalink / raw)
  To: Parikshit Pareek
  Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel,
	Andrew Halaney, Shazad Hussain, Brian Masney, Johan Hovold

On 2022-10-20 09:30, Parikshit Pareek wrote:
> Introduce the Qualcomm SA8540P ride automotive platform, also known as
> Qdrive-3 development board.
> 
> This initial contribution supports SMP, CPUFreq, cluster idle, UFS, 
> RPMh
> regulators, debug UART, PMICs, remoteprocs and USB.
> 
> The SA8540P ride contains four PM8450 PMICs.
> 
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> ---

Hi!

[...[

> +		vreg_l3c: ldo3 {
> +			regulator-name = "vreg_l3c";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1200000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
Not sure if setting load is desired after recent rpmh regulator changes.

[...]

> +
> +&spmi_bus {
> +	pm8450a: pmic@0 {
> +		compatible = "qcom,pm8150", "qcom,spmi-pmic";
Please add a pm8450[aceg].dtsi instead, as other boards would probably 
like to
reuse this. Also, move the spmi.h inclusion there.

[...]

> +};
> +
> +/* PINCTRL */
Not sure if it's useful if there's nothing there for now.

Konrad

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v6 1/2] dt-bindings: arm: qcom: Document additional sa8540p device
  2022-10-20  7:30 ` [PATCH v6 1/2] dt-bindings: arm: qcom: Document additional sa8540p device Parikshit Pareek
@ 2022-10-20 13:46   ` Krzysztof Kozlowski
  2022-10-20 16:33   ` Brian Masney
  1 sibling, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-20 13:46 UTC (permalink / raw)
  To: Parikshit Pareek, Andy Gross, Bjorn Andersson, Konrad Dybcio,
	Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
	Shazad Hussain, Brian Masney, Johan Hovold

On 20/10/2022 03:30, Parikshit Pareek wrote:
> Add the qdrive3 ride device to the valid device compatibles found on the
> sa8540p platform.
> 
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v6 1/2] dt-bindings: arm: qcom: Document additional sa8540p device
  2022-10-20  7:30 ` [PATCH v6 1/2] dt-bindings: arm: qcom: Document additional sa8540p device Parikshit Pareek
  2022-10-20 13:46   ` Krzysztof Kozlowski
@ 2022-10-20 16:33   ` Brian Masney
  1 sibling, 0 replies; 10+ messages in thread
From: Brian Masney @ 2022-10-20 16:33 UTC (permalink / raw)
  To: Parikshit Pareek
  Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel,
	Andrew Halaney, Shazad Hussain, Johan Hovold

On Thu, Oct 20, 2022 at 01:00:35PM +0530, Parikshit Pareek wrote:
> Add the qdrive3 ride device to the valid device compatibles found on the
> sa8540p platform.
> 
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>

Reviewed-by: Brian Masney <bmasney@redhat.com>


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3)
  2022-10-20  7:30 ` [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3) Parikshit Pareek
  2022-10-20 11:49   ` konrad.dybcio
@ 2022-10-20 16:39   ` Brian Masney
  2022-11-02  7:35   ` Shazad Hussain
  2 siblings, 0 replies; 10+ messages in thread
From: Brian Masney @ 2022-10-20 16:39 UTC (permalink / raw)
  To: Parikshit Pareek
  Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
	Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel,
	Andrew Halaney, Shazad Hussain, Johan Hovold

On Thu, Oct 20, 2022 at 01:00:36PM +0530, Parikshit Pareek wrote:
> Introduce the Qualcomm SA8540P ride automotive platform, also known as
> Qdrive-3 development board.
> 
> This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh
> regulators, debug UART, PMICs, remoteprocs and USB.
> 
> The SA8540P ride contains four PM8450 PMICs.
> 
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>

With Konrad's requested changes:

Reviewed-by: Brian Masney <bmasney@redhat.com>
Tested-by: Brian Masney <bmasney@redhat.com>

After more research, I've verified that the board reboot issue that
I brought up in v5 is unrelated to the DTS, so no need to block merging
this. I'll post some more findings soon about the issue.

Brian


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3)
  2022-10-20 11:49   ` konrad.dybcio
@ 2022-10-28  7:50     ` Parikshit Pareek
  2022-10-28  8:28       ` Brian Masney
  0 siblings, 1 reply; 10+ messages in thread
From: Parikshit Pareek @ 2022-10-28  7:50 UTC (permalink / raw)
  To: konrad.dybcio
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
	linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
	Shazad Hussain, Brian Masney, Johan Hovold

On Thu, Oct 20, 2022 at 01:49:23PM +0200, konrad.dybcio@somainline.org wrote:
> On 2022-10-20 09:30, Parikshit Pareek wrote:
> > Introduce the Qualcomm SA8540P ride automotive platform, also known as
> > Qdrive-3 development board.
> > 
> > This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh
> > regulators, debug UART, PMICs, remoteprocs and USB.
> > 
> > The SA8540P ride contains four PM8450 PMICs.
> > 
> > Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> > ---
> 
> Hi!
> 
> [...[
> 
> > +		vreg_l3c: ldo3 {
> > +			regulator-name = "vreg_l3c";
> > +			regulator-min-microvolt = <1200000>;
> > +			regulator-max-microvolt = <1200000>;
> > +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> > +			regulator-allow-set-load;
> Not sure if setting load is desired after recent rpmh regulator changes.
May I know the exact patch being refered here?
> 
> [...]
> 
> > +
> > +&spmi_bus {
> > +	pm8450a: pmic@0 {
> > +		compatible = "qcom,pm8150", "qcom,spmi-pmic";
> Please add a pm8450[aceg].dtsi instead, as other boards would probably like
> to
> reuse this. Also, move the spmi.h inclusion there.
> 
> [...]
> 
> > +};
> > +
> > +/* PINCTRL */
> Not sure if it's useful if there's nothing there for now.
> 
> Konrad

Regards,
Parikshit Pareek


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3)
  2022-10-28  7:50     ` Parikshit Pareek
@ 2022-10-28  8:28       ` Brian Masney
  0 siblings, 0 replies; 10+ messages in thread
From: Brian Masney @ 2022-10-28  8:28 UTC (permalink / raw)
  To: Parikshit Pareek
  Cc: konrad.dybcio, Andy Gross, Bjorn Andersson, Rob Herring,
	Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel,
	Andrew Halaney, Shazad Hussain, Johan Hovold

On Fri, Oct 28, 2022 at 01:20:59PM +0530, Parikshit Pareek wrote:
> > > +		vreg_l3c: ldo3 {
> > > +			regulator-name = "vreg_l3c";
> > > +			regulator-min-microvolt = <1200000>;
> > > +			regulator-max-microvolt = <1200000>;
> > > +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> > > +			regulator-allow-set-load;
> > Not sure if setting load is desired after recent rpmh regulator changes.
>
> May I know the exact patch being refered here?

Hi Parikshit,

You now need to specify a regulator-allowed-modes. Here's some links
with more information:

https://lore.kernel.org/all/20220907204924.173030-1-ahalaney@redhat.com/
https://lore.kernel.org/all/20220824142229.RFT.v2.2.I6f77860e5cd98bf5c67208fa9edda4a08847c304@changeid/

Brian


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3)
  2022-10-20  7:30 ` [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3) Parikshit Pareek
  2022-10-20 11:49   ` konrad.dybcio
  2022-10-20 16:39   ` Brian Masney
@ 2022-11-02  7:35   ` Shazad Hussain
  2 siblings, 0 replies; 10+ messages in thread
From: Shazad Hussain @ 2022-11-02  7:35 UTC (permalink / raw)
  To: Parikshit Pareek, Andy Gross, Bjorn Andersson, Konrad Dybcio,
	Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, linux-kernel, Andrew Halaney,
	Brian Masney, Johan Hovold



On 10/20/2022 1:00 PM, Parikshit Pareek wrote:
> Introduce the Qualcomm SA8540P ride automotive platform, also known as
> Qdrive-3 development board.
> 
> This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh
> regulators, debug UART, PMICs, remoteprocs and USB.
> 
> The SA8540P ride contains four PM8450 PMICs.
> 
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> ---
>   arch/arm64/boot/dts/qcom/Makefile         |   1 +
>   arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 309 ++++++++++++++++++++++
>   2 files changed, 310 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index b0558d3389e5..c89d44756791 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= qrb5165-rb5.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= sa8295p-adp.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= sa8540p-ride.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-idp.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1-lte.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> new file mode 100644
> index 000000000000..0faf06625b05
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> @@ -0,0 +1,309 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2021, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include <dt-bindings/spmi/spmi.h>
> +
> +#include "sa8540p.dtsi"
> +
> +/ {
> +	model = "Qualcomm SA8540P Ride";
> +	compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
> +
> +	aliases {
> +		serial0 = &qup2_uart17;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +};
> +
> +&apps_rsc {
> +	pmm8540-a-regulators {
> +		compatible = "qcom,pm8150-rpmh-regulators";
> +		qcom,pmic-id = "a";
> +
> +		vreg_l3a: ldo3 {
> +			regulator-name = "vreg_l3a";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1208000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l5a: ldo5 {
> +			regulator-name = "vreg_l5a";
> +			regulator-min-microvolt = <912000>;
> +			regulator-max-microvolt = <912000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l7a: ldo7 {
> +			regulator-name = "vreg_l7a";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <1800000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l13a: ldo13 {
> +			regulator-name = "vreg_l13a";
> +			regulator-min-microvolt = <3072000>;
> +			regulator-max-microvolt = <3072000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +	};
> +
> +	pmm8540-c-regulators {
> +		compatible = "qcom,pm8150-rpmh-regulators";
> +		qcom,pmic-id = "c";
> +
> +		vreg_l1c: ldo1 {
> +			regulator-name = "vreg_l1c";
> +			regulator-min-microvolt = <912000>;
> +			regulator-max-microvolt = <912000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l2c: ldo2 {
> +			regulator-name = "vreg_l2c";
> +			regulator-min-microvolt = <3072000>;
> +			regulator-max-microvolt = <3072000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l3c: ldo3 {
> +			regulator-name = "vreg_l3c";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1200000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +		};
As we don't have ufs_card_hc for ride platform, we can remove vreg_l3c.
> +
> +		vreg_l4c: ldo4 {
> +			regulator-name = "vreg_l4c";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1208000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l6c: ldo6 {
> +			regulator-name = "vreg_l6c";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1200000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +		};
> +
> +		vreg_l7c: ldo7 {
> +			regulator-name = "vreg_l7c";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <1800000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l10c: ldo10 {
> +			regulator-name = "vreg_l10c";
> +			regulator-min-microvolt = <2504000>;
> +			regulator-max-microvolt = <2504000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +		};
Similarly we can remove this vreg_l10c.
> +
> +		vreg_l17c: ldo17 {
> +			regulator-name = "vreg_l17c";
> +			regulator-min-microvolt = <2504000>;
> +			regulator-max-microvolt = <2504000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +			regulator-allow-set-load;
> +		};
> +	};
> +
> +	pmm8540-g-regulators {
> +		compatible = "qcom,pm8150-rpmh-regulators";
> +		qcom,pmic-id = "g";
> +
> +		vreg_l3g: ldo3 {
> +			regulator-name = "vreg_l3g";
> +			regulator-min-microvolt = <1200000>;
> +			regulator-max-microvolt = <1200000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l7g: ldo7 {
> +			regulator-name = "vreg_l7g";
> +			regulator-min-microvolt = <1800000>;
> +			regulator-max-microvolt = <1800000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +
> +		vreg_l8g: ldo8 {
> +			regulator-name = "vreg_l8g";
> +			regulator-min-microvolt = <880000>;
> +			regulator-max-microvolt = <880000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
> +	};
> +};
> +
> +&qup2 {
> +	status = "okay";
> +};
> +
> +&qup2_uart17 {
> +	compatible = "qcom,geni-debug-uart";
> +	status = "okay";
> +};
> +
> +&remoteproc_adsp {
> +	firmware-name = "qcom/sa8540p/adsp.mbn";
> +	status = "okay";
> +};
> +
> +&remoteproc_nsp0 {
> +	firmware-name = "qcom/sa8540p/cdsp.mbn";
> +	status = "okay";
> +};
> +
> +&remoteproc_nsp1 {
> +	firmware-name = "qcom/sa8540p/cdsp1.mbn";
> +	status = "okay";
> +};
> +
> +&spmi_bus {
> +	pm8450a: pmic@0 {
> +		compatible = "qcom,pm8150", "qcom,spmi-pmic";
> +		reg = <0x0 SPMI_USID>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		pm8450a_gpios: gpio@c000 {
> +			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> +			reg = <0xc000>;
> +			gpio-controller;
> +			gpio-ranges = <&pm8450a_gpios 0 0 10>;
> +			#gpio-cells = <2>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +		};
> +	};
> +
> +	pm8450c: pmic@4 {
> +		compatible = "qcom,pm8150", "qcom,spmi-pmic";
> +		reg = <0x4 SPMI_USID>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		pm8450c_gpios: gpio@c000 {
> +			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> +			reg = <0xc000>;
> +			gpio-controller;
> +			gpio-ranges = <&pm8450c_gpios 0 0 10>;
> +			#gpio-cells = <2>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +		};
> +	};
> +
> +	pm8450e: pmic@8 {
> +		compatible = "qcom,pm8150", "qcom,spmi-pmic";
> +		reg = <0x8 SPMI_USID>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		pm8450e_gpios: gpio@c000 {
> +			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> +			reg = <0xc000>;
> +			gpio-controller;
> +			gpio-ranges = <&pm8450e_gpios 0 0 10>;
> +			#gpio-cells = <2>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +		};
> +	};
> +
> +	pm8450g: pmic@c {
> +		compatible = "qcom,pm8150", "qcom,spmi-pmic";
> +		reg = <0xc SPMI_USID>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		pm8450g_gpios: gpio@c000 {
> +			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> +			reg = <0xc000>;
> +			gpio-controller;
> +			gpio-ranges = <&pm8450g_gpios 0 0 10>;
> +			#gpio-cells = <2>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +		};
> +	};
> +};
> +
> +&ufs_mem_hc {
> +	reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
> +
> +	vcc-supply = <&vreg_l17c>;
> +	vcc-max-microamp = <800000>;
> +	vccq-supply = <&vreg_l6c>;
> +	vccq-max-microamp = <900000>;
> +
> +	status = "okay";
> +};
> +
> +&ufs_mem_phy {
> +	vdda-phy-supply = <&vreg_l8g>;
> +	vdda-pll-supply = <&vreg_l3g>;
> +
> +	status = "okay";
> +};
> +
> +&usb_0 {
> +	status = "okay";
> +};
> +
> +&usb_0_dwc3 {
> +	/* TODO: Define USB-C connector properly */
> +	dr_mode = "peripheral";
> +};
> +
> +&usb_0_hsphy {
> +	vdda-pll-supply = <&vreg_l5a>;
> +	vdda18-supply = <&vreg_l7a>;
> +	vdda33-supply = <&vreg_l13a>;
> +
> +	status = "okay";
> +};
> +
> +&usb_0_qmpphy {
> +	vdda-phy-supply = <&vreg_l3a>;
> +	vdda-pll-supply = <&vreg_l5a>;
> +
> +	status = "okay";
> +};
> +
> +&usb_2_hsphy0 {
> +	vdda-pll-supply = <&vreg_l5a>;
> +	vdda18-supply = <&vreg_l7g>;
> +	vdda33-supply = <&vreg_l13a>;
> +
> +	status = "okay";
> +};
> +
> +&usb_2_qmpphy0 {
> +	vdda-phy-supply = <&vreg_l3a>;
> +	vdda-pll-supply = <&vreg_l5a>;
> +
> +	status = "okay";
> +};
> +
> +&xo_board_clk {
> +	clock-frequency = <38400000>;
> +};
> +
> +/* PINCTRL */

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2022-11-02  7:35 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-20  7:30 [PATCH v6 0/2] arm64: dts: qcom: add dts for sa8540p-ride board Parikshit Pareek
2022-10-20  7:30 ` [PATCH v6 1/2] dt-bindings: arm: qcom: Document additional sa8540p device Parikshit Pareek
2022-10-20 13:46   ` Krzysztof Kozlowski
2022-10-20 16:33   ` Brian Masney
2022-10-20  7:30 ` [PATCH v6 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3) Parikshit Pareek
2022-10-20 11:49   ` konrad.dybcio
2022-10-28  7:50     ` Parikshit Pareek
2022-10-28  8:28       ` Brian Masney
2022-10-20 16:39   ` Brian Masney
2022-11-02  7:35   ` Shazad Hussain

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