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From: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Alistair.Francis@wdc.com, palmer@dabbelt.com,
	bin.meng@windriver.com, richard.henderson@linaro.org,
	lzw194868@alibaba-inc.com,
	LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: [RFC PATCH 0/3] Fix some TCG RISC-V backend bugs
Date: Thu, 20 Oct 2022 18:41:51 +0800	[thread overview]
Message-ID: <20221020104154.4276-1-zhiwei_liu@linux.alibaba.com> (raw)

This patch set fix some bugs in RISC-V backend. It includes:
1. guest regiser using bug in tcg_out_qemu_ld and tcg_out_qemu_st
2. immediate range bug in tcg_out_opc_imm
3. a wrong optimization in tcg_out_addsub2

After this patch set, I can run the 400.perlbench case(spec2006-simple). Besides,
it seems that we can also run RISU on qemu-aarch64(risc-v) now.

I try to run RISU on qemu-aarch64(x86) and qemu-aarch64(risc-v). But this caused
an segment fault. And it's confusing that RISU running on two qemu-aarch64(x86-64)
also caused a segment fault.

LIU Zhiwei (3):
  tcg/riscv: Fix base regsiter for qemu_ld/st
  tcg/riscv: Fix tcg_out_opc_imm when imm exceeds
  tcg/riscv: Remove a wrong optimization for addsub2

 tcg/riscv/tcg-target.c.inc | 35 +++++++++++++++++++++++++++--------
 1 file changed, 27 insertions(+), 8 deletions(-)

-- 
2.25.1



             reply	other threads:[~2022-10-20 11:04 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-20 10:41 LIU Zhiwei [this message]
2022-10-20 10:41 ` [RFC PATCH 1/3] tcg/riscv: Fix base regsiter for qemu_ld/st LIU Zhiwei
2022-10-20 11:18   ` Richard Henderson
2022-10-20 11:42     ` LIU Zhiwei
2022-10-20 12:01       ` Richard Henderson
2022-10-20 11:26   ` Philippe Mathieu-Daudé
2022-10-20 11:44     ` LIU Zhiwei
2022-10-20 10:41 ` [RFC PATCH 2/3] tcg/riscv: Fix tcg_out_opc_imm when imm exceeds LIU Zhiwei
2022-10-20 11:22   ` Richard Henderson
2022-10-20 12:42     ` LIU Zhiwei
2022-10-21  2:57     ` LIU Zhiwei
2022-10-21  4:29       ` Richard Henderson
2022-10-20 10:41 ` [RFC PATCH 3/3] tcg/riscv: Remove a wrong optimization for addsub2 LIU Zhiwei
2022-10-20 11:31   ` Richard Henderson
2022-10-20 12:39     ` LIU Zhiwei

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