* [PATCH 5.10.y-cip 01/12] mtd: hyperbus: Make hyperbus_unregister_device() return void
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 02/12] mtd: hyperbus: rpc-if: Fix RPM imbalance in probe error path Biju Das
` (12 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
From: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
commit 0c90466a7985d39355f743e9cd2139da3e86c4d8 upstream.
The only thing that could theoretically fail in that function is
mtd_device_unregister(). However it's not supposed to fail and when
used correctly it doesn't. So wail loudly if it does anyhow.
This matches how other drivers (e.g. nand/raw/nandsim.c) use
mtd_device_unregister().
This is a preparation for making platform remove callbacks return void.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220603210758.148493-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/mtd/hyperbus/hbmc-am654.c | 6 +++---
drivers/mtd/hyperbus/hyperbus-core.c | 8 ++------
drivers/mtd/hyperbus/rpc-if.c | 5 +++--
include/linux/mtd/hyperbus.h | 4 +---
4 files changed, 9 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/hyperbus/hbmc-am654.c b/drivers/mtd/hyperbus/hbmc-am654.c
index a3439b791eeb..a6161ce340d4 100644
--- a/drivers/mtd/hyperbus/hbmc-am654.c
+++ b/drivers/mtd/hyperbus/hbmc-am654.c
@@ -233,16 +233,16 @@ static int am654_hbmc_remove(struct platform_device *pdev)
{
struct am654_hbmc_priv *priv = platform_get_drvdata(pdev);
struct am654_hbmc_device_priv *dev_priv = priv->hbdev.priv;
- int ret;
- ret = hyperbus_unregister_device(&priv->hbdev);
+ hyperbus_unregister_device(&priv->hbdev);
+
if (priv->mux_ctrl)
mux_control_deselect(priv->mux_ctrl);
if (dev_priv->rx_chan)
dma_release_channel(dev_priv->rx_chan);
- return ret;
+ return 0;
}
static const struct of_device_id am654_hbmc_dt_ids[] = {
diff --git a/drivers/mtd/hyperbus/hyperbus-core.c b/drivers/mtd/hyperbus/hyperbus-core.c
index 2f9fc4e17d53..4d8047d43e48 100644
--- a/drivers/mtd/hyperbus/hyperbus-core.c
+++ b/drivers/mtd/hyperbus/hyperbus-core.c
@@ -126,16 +126,12 @@ int hyperbus_register_device(struct hyperbus_device *hbdev)
}
EXPORT_SYMBOL_GPL(hyperbus_register_device);
-int hyperbus_unregister_device(struct hyperbus_device *hbdev)
+void hyperbus_unregister_device(struct hyperbus_device *hbdev)
{
- int ret = 0;
-
if (hbdev && hbdev->mtd) {
- ret = mtd_device_unregister(hbdev->mtd);
+ WARN_ON(mtd_device_unregister(hbdev->mtd));
map_destroy(hbdev->mtd);
}
-
- return ret;
}
EXPORT_SYMBOL_GPL(hyperbus_unregister_device);
diff --git a/drivers/mtd/hyperbus/rpc-if.c b/drivers/mtd/hyperbus/rpc-if.c
index 6e08ec1d4f09..15a0be63ede1 100644
--- a/drivers/mtd/hyperbus/rpc-if.c
+++ b/drivers/mtd/hyperbus/rpc-if.c
@@ -153,11 +153,12 @@ static int rpcif_hb_probe(struct platform_device *pdev)
static int rpcif_hb_remove(struct platform_device *pdev)
{
struct rpcif_hyperbus *hyperbus = platform_get_drvdata(pdev);
- int error = hyperbus_unregister_device(&hyperbus->hbdev);
+
+ hyperbus_unregister_device(&hyperbus->hbdev);
rpcif_disable_rpm(&hyperbus->rpc);
- return error;
+ return 0;
}
static struct platform_driver rpcif_platform_driver = {
diff --git a/include/linux/mtd/hyperbus.h b/include/linux/mtd/hyperbus.h
index 0ce612428aea..bb6b7121a542 100644
--- a/include/linux/mtd/hyperbus.h
+++ b/include/linux/mtd/hyperbus.h
@@ -89,9 +89,7 @@ int hyperbus_register_device(struct hyperbus_device *hbdev);
/**
* hyperbus_unregister_device - deregister HyperBus slave memory device
* @hbdev: hyperbus_device to be unregistered
- *
- * Return: 0 for success, others for failure.
*/
-int hyperbus_unregister_device(struct hyperbus_device *hbdev);
+void hyperbus_unregister_device(struct hyperbus_device *hbdev);
#endif /* __LINUX_MTD_HYPERBUS_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 02/12] mtd: hyperbus: rpc-if: Fix RPM imbalance in probe error path
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 01/12] mtd: hyperbus: Make hyperbus_unregister_device() return void Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 03/12] arm64: dts: renesas: Adjust whitespace around '{' Biju Das
` (11 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
From: Geert Uytterhoeven <geert+renesas@glider.be>
commit c223a38d62e57aa60a890ea7247e3c58a54478e6 upstream.
If rpcif_hw_init() fails, Runtime PM is left enabled.
Fixes: b04cc0d912eb80d3 ("memory: renesas-rpc-if: Add support for RZ/G2L")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/f3070e1af480cb252ae183d479a593dbbf947685.1655457790.git.geert+renesas@glider.be
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/mtd/hyperbus/rpc-if.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/hyperbus/rpc-if.c b/drivers/mtd/hyperbus/rpc-if.c
index 15a0be63ede1..d00d30243403 100644
--- a/drivers/mtd/hyperbus/rpc-if.c
+++ b/drivers/mtd/hyperbus/rpc-if.c
@@ -134,7 +134,7 @@ static int rpcif_hb_probe(struct platform_device *pdev)
error = rpcif_hw_init(&hyperbus->rpc, true);
if (error)
- return error;
+ goto out_disable_rpm;
hyperbus->hbdev.map.size = hyperbus->rpc.size;
hyperbus->hbdev.map.virt = hyperbus->rpc.dirmap;
@@ -145,8 +145,12 @@ static int rpcif_hb_probe(struct platform_device *pdev)
hyperbus->hbdev.np = of_get_next_child(pdev->dev.parent->of_node, NULL);
error = hyperbus_register_device(&hyperbus->hbdev);
if (error)
- rpcif_disable_rpm(&hyperbus->rpc);
+ goto out_disable_rpm;
+
+ return 0;
+out_disable_rpm:
+ rpcif_disable_rpm(&hyperbus->rpc);
return error;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 03/12] arm64: dts: renesas: Adjust whitespace around '{'
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 01/12] mtd: hyperbus: Make hyperbus_unregister_device() return void Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 02/12] mtd: hyperbus: rpc-if: Fix RPM imbalance in probe error path Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 04/12] arm64: dts: renesas: r9a07g043: Add DMA support to RSPI Biju Das
` (10 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 4ebf297b93403897668ee003427a9b780023c298 upstream.
Drop extra space around the '{' sign. No functional changes (same DTB).
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220916100251.20329-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 2 +-
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 2 +-
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index 40201a16d653..313424b00f4b 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -613,7 +613,7 @@ gic: interrupt-controller@11900000 {
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
};
- sdhi0: mmc@11c00000 {
+ sdhi0: mmc@11c00000 {
compatible = "renesas,sdhi-r9a07g043",
"renesas,rcar-gen3-sdhi";
reg = <0x0 0x11c00000 0 0x10000>;
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 63bf5bb62554..a5f284540e20 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -648,7 +648,7 @@ gic: interrupt-controller@11900000 {
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
};
- sdhi0: mmc@11c00000 {
+ sdhi0: mmc@11c00000 {
compatible = "renesas,sdhi-r9a07g044",
"renesas,rcar-gen3-sdhi";
reg = <0x0 0x11c00000 0 0x10000>;
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index c30cac4cf434..3671b05e51f7 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -659,7 +659,7 @@ gic: interrupt-controller@11900000 {
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
};
- sdhi0: mmc@11c00000 {
+ sdhi0: mmc@11c00000 {
compatible = "renesas,sdhi-r9a07g054",
"renesas,rcar-gen3-sdhi";
reg = <0x0 0x11c00000 0 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 04/12] arm64: dts: renesas: r9a07g043: Add DMA support to RSPI
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (2 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 03/12] arm64: dts: renesas: Adjust whitespace around '{' Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 05/12] arm64: dts: renesas: r9a07g044: " Biju Das
` (9 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
commit 200d8e0119fd8fef78fa1c6441ef9eb2c1570984 upstream.
Add DMA properties to RSPI nodes to support DMA operation.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220728122312.189766-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index 313424b00f4b..2467e00e49c8 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -196,6 +196,8 @@ spi0: spi@1004ac00 {
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD R9A07G043_RSPI0_CLKB>;
resets = <&cpg R9A07G043_RSPI0_RST>;
+ dmas = <&dmac 0x2e95>, <&dmac 0x2e96>;
+ dma-names = "tx", "rx";
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
@@ -212,6 +214,8 @@ spi1: spi@1004b000 {
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD R9A07G043_RSPI1_CLKB>;
resets = <&cpg R9A07G043_RSPI1_RST>;
+ dmas = <&dmac 0x2e99>, <&dmac 0x2e9a>;
+ dma-names = "tx", "rx";
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
@@ -228,6 +232,8 @@ spi2: spi@1004b400 {
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD R9A07G043_RSPI2_CLKB>;
resets = <&cpg R9A07G043_RSPI2_RST>;
+ dmas = <&dmac 0x2e9d>, <&dmac 0x2e9e>;
+ dma-names = "tx", "rx";
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 05/12] arm64: dts: renesas: r9a07g044: Add DMA support to RSPI
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (3 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 04/12] arm64: dts: renesas: r9a07g043: Add DMA support to RSPI Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 06/12] arm64: dts: renesas: r9a07g054: " Biju Das
` (8 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
commit a43026b811700455f36bc788e480921f7d1d3e95 upstream.
Add DMA properties to RSPI nodes to support DMA operation.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220728122312.189766-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index a5f284540e20..6b13d3b8e209 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -217,6 +217,8 @@ spi0: spi@1004ac00 {
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD R9A07G044_RSPI0_CLKB>;
resets = <&cpg R9A07G044_RSPI0_RST>;
+ dmas = <&dmac 0x2e95>, <&dmac 0x2e96>;
+ dma-names = "tx", "rx";
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
@@ -233,6 +235,8 @@ spi1: spi@1004b000 {
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD R9A07G044_RSPI1_CLKB>;
resets = <&cpg R9A07G044_RSPI1_RST>;
+ dmas = <&dmac 0x2e99>, <&dmac 0x2e9a>;
+ dma-names = "tx", "rx";
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
@@ -249,6 +253,8 @@ spi2: spi@1004b400 {
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD R9A07G044_RSPI2_CLKB>;
resets = <&cpg R9A07G044_RSPI2_RST>;
+ dmas = <&dmac 0x2e9d>, <&dmac 0x2e9e>;
+ dma-names = "tx", "rx";
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 06/12] arm64: dts: renesas: r9a07g054: Add DMA support to RSPI
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (4 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 05/12] arm64: dts: renesas: r9a07g044: " Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 07/12] arm64: dts: renesas: r9a07g043: Fix audio clk node names Biju Das
` (7 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
commit 34fac90f361f14aad0d0bfeabba9211fd584a963 upstream.
Add DMA properties to RSPI nodes to support DMA operation.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220728122312.189766-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 3671b05e51f7..1edff6bce3ca 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -217,6 +217,8 @@ spi0: spi@1004ac00 {
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD R9A07G054_RSPI0_CLKB>;
resets = <&cpg R9A07G054_RSPI0_RST>;
+ dmas = <&dmac 0x2e95>, <&dmac 0x2e96>;
+ dma-names = "tx", "rx";
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
@@ -233,6 +235,8 @@ spi1: spi@1004b000 {
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD R9A07G054_RSPI1_CLKB>;
resets = <&cpg R9A07G054_RSPI1_RST>;
+ dmas = <&dmac 0x2e99>, <&dmac 0x2e9a>;
+ dma-names = "tx", "rx";
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
@@ -249,6 +253,8 @@ spi2: spi@1004b400 {
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD R9A07G054_RSPI2_CLKB>;
resets = <&cpg R9A07G054_RSPI2_RST>;
+ dmas = <&dmac 0x2e9d>, <&dmac 0x2e9e>;
+ dma-names = "tx", "rx";
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 07/12] arm64: dts: renesas: r9a07g043: Fix audio clk node names
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (5 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 06/12] arm64: dts: renesas: r9a07g054: " Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 08/12] arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types Biju Das
` (6 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
commit 56f0a373f0a8f9e4a783aa600c11f00ca33398e5 upstream.
Replace the clk node names audio-clk{1,2} with audio{1,2}-clk as per
the device tree specification.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220729084527.388023-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index 2467e00e49c8..f0ed619ec17a 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -13,14 +13,14 @@ / {
#address-cells = <2>;
#size-cells = <2>;
- audio_clk1: audio-clk1 {
+ audio_clk1: audio1-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by boards that provide it */
clock-frequency = <0>;
};
- audio_clk2: audio-clk2 {
+ audio_clk2: audio2-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by boards that provide it */
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 08/12] arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (6 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 07/12] arm64: dts: renesas: r9a07g043: Fix audio clk node names Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 09/12] arm64: dts: renesas: r9a07g054: " Biju Das
` (5 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
commit f3b7bc89c97b98aa6f157d5f296695af8940a5ac upstream.
As per the latest RZ/G2L Hardware User's Manual (Rev.1.10 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: f9a2adcc9e908907 ("arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes")
Link: https://lore.kernel.org/r/20220802101534.1401342-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 6b13d3b8e209..e8ad84c55fca 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -356,8 +356,8 @@ sci0: serial@1004d000 {
compatible = "renesas,r9a07g044-sci", "renesas,sci";
reg = <0 0x1004d000 0 0x400>;
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 406 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 407 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei";
clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>;
@@ -371,8 +371,8 @@ sci1: serial@1004d400 {
compatible = "renesas,r9a07g044-sci", "renesas,sci";
reg = <0 0x1004d400 0 0x400>;
interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei";
clocks = <&cpg CPG_MOD R9A07G044_SCI1_CLKP>;
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 09/12] arm64: dts: renesas: r9a07g054: Fix SCI{Rx,Tx} interrupt types
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (7 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 08/12] arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 10/12] arm64: dts: renesas: r9a07g043: " Biju Das
` (4 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
commit 13dec051c7f139eef345c55a60941843e72128f1 upstream.
As per the RZ/V2L Hardware User's Manual (Rev.1.00 Nov, 2021),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: 7c2b8198f4f321df ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Link: https://lore.kernel.org/r/20220802101534.1401342-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 1edff6bce3ca..3d225ab6ad35 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -361,8 +361,8 @@ sci0: serial@1004d000 {
compatible = "renesas,r9a07g054-sci", "renesas,sci";
reg = <0 0x1004d000 0 0x400>;
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 406 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 407 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei";
clocks = <&cpg CPG_MOD R9A07G054_SCI0_CLKP>;
@@ -376,8 +376,8 @@ sci1: serial@1004d400 {
compatible = "renesas,r9a07g054-sci", "renesas,sci";
reg = <0 0x1004d400 0 0x400>;
interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei";
clocks = <&cpg CPG_MOD R9A07G054_SCI1_CLKP>;
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 10/12] arm64: dts: renesas: r9a07g043: Fix SCI{Rx,Tx} interrupt types
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (8 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 09/12] arm64: dts: renesas: r9a07g054: " Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 11/12] clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info Biju Das
` (3 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
commit 72a482dbaec4b9e4d54b81be6bdb8c016fd2f4bd upstream.
As per the RZ/G2UL Hardware User's Manual (Rev.1.00 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: cf40c9689e5109bf ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC")
Link: https://lore.kernel.org/r/20220802101534.1401342-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index f0ed619ec17a..689aa4ba416b 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -340,8 +340,8 @@ sci0: serial@1004d000 {
compatible = "renesas,r9a07g043-sci", "renesas,sci";
reg = <0 0x1004d000 0 0x400>;
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 406 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 407 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei";
clocks = <&cpg CPG_MOD R9A07G043_SCI0_CLKP>;
@@ -355,8 +355,8 @@ sci1: serial@1004d400 {
compatible = "renesas,r9a07g043-sci", "renesas,sci";
reg = <0 0x1004d400 0 0x400>;
interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei";
clocks = <&cpg CPG_MOD R9A07G043_SCI1_CLKP>;
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 11/12] clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (9 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 10/12] arm64: dts: renesas: r9a07g043: " Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-25 14:41 ` [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support Biju Das
` (2 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
commit 57746e993442b9e143a262623e1da6c908d782e3 upstream.
Add conditional compilation for struct r9a07g044_cpg_info, so the
compiler won't allocate any memory for this variable in case
CONFIG_CLK_R9A07G044 is disabled.
Reported-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220804082605.157269-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/clk/renesas/r9a07g044-cpg.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c
index df9d5d91e065..518f00d86782 100644
--- a/drivers/clk/renesas/r9a07g044-cpg.c
+++ b/drivers/clk/renesas/r9a07g044-cpg.c
@@ -357,6 +357,7 @@ static const unsigned int r9a07g044_crit_mod_clks[] __initconst = {
MOD_CLK_BASE + R9A07G044_DMAC_ACLK,
};
+#ifdef CONFIG_CLK_R9A07G044
const struct rzg2l_cpg_info r9a07g044_cpg_info = {
/* Core Clocks */
.core_clks = core_clks.common,
@@ -377,6 +378,7 @@ const struct rzg2l_cpg_info r9a07g044_cpg_info = {
.resets = r9a07g044_resets,
.num_resets = R9A07G044_TSU_PRESETN + 1, /* Last reset ID + 1 */
};
+#endif
#ifdef CONFIG_CLK_R9A07G054
const struct rzg2l_cpg_info r9a07g054_cpg_info = {
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (10 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 11/12] clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info Biju Das
@ 2022-10-25 14:41 ` Biju Das
2022-10-26 8:54 ` nobuhiro1.iwamatsu
2022-10-26 8:40 ` [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Pavel Machek
2022-10-26 9:19 ` nobuhiro1.iwamatsu
13 siblings, 1 reply; 20+ messages in thread
From: Biju Das @ 2022-10-25 14:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Chris Paterson, Biju Das
commit 1089877ada8d2da5f173922f1061ccfe721ebf56 upstream.
EMAC IP found on RZ/G2L Gb ethernet supports MII interface.
This patch adds support for selecting MII interface mode.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/20220914192604.265859-1-biju.das.jz@bp.renesas.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 8 ++++++++
drivers/net/ethernet/renesas/ravb_main.c | 8 +++++++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h
index 0b5801f7e961..76ae3b5c568e 100644
--- a/drivers/net/ethernet/renesas/ravb.h
+++ b/drivers/net/ethernet/renesas/ravb.h
@@ -189,6 +189,7 @@ enum ravb_reg {
PSR = 0x0528,
PIPR = 0x052c,
CXR31 = 0x0530, /* RZ/G2L only */
+ CXR35 = 0x0540, /* RZ/G2L only */
MPR = 0x0558,
PFTCR = 0x055c,
PFRCR = 0x0560,
@@ -965,6 +966,13 @@ enum CXR31_BIT {
CXR31_SEL_LINK1 = 0x00000008,
};
+enum CXR35_BIT {
+ CXR35_SEL_XMII = 0x00000003,
+ CXR35_SEL_XMII_RGMII = 0x00000000,
+ CXR35_SEL_XMII_MII = 0x00000002,
+ CXR35_HALFCYC_CLKSW = 0xffff0000,
+};
+
enum CSR0_BIT {
CSR0_TPE = 0x00000010,
CSR0_RPE = 0x00000020,
diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
index ea76fd98a767..bc259105a55b 100644
--- a/drivers/net/ethernet/renesas/ravb_main.c
+++ b/drivers/net/ethernet/renesas/ravb_main.c
@@ -537,7 +537,13 @@ static void ravb_emac_init_gbeth(struct net_device *ndev)
/* E-MAC interrupt enable register */
ravb_write(ndev, ECSIPR_ICDIP, ECSIPR);
- ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, CXR31_SEL_LINK0);
+ if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {
+ ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, 0);
+ ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII, CXR35);
+ } else {
+ ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1,
+ CXR31_SEL_LINK0);
+ }
}
static void ravb_emac_init_rcar(struct net_device *ndev)
--
2.25.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* RE: [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support
2022-10-25 14:41 ` [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support Biju Das
@ 2022-10-26 8:54 ` nobuhiro1.iwamatsu
2022-10-26 9:09 ` Biju Das
0 siblings, 1 reply; 20+ messages in thread
From: nobuhiro1.iwamatsu @ 2022-10-26 8:54 UTC (permalink / raw)
To: biju.das.jz, cip-dev, pavel; +Cc: chris.paterson2, biju.das
Hi Biju,
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: Tuesday, October 25, 2022 11:42 PM
> To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯Ａ
> ＣＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek
> <pavel@denx.de>
> Cc: Chris Paterson <chris.paterson2@renesas.com>; Biju Das
> <biju.das@bp.renesas.com>
> Subject: [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support
>
> commit 1089877ada8d2da5f173922f1061ccfe721ebf56 upstream.
>
> EMAC IP found on RZ/G2L Gb ethernet supports MII interface.
> This patch adds support for selecting MII interface mode.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
> Link:
> https://lore.kernel.org/r/20220914192604.265859-1-biju.das.jz@bp.renesas.c
> om
> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> drivers/net/ethernet/renesas/ravb.h | 8 ++++++++
> drivers/net/ethernet/renesas/ravb_main.c | 8 +++++++-
> 2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/renesas/ravb.h
> b/drivers/net/ethernet/renesas/ravb.h
> index 0b5801f7e961..76ae3b5c568e 100644
> --- a/drivers/net/ethernet/renesas/ravb.h
> +++ b/drivers/net/ethernet/renesas/ravb.h
> @@ -189,6 +189,7 @@ enum ravb_reg {
> PSR = 0x0528,
> PIPR = 0x052c,
> CXR31 = 0x0530, /* RZ/G2L only */
> + CXR35 = 0x0540, /* RZ/G2L only */
> MPR = 0x0558,
> PFTCR = 0x055c,
> PFRCR = 0x0560,
> @@ -965,6 +966,13 @@ enum CXR31_BIT {
> CXR31_SEL_LINK1 = 0x00000008,
> };
>
> +enum CXR35_BIT {
> + CXR35_SEL_XMII = 0x00000003,
> + CXR35_SEL_XMII_RGMII = 0x00000000,
> + CXR35_SEL_XMII_MII = 0x00000002,
> + CXR35_HALFCYC_CLKSW = 0xffff0000,
> +};
> +
> enum CSR0_BIT {
> CSR0_TPE = 0x00000010,
> CSR0_RPE = 0x00000020,
> diff --git a/drivers/net/ethernet/renesas/ravb_main.c
> b/drivers/net/ethernet/renesas/ravb_main.c
> index ea76fd98a767..bc259105a55b 100644
> --- a/drivers/net/ethernet/renesas/ravb_main.c
> +++ b/drivers/net/ethernet/renesas/ravb_main.c
> @@ -537,7 +537,13 @@ static void ravb_emac_init_gbeth(struct net_device
> *ndev)
> /* E-MAC interrupt enable register */
> ravb_write(ndev, ECSIPR_ICDIP, ECSIPR);
>
> - ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1,
> CXR31_SEL_LINK0);
> + if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {
> + ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 |
> CXR31_SEL_LINK1, 0);
> + ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII,
> CXR35);
"(1000 << 16)" is a magic number, so I suggest defining it or writing a comment.
> + } else {
> + ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 |
> CXR31_SEL_LINK1,
> + CXR31_SEL_LINK0);
> + }
> }
>
> static void ravb_emac_init_rcar(struct net_device *ndev)
> --
> 2.25.1
Best regards,
Nobuhiro
^ permalink raw reply [flat|nested] 20+ messages in thread* RE: [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support
2022-10-26 8:54 ` nobuhiro1.iwamatsu
@ 2022-10-26 9:09 ` Biju Das
2022-10-26 9:17 ` nobuhiro1.iwamatsu
0 siblings, 1 reply; 20+ messages in thread
From: Biju Das @ 2022-10-26 9:09 UTC (permalink / raw)
To: nobuhiro1.iwamatsu, cip-dev, pavel; +Cc: Chris Paterson, biju.das
Hi Nobuhiro-San,
Thanks for the feedback.
> Subject: RE: [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface
> support
>
> Hi Biju,
>
> > -----Original Message-----
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> > Sent: Tuesday, October 25, 2022 11:42 PM
> > To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯
> Ａ
> > ＣＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek
> <pavel@denx.de>
> > Cc: Chris Paterson <chris.paterson2@renesas.com>; Biju Das
> > <biju.das@bp.renesas.com>
> > Subject: [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface
> > support
> >
> > commit 1089877ada8d2da5f173922f1061ccfe721ebf56 upstream.
> >
> > EMAC IP found on RZ/G2L Gb ethernet supports MII interface.
> > This patch adds support for selecting MII interface mode.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
> > Link:
> >
> > Signed-off-by: Jakub Kicinski <kuba@kernel.org>
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > drivers/net/ethernet/renesas/ravb.h | 8 ++++++++
> > drivers/net/ethernet/renesas/ravb_main.c | 8 +++++++-
> > 2 files changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/ethernet/renesas/ravb.h
> > b/drivers/net/ethernet/renesas/ravb.h
> > index 0b5801f7e961..76ae3b5c568e 100644
> > --- a/drivers/net/ethernet/renesas/ravb.h
> > +++ b/drivers/net/ethernet/renesas/ravb.h
> > @@ -189,6 +189,7 @@ enum ravb_reg {
> > PSR = 0x0528,
> > PIPR = 0x052c,
> > CXR31 = 0x0530, /* RZ/G2L only */
> > + CXR35 = 0x0540, /* RZ/G2L only */
> > MPR = 0x0558,
> > PFTCR = 0x055c,
> > PFRCR = 0x0560,
> > @@ -965,6 +966,13 @@ enum CXR31_BIT {
> > CXR31_SEL_LINK1 = 0x00000008,
> > };
> >
> > +enum CXR35_BIT {
> > + CXR35_SEL_XMII = 0x00000003,
> > + CXR35_SEL_XMII_RGMII = 0x00000000,
> > + CXR35_SEL_XMII_MII = 0x00000002,
> > + CXR35_HALFCYC_CLKSW = 0xffff0000,
> > +};
> > +
> > enum CSR0_BIT {
> > CSR0_TPE = 0x00000010,
> > CSR0_RPE = 0x00000020,
> > diff --git a/drivers/net/ethernet/renesas/ravb_main.c
> > b/drivers/net/ethernet/renesas/ravb_main.c
> > index ea76fd98a767..bc259105a55b 100644
> > --- a/drivers/net/ethernet/renesas/ravb_main.c
> > +++ b/drivers/net/ethernet/renesas/ravb_main.c
> > @@ -537,7 +537,13 @@ static void ravb_emac_init_gbeth(struct
> > net_device
> > *ndev)
> > /* E-MAC interrupt enable register */
> > ravb_write(ndev, ECSIPR_ICDIP, ECSIPR);
> >
> > - ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1,
> > CXR31_SEL_LINK0);
> > + if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {
> > + ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 |
> > CXR31_SEL_LINK1, 0);
> > + ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII,
> > CXR35);
>
> "(1000 << 16)" is a magic number, so I suggest defining it or writing
> a comment.
Renesas RAVB reviewer doesn't like macro, he wants plain number here.
See [1]
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220914064730.1878211-1-biju.das.jz@bp.renesas.com/
Cheers,
Biju
^ permalink raw reply [flat|nested] 20+ messages in thread* RE: [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support
2022-10-26 9:09 ` Biju Das
@ 2022-10-26 9:17 ` nobuhiro1.iwamatsu
0 siblings, 0 replies; 20+ messages in thread
From: nobuhiro1.iwamatsu @ 2022-10-26 9:17 UTC (permalink / raw)
To: biju.das.jz, cip-dev, pavel; +Cc: Chris.Paterson2, biju.das
Hi Biju,
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: Wednesday, October 26, 2022 6:10 PM
> To: iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ)
> <nobuhiro1.iwamatsu@toshiba.co.jp>; cip-dev@lists.cip-project.org;
> pavel@denx.de
> Cc: Chris Paterson <Chris.Paterson2@renesas.com>;
> biju.das@bp.renesas.com
> Subject: RE: [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support
>
> Hi Nobuhiro-San,
>
> Thanks for the feedback.
>
<snip>
> > > diff --git a/drivers/net/ethernet/renesas/ravb.h
> > > b/drivers/net/ethernet/renesas/ravb.h
> > > index 0b5801f7e961..76ae3b5c568e 100644
> > > --- a/drivers/net/ethernet/renesas/ravb.h
> > > +++ b/drivers/net/ethernet/renesas/ravb.h
> > > @@ -189,6 +189,7 @@ enum ravb_reg {
> > > PSR = 0x0528,
> > > PIPR = 0x052c,
> > > CXR31 = 0x0530, /* RZ/G2L only */
> > > + CXR35 = 0x0540, /* RZ/G2L only */
> > > MPR = 0x0558,
> > > PFTCR = 0x055c,
> > > PFRCR = 0x0560,
> > > @@ -965,6 +966,13 @@ enum CXR31_BIT {
> > > CXR31_SEL_LINK1 = 0x00000008,
> > > };
<snip>
> > > CXR31_SEL_LINK1, 0);
> > > + ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII,
> > > CXR35);
> >
> > "(1000 << 16)" is a magic number, so I suggest defining it or writing
> > a comment.
>
> Renesas RAVB reviewer doesn't like macro, he wants plain number here.
>
> See [1]
>
> [1]
> https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220914064
> 730.1878211-1-biju.das.jz@bp.renesas.com/
Thanks for letting me know about the email you discussed.
Got it.
Best regards,
Nobuhiro
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (11 preceding siblings ...)
2022-10-25 14:41 ` [PATCH 5.10.y-cip 12/12] ravb: Add RZ/G2L MII interface support Biju Das
@ 2022-10-26 8:40 ` Pavel Machek
2022-10-26 8:45 ` Biju Das
2022-10-26 9:19 ` nobuhiro1.iwamatsu
13 siblings, 1 reply; 20+ messages in thread
From: Pavel Machek @ 2022-10-26 8:40 UTC (permalink / raw)
To: Biju Das
Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Chris Paterson, Biju Das
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Hi!
> This patch series aims to add DMA support to RSPI and enhancements
> like fixing interrupt types, MII support and fix RPM imabalance for
> RZ/G2{L,LC,UL}/RZ/V2L SoCs
1st patch seems to be just a preparation for something we'll not merge
in 5.10 -- not a bugfix and not a new hardware support. It is not
likely to break anything, still I believe we could avoid it.
> Uwe Kleine-König (1):
> mtd: hyperbus: Make hyperbus_unregister_device() return void
The rest of the series looks good, and I can apply it if it passes
testing and if there are no other comments.
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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^ permalink raw reply [flat|nested] 20+ messages in thread* RE: [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements
2022-10-26 8:40 ` [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Pavel Machek
@ 2022-10-26 8:45 ` Biju Das
0 siblings, 0 replies; 20+ messages in thread
From: Biju Das @ 2022-10-26 8:45 UTC (permalink / raw)
To: Pavel Machek; +Cc: cip-dev, Nobuhiro Iwamatsu, Chris Paterson, Biju Das
Hi Pavel,
Thanks for the feedback.
> Subject: Re: [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L
> improvements
>
> Hi!
>
> > This patch series aims to add DMA support to RSPI and enhancements
> > like fixing interrupt types, MII support and fix RPM imabalance for
> > RZ/G2{L,LC,UL}/RZ/V2L SoCs
>
> 1st patch seems to be just a preparation for something we'll not merge
> in 5.10 -- not a bugfix and not a new hardware support. It is not
> likely to break anything, still I believe we could avoid it.
OK, I agree.
Cheers,
Biju
>
> > Uwe Kleine-König (1):
> > mtd: hyperbus: Make hyperbus_unregister_device() return void
>
> The rest of the series looks good, and I can apply it if it passes
> testing and if there are no other comments.
>
> Best regards,
> Pavel
> --
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements
2022-10-25 14:41 [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Biju Das
` (12 preceding siblings ...)
2022-10-26 8:40 ` [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements Pavel Machek
@ 2022-10-26 9:19 ` nobuhiro1.iwamatsu
2022-10-27 8:18 ` Pavel Machek
13 siblings, 1 reply; 20+ messages in thread
From: nobuhiro1.iwamatsu @ 2022-10-26 9:19 UTC (permalink / raw)
To: biju.das.jz, cip-dev, pavel; +Cc: chris.paterson2, biju.das
Hi Biju,
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: Tuesday, October 25, 2022 11:41 PM
> To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯Ａ
> ＣＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek
> <pavel@denx.de>
> Cc: Chris Paterson <chris.paterson2@renesas.com>; Biju Das
> <biju.das@bp.renesas.com>
> Subject: [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements
>
> This patch series aims to add DMA support to RSPI and enhancements like
> fixing interrupt types, MII support and fix RPM imabalance for
> RZ/G2{L,LC,UL}/RZ/V2L SoCs
>
> All these patches are cherry-picked from the mainline.
>
> Biju Das (9):
> arm64: dts: renesas: r9a07g043: Add DMA support to RSPI
> arm64: dts: renesas: r9a07g044: Add DMA support to RSPI
> arm64: dts: renesas: r9a07g054: Add DMA support to RSPI
> arm64: dts: renesas: r9a07g043: Fix audio clk node names
> arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types
> arm64: dts: renesas: r9a07g054: Fix SCI{Rx,Tx} interrupt types
> arm64: dts: renesas: r9a07g043: Fix SCI{Rx,Tx} interrupt types
> clk: renesas: r9a07g044: Add conditional compilation for
> r9a07g044_cpg_info
> ravb: Add RZ/G2L MII interface support
>
> Geert Uytterhoeven (1):
> mtd: hyperbus: rpc-if: Fix RPM imbalance in probe error path
>
> Lad Prabhakar (1):
> arm64: dts: renesas: Adjust whitespace around '{'
>
> Uwe Kleine-König (1):
> mtd: hyperbus: Make hyperbus_unregister_device() return void
>
> arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 20
> +++++++++++++------- arch/arm64/boot/dts/renesas/r9a07g044.dtsi |
> 16 +++++++++++----- arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 16
> +++++++++++-----
> drivers/clk/renesas/r9a07g044-cpg.c | 2 ++
> drivers/mtd/hyperbus/hbmc-am654.c | 6 +++---
> drivers/mtd/hyperbus/hyperbus-core.c | 8 ++------
> drivers/mtd/hyperbus/rpc-if.c | 13 +++++++++----
> drivers/net/ethernet/renesas/ravb.h | 8 ++++++++
> drivers/net/ethernet/renesas/ravb_main.c | 8 +++++++-
> include/linux/mtd/hyperbus.h | 4 +---
> 10 files changed, 67 insertions(+), 34 deletions(-)
>
I reviewed this series, If there are no other comments, I can apply.
Test pipelines:
https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/677314908
Best regards,
Nobuhiro
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH 5.10.y-cip 00/12] RZ/G2{L,LC,UL}/RZ/V2L improvements
2022-10-26 9:19 ` nobuhiro1.iwamatsu
@ 2022-10-27 8:18 ` Pavel Machek
0 siblings, 0 replies; 20+ messages in thread
From: Pavel Machek @ 2022-10-27 8:18 UTC (permalink / raw)
To: nobuhiro1.iwamatsu; +Cc: biju.das.jz, cip-dev, pavel, chris.paterson2, biju.das
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Hi!
> I reviewed this series, If there are no other comments, I can apply.
> Test pipelines:
> https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/677314908
As we both reviewed the series, I applied it -- without the first
patch, which is not neccessary for 5.10.
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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^ permalink raw reply [flat|nested] 20+ messages in thread