All of lore.kernel.org
 help / color / mirror / Atom feed
* [PULL 00/29] target-arm queue
@ 2022-12-15 12:49 Peter Maydell
  2022-12-15 12:49 ` [PULL 01/29] hw/arm/virt: Introduce virt_set_high_memmap() helper Peter Maydell
                   ` (28 more replies)
  0 siblings, 29 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

First arm pullreq of the 8.0 series...

The following changes since commit ae2b87341b5ddb0dcb1b3f2d4f586ef18de75873:

  Merge tag 'pull-qapi-2022-12-14-v2' of https://repo.or.cz/qemu/armbru into staging (2022-12-14 22:42:14 +0000)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20221215

for you to fetch changes up to 4f3ebdc33618e7c163f769047859d6f34373e3af:

  target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator (2022-12-15 11:18:20 +0000)

----------------------------------------------------------------
target-arm queue:
 * hw/arm/virt: Add properties to allow more granular
   configuration of use of highmem space
 * target/arm: Add Cortex-A55 CPU
 * hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement
 * Implement FEAT_EVT
 * Some 3-phase-reset conversions for Arm GIC, SMMU
 * hw/arm/boot: set initrd with #address-cells type in fdt
 * align user-mode exposed ID registers with Linux
 * hw/misc: Move some arm-related files from specific_ss into softmmu_ss
 * Restrict arm_cpu_exec_interrupt() to TCG accelerator

----------------------------------------------------------------
Gavin Shan (7):
      hw/arm/virt: Introduce virt_set_high_memmap() helper
      hw/arm/virt: Rename variable size to region_size in virt_set_high_memmap()
      hw/arm/virt: Introduce variable region_base in virt_set_high_memmap()
      hw/arm/virt: Introduce virt_get_high_memmap_enabled() helper
      hw/arm/virt: Improve high memory region address assignment
      hw/arm/virt: Add 'compact-highmem' property
      hw/arm/virt: Add properties to disable high memory regions

Luke Starrett (1):
      hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement

Mihai Carabas (1):
      hw/arm/virt: build SMBIOS 19 table

Peter Maydell (15):
      target/arm: Allow relevant HCR bits to be written for FEAT_EVT
      target/arm: Implement HCR_EL2.TTLBIS traps
      target/arm: Implement HCR_EL2.TTLBOS traps
      target/arm: Implement HCR_EL2.TICAB,TOCU traps
      target/arm: Implement HCR_EL2.TID4 traps
      target/arm: Report FEAT_EVT for TCG '-cpu max'
      hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset
      hw/arm: Convert TYPE_ARM_SMMUV3 to 3-phase reset
      hw/intc: Convert TYPE_ARM_GIC_COMMON to 3-phase reset
      hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase reset
      hw/intc: Convert TYPE_ARM_GICV3_COMMON to 3-phase reset
      hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase reset
      hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON to 3-phase reset
      hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase reset
      hw/intc: Convert TYPE_KVM_ARM_ITS to 3-phase reset

Philippe Mathieu-Daudé (1):
      target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator

Schspa Shi (1):
      hw/arm/boot: set initrd with #address-cells type in fdt

Thomas Huth (1):
      hw/misc: Move some arm-related files from specific_ss into softmmu_ss

Timofey Kutergin (1):
      target/arm: Add Cortex-A55 CPU

Zhuojia Shen (1):
      target/arm: align exposed ID registers with Linux

 docs/system/arm/emulation.rst          |   1 +
 docs/system/arm/virt.rst               |  18 +++
 include/hw/arm/smmuv3.h                |   2 +-
 include/hw/arm/virt.h                  |   2 +
 include/hw/misc/xlnx-zynqmp-apu-ctrl.h |   2 +-
 target/arm/cpu.h                       |  30 +++++
 target/arm/kvm-consts.h                |   8 +-
 hw/arm/boot.c                          |  10 +-
 hw/arm/smmu-common.c                   |   7 +-
 hw/arm/smmuv3.c                        |  12 +-
 hw/arm/virt.c                          | 202 +++++++++++++++++++++++-----
 hw/intc/arm_gic_common.c               |   7 +-
 hw/intc/arm_gic_kvm.c                  |  14 +-
 hw/intc/arm_gicv3_common.c             |   7 +-
 hw/intc/arm_gicv3_dist.c               |   4 +-
 hw/intc/arm_gicv3_its.c                |  14 +-
 hw/intc/arm_gicv3_its_common.c         |   7 +-
 hw/intc/arm_gicv3_its_kvm.c            |  14 +-
 hw/intc/arm_gicv3_kvm.c                |  14 +-
 hw/misc/imx6_src.c                     |   2 +-
 hw/misc/iotkit-sysctl.c                |   1 -
 target/arm/cpu.c                       |   5 +-
 target/arm/cpu64.c                     |  70 ++++++++++
 target/arm/cpu_tcg.c                   |   1 +
 target/arm/helper.c                    | 231 ++++++++++++++++++++++++---------
 hw/misc/meson.build                    |  11 +-
 26 files changed, 538 insertions(+), 158 deletions(-)


^ permalink raw reply	[flat|nested] 36+ messages in thread

* [PULL 01/29] hw/arm/virt: Introduce virt_set_high_memmap() helper
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 02/29] hw/arm/virt: Rename variable size to region_size in virt_set_high_memmap() Peter Maydell
                   ` (27 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Gavin Shan <gshan@redhat.com>

This introduces virt_set_high_memmap() helper. The logic of high
memory region address assignment is moved to the helper. The intention
is to make the subsequent optimization for high memory region address
assignment easier.

No functional change intended.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Tested-by: Zhenyu Zhang <zhenyzha@redhat.com>
Message-id: 20221029224307.138822-2-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/virt.c | 74 ++++++++++++++++++++++++++++-----------------------
 1 file changed, 41 insertions(+), 33 deletions(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index b8713508561..ca300281939 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1690,6 +1690,46 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState *vms, int idx)
     return arm_cpu_mp_affinity(idx, clustersz);
 }
 
+static void virt_set_high_memmap(VirtMachineState *vms,
+                                 hwaddr base, int pa_bits)
+{
+    int i;
+
+    for (i = VIRT_LOWMEMMAP_LAST; i < ARRAY_SIZE(extended_memmap); i++) {
+        hwaddr size = extended_memmap[i].size;
+        bool fits;
+
+        base = ROUND_UP(base, size);
+        vms->memmap[i].base = base;
+        vms->memmap[i].size = size;
+
+        /*
+         * Check each device to see if they fit in the PA space,
+         * moving highest_gpa as we go.
+         *
+         * For each device that doesn't fit, disable it.
+         */
+        fits = (base + size) <= BIT_ULL(pa_bits);
+        if (fits) {
+            vms->highest_gpa = base + size - 1;
+        }
+
+        switch (i) {
+        case VIRT_HIGH_GIC_REDIST2:
+            vms->highmem_redists &= fits;
+            break;
+        case VIRT_HIGH_PCIE_ECAM:
+            vms->highmem_ecam &= fits;
+            break;
+        case VIRT_HIGH_PCIE_MMIO:
+            vms->highmem_mmio &= fits;
+            break;
+        }
+
+        base += size;
+    }
+}
+
 static void virt_set_memmap(VirtMachineState *vms, int pa_bits)
 {
     MachineState *ms = MACHINE(vms);
@@ -1745,39 +1785,7 @@ static void virt_set_memmap(VirtMachineState *vms, int pa_bits)
     /* We know for sure that at least the memory fits in the PA space */
     vms->highest_gpa = memtop - 1;
 
-    for (i = VIRT_LOWMEMMAP_LAST; i < ARRAY_SIZE(extended_memmap); i++) {
-        hwaddr size = extended_memmap[i].size;
-        bool fits;
-
-        base = ROUND_UP(base, size);
-        vms->memmap[i].base = base;
-        vms->memmap[i].size = size;
-
-        /*
-         * Check each device to see if they fit in the PA space,
-         * moving highest_gpa as we go.
-         *
-         * For each device that doesn't fit, disable it.
-         */
-        fits = (base + size) <= BIT_ULL(pa_bits);
-        if (fits) {
-            vms->highest_gpa = base + size - 1;
-        }
-
-        switch (i) {
-        case VIRT_HIGH_GIC_REDIST2:
-            vms->highmem_redists &= fits;
-            break;
-        case VIRT_HIGH_PCIE_ECAM:
-            vms->highmem_ecam &= fits;
-            break;
-        case VIRT_HIGH_PCIE_MMIO:
-            vms->highmem_mmio &= fits;
-            break;
-        }
-
-        base += size;
-    }
+    virt_set_high_memmap(vms, base, pa_bits);
 
     if (device_memory_size > 0) {
         ms->device_memory = g_malloc0(sizeof(*ms->device_memory));
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 02/29] hw/arm/virt: Rename variable size to region_size in virt_set_high_memmap()
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
  2022-12-15 12:49 ` [PULL 01/29] hw/arm/virt: Introduce virt_set_high_memmap() helper Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 03/29] hw/arm/virt: Introduce variable region_base " Peter Maydell
                   ` (26 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Gavin Shan <gshan@redhat.com>

This renames variable 'size' to 'region_size' in virt_set_high_memmap().
Its counterpart ('region_base') will be introduced in next patch.

No functional change intended.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Tested-by: Zhenyu Zhang <zhenyzha@redhat.com>
Message-id: 20221029224307.138822-3-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/virt.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index ca300281939..2659f4db15c 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1693,15 +1693,16 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState *vms, int idx)
 static void virt_set_high_memmap(VirtMachineState *vms,
                                  hwaddr base, int pa_bits)
 {
+    hwaddr region_size;
+    bool fits;
     int i;
 
     for (i = VIRT_LOWMEMMAP_LAST; i < ARRAY_SIZE(extended_memmap); i++) {
-        hwaddr size = extended_memmap[i].size;
-        bool fits;
+        region_size = extended_memmap[i].size;
 
-        base = ROUND_UP(base, size);
+        base = ROUND_UP(base, region_size);
         vms->memmap[i].base = base;
-        vms->memmap[i].size = size;
+        vms->memmap[i].size = region_size;
 
         /*
          * Check each device to see if they fit in the PA space,
@@ -1709,9 +1710,9 @@ static void virt_set_high_memmap(VirtMachineState *vms,
          *
          * For each device that doesn't fit, disable it.
          */
-        fits = (base + size) <= BIT_ULL(pa_bits);
+        fits = (base + region_size) <= BIT_ULL(pa_bits);
         if (fits) {
-            vms->highest_gpa = base + size - 1;
+            vms->highest_gpa = base + region_size - 1;
         }
 
         switch (i) {
@@ -1726,7 +1727,7 @@ static void virt_set_high_memmap(VirtMachineState *vms,
             break;
         }
 
-        base += size;
+        base += region_size;
     }
 }
 
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 03/29] hw/arm/virt: Introduce variable region_base in virt_set_high_memmap()
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
  2022-12-15 12:49 ` [PULL 01/29] hw/arm/virt: Introduce virt_set_high_memmap() helper Peter Maydell
  2022-12-15 12:49 ` [PULL 02/29] hw/arm/virt: Rename variable size to region_size in virt_set_high_memmap() Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 04/29] hw/arm/virt: Introduce virt_get_high_memmap_enabled() helper Peter Maydell
                   ` (25 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Gavin Shan <gshan@redhat.com>

This introduces variable 'region_base' for the base address of the
specific high memory region. It's the preparatory work to optimize
high memory region address assignment.

No functional change intended.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Tested-by: Zhenyu Zhang <zhenyzha@redhat.com>
Message-id: 20221029224307.138822-4-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/virt.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 2659f4db15c..3bb1bf079ff 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1693,15 +1693,15 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState *vms, int idx)
 static void virt_set_high_memmap(VirtMachineState *vms,
                                  hwaddr base, int pa_bits)
 {
-    hwaddr region_size;
+    hwaddr region_base, region_size;
     bool fits;
     int i;
 
     for (i = VIRT_LOWMEMMAP_LAST; i < ARRAY_SIZE(extended_memmap); i++) {
+        region_base = ROUND_UP(base, extended_memmap[i].size);
         region_size = extended_memmap[i].size;
 
-        base = ROUND_UP(base, region_size);
-        vms->memmap[i].base = base;
+        vms->memmap[i].base = region_base;
         vms->memmap[i].size = region_size;
 
         /*
@@ -1710,9 +1710,9 @@ static void virt_set_high_memmap(VirtMachineState *vms,
          *
          * For each device that doesn't fit, disable it.
          */
-        fits = (base + region_size) <= BIT_ULL(pa_bits);
+        fits = (region_base + region_size) <= BIT_ULL(pa_bits);
         if (fits) {
-            vms->highest_gpa = base + region_size - 1;
+            vms->highest_gpa = region_base + region_size - 1;
         }
 
         switch (i) {
@@ -1727,7 +1727,7 @@ static void virt_set_high_memmap(VirtMachineState *vms,
             break;
         }
 
-        base += region_size;
+        base = region_base + region_size;
     }
 }
 
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 04/29] hw/arm/virt: Introduce virt_get_high_memmap_enabled() helper
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (2 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 03/29] hw/arm/virt: Introduce variable region_base " Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 05/29] hw/arm/virt: Improve high memory region address assignment Peter Maydell
                   ` (24 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Gavin Shan <gshan@redhat.com>

This introduces virt_get_high_memmap_enabled() helper, which returns
the pointer to vms->highmem_{redists, ecam, mmio}. The pointer will
be used in the subsequent patches.

No functional change intended.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Tested-by: Zhenyu Zhang <zhenyzha@redhat.com>
Message-id: 20221029224307.138822-5-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/virt.c | 32 +++++++++++++++++++-------------
 1 file changed, 19 insertions(+), 13 deletions(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 3bb1bf079ff..7689337470a 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1690,14 +1690,31 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState *vms, int idx)
     return arm_cpu_mp_affinity(idx, clustersz);
 }
 
+static inline bool *virt_get_high_memmap_enabled(VirtMachineState *vms,
+                                                 int index)
+{
+    bool *enabled_array[] = {
+        &vms->highmem_redists,
+        &vms->highmem_ecam,
+        &vms->highmem_mmio,
+    };
+
+    assert(ARRAY_SIZE(extended_memmap) - VIRT_LOWMEMMAP_LAST ==
+           ARRAY_SIZE(enabled_array));
+    assert(index - VIRT_LOWMEMMAP_LAST < ARRAY_SIZE(enabled_array));
+
+    return enabled_array[index - VIRT_LOWMEMMAP_LAST];
+}
+
 static void virt_set_high_memmap(VirtMachineState *vms,
                                  hwaddr base, int pa_bits)
 {
     hwaddr region_base, region_size;
-    bool fits;
+    bool *region_enabled, fits;
     int i;
 
     for (i = VIRT_LOWMEMMAP_LAST; i < ARRAY_SIZE(extended_memmap); i++) {
+        region_enabled = virt_get_high_memmap_enabled(vms, i);
         region_base = ROUND_UP(base, extended_memmap[i].size);
         region_size = extended_memmap[i].size;
 
@@ -1715,18 +1732,7 @@ static void virt_set_high_memmap(VirtMachineState *vms,
             vms->highest_gpa = region_base + region_size - 1;
         }
 
-        switch (i) {
-        case VIRT_HIGH_GIC_REDIST2:
-            vms->highmem_redists &= fits;
-            break;
-        case VIRT_HIGH_PCIE_ECAM:
-            vms->highmem_ecam &= fits;
-            break;
-        case VIRT_HIGH_PCIE_MMIO:
-            vms->highmem_mmio &= fits;
-            break;
-        }
-
+        *region_enabled &= fits;
         base = region_base + region_size;
     }
 }
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 05/29] hw/arm/virt: Improve high memory region address assignment
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (3 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 04/29] hw/arm/virt: Introduce virt_get_high_memmap_enabled() helper Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 06/29] hw/arm/virt: Add 'compact-highmem' property Peter Maydell
                   ` (23 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Gavin Shan <gshan@redhat.com>

There are three high memory regions, which are VIRT_HIGH_REDIST2,
VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses
are floating on highest RAM address. However, they can be disabled
in several cases.

(1) One specific high memory region is likely to be disabled by
    code by toggling vms->highmem_{redists, ecam, mmio}.

(2) VIRT_HIGH_PCIE_ECAM region is disabled on machine, which is
    'virt-2.12' or ealier than it.

(3) VIRT_HIGH_PCIE_ECAM region is disabled when firmware is loaded
    on 32-bits system.

(4) One specific high memory region is disabled when it breaks the
    PA space limit.

The current implementation of virt_set_{memmap, high_memmap}() isn't
optimized because the high memory region's PA space is always reserved,
regardless of whatever the actual state in the corresponding
vms->highmem_{redists, ecam, mmio} flag. In the code, 'base' and
'vms->highest_gpa' are always increased for case (1), (2) and (3).
It's unnecessary since the assigned PA space for the disabled high
memory region won't be used afterwards.

Improve the address assignment for those three high memory region by
skipping the address assignment for one specific high memory region if
it has been disabled in case (1), (2) and (3). The memory layout may
be changed after the improvement is applied, which leads to potential
migration breakage. So 'vms->highmem_compact' is added to control if
the improvement should be applied. For now, 'vms->highmem_compact' is
set to false, meaning that we don't have memory layout change until it
becomes configurable through property 'compact-highmem' in next patch.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Tested-by: Zhenyu Zhang <zhenyzha@redhat.com>
Message-id: 20221029224307.138822-6-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/virt.h |  1 +
 hw/arm/virt.c         | 15 ++++++++++-----
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 6ec479ca2b7..709f6237412 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -144,6 +144,7 @@ struct VirtMachineState {
     PFlashCFI01 *flash[2];
     bool secure;
     bool highmem;
+    bool highmem_compact;
     bool highmem_ecam;
     bool highmem_mmio;
     bool highmem_redists;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 7689337470a..807175707e7 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1722,18 +1722,23 @@ static void virt_set_high_memmap(VirtMachineState *vms,
         vms->memmap[i].size = region_size;
 
         /*
-         * Check each device to see if they fit in the PA space,
-         * moving highest_gpa as we go.
+         * Check each device to see if it fits in the PA space,
+         * moving highest_gpa as we go. For compatibility, move
+         * highest_gpa for disabled fitting devices as well, if
+         * the compact layout has been disabled.
          *
          * For each device that doesn't fit, disable it.
          */
         fits = (region_base + region_size) <= BIT_ULL(pa_bits);
-        if (fits) {
-            vms->highest_gpa = region_base + region_size - 1;
+        *region_enabled &= fits;
+        if (vms->highmem_compact && !*region_enabled) {
+            continue;
         }
 
-        *region_enabled &= fits;
         base = region_base + region_size;
+        if (fits) {
+            vms->highest_gpa = base - 1;
+        }
     }
 }
 
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 06/29] hw/arm/virt: Add 'compact-highmem' property
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (4 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 05/29] hw/arm/virt: Improve high memory region address assignment Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 07/29] hw/arm/virt: Add properties to disable high memory regions Peter Maydell
                   ` (22 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Gavin Shan <gshan@redhat.com>

After the improvement to high memory region address assignment is
applied, the memory layout can be changed, introducing possible
migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
is disabled or enabled when the optimization is applied or not, with
the following configuration. The configuration is only achievable by
modifying the source code until more properties are added to allow
users selectively disable those high memory regions.

  pa_bits              = 40;
  vms->highmem_redists = false;
  vms->highmem_ecam    = false;
  vms->highmem_mmio    = true;

  # qemu-system-aarch64 -accel kvm -cpu host    \
    -machine virt-7.2,compact-highmem={on, off} \
    -m 4G,maxmem=511G -monitor stdio

  Region             compact-highmem=off         compact-highmem=on
  ----------------------------------------------------------------
  MEM                [1GB         512GB]        [1GB         512GB]
  HIGH_GIC_REDISTS2  [512GB       512GB+64MB]   [disabled]
  HIGH_PCIE_ECAM     [512GB+256MB 512GB+512MB]  [disabled]
  HIGH_PCIE_MMIO     [disabled]                 [512GB       1TB]

In order to keep backwords compatibility, we need to disable the
optimization on machine, which is virt-7.1 or ealier than it. It
means the optimization is enabled by default from virt-7.2. Besides,
'compact-highmem' property is added so that the optimization can be
explicitly enabled or disabled on all machine types by users.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Tested-by: Zhenyu Zhang <zhenyzha@redhat.com>
Message-id: 20221029224307.138822-7-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 docs/system/arm/virt.rst |  4 ++++
 include/hw/arm/virt.h    |  1 +
 hw/arm/virt.c            | 32 ++++++++++++++++++++++++++++++++
 3 files changed, 37 insertions(+)

diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
index 20442ea2c13..4454706392c 100644
--- a/docs/system/arm/virt.rst
+++ b/docs/system/arm/virt.rst
@@ -94,6 +94,10 @@ highmem
   address space above 32 bits. The default is ``on`` for machine types
   later than ``virt-2.12``.
 
+compact-highmem
+  Set ``on``/``off`` to enable/disable the compact layout for high memory regions.
+  The default is ``on`` for machine types later than ``virt-7.2``.
+
 gic-version
   Specify the version of the Generic Interrupt Controller (GIC) to provide.
   Valid values are:
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 709f6237412..c7dd59d7f1f 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -125,6 +125,7 @@ struct VirtMachineClass {
     bool no_pmu;
     bool claim_edge_triggered_timers;
     bool smbios_old_sys_ver;
+    bool no_highmem_compact;
     bool no_highmem_ecam;
     bool no_ged;   /* Machines < 4.2 have no support for ACPI GED device */
     bool kvm_no_adjvtime;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 807175707e7..3d1371c05c0 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -174,6 +174,12 @@ static const MemMapEntry base_memmap[] = {
  * Note the extended_memmap is sized so that it eventually also includes the
  * base_memmap entries (VIRT_HIGH_GIC_REDIST2 index is greater than the last
  * index of base_memmap).
+ *
+ * The memory map for these Highmem IO Regions can be in legacy or compact
+ * layout, depending on 'compact-highmem' property. With legacy layout, the
+ * PA space for one specific region is always reserved, even if the region
+ * has been disabled or doesn't fit into the PA space. However, the PA space
+ * for the region won't be reserved in these circumstances with compact layout.
  */
 static MemMapEntry extended_memmap[] = {
     /* Additional 64 MB redist region (can contain up to 512 redistributors) */
@@ -2352,6 +2358,20 @@ static void virt_set_highmem(Object *obj, bool value, Error **errp)
     vms->highmem = value;
 }
 
+static bool virt_get_compact_highmem(Object *obj, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    return vms->highmem_compact;
+}
+
+static void virt_set_compact_highmem(Object *obj, bool value, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    vms->highmem_compact = value;
+}
+
 static bool virt_get_its(Object *obj, Error **errp)
 {
     VirtMachineState *vms = VIRT_MACHINE(obj);
@@ -2970,6 +2990,13 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
                                           "Set on/off to enable/disable using "
                                           "physical address space above 32 bits");
 
+    object_class_property_add_bool(oc, "compact-highmem",
+                                   virt_get_compact_highmem,
+                                   virt_set_compact_highmem);
+    object_class_property_set_description(oc, "compact-highmem",
+                                          "Set on/off to enable/disable compact "
+                                          "layout for high memory regions");
+
     object_class_property_add_str(oc, "gic-version", virt_get_gic_version,
                                   virt_set_gic_version);
     object_class_property_set_description(oc, "gic-version",
@@ -3054,6 +3081,7 @@ static void virt_instance_init(Object *obj)
 
     /* High memory is enabled by default */
     vms->highmem = true;
+    vms->highmem_compact = !vmc->no_highmem_compact;
     vms->gic_version = VIRT_GIC_VERSION_NOSEL;
 
     vms->highmem_ecam = !vmc->no_highmem_ecam;
@@ -3123,8 +3151,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(7, 2)
 
 static void virt_machine_7_1_options(MachineClass *mc)
 {
+    VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
+
     virt_machine_7_2_options(mc);
     compat_props_add(mc->compat_props, hw_compat_7_1, hw_compat_7_1_len);
+    /* Compact layout for high memory regions was introduced with 7.2 */
+    vmc->no_highmem_compact = true;
 }
 DEFINE_VIRT_MACHINE(7, 1)
 
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 07/29] hw/arm/virt: Add properties to disable high memory regions
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (5 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 06/29] hw/arm/virt: Add 'compact-highmem' property Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 08/29] hw/arm/virt: build SMBIOS 19 table Peter Maydell
                   ` (21 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Gavin Shan <gshan@redhat.com>

The 3 high memory regions are usually enabled by default, but they may
be not used. For example, VIRT_HIGH_GIC_REDIST2 isn't needed by GICv2.
This leads to waste in the PA space.

Add properties ("highmem-redists", "highmem-ecam", "highmem-mmio") to
allow users selectively disable them if needed. After that, the high
memory region for GICv3 or GICv4 redistributor can be disabled by user,
the number of maximal supported CPUs needs to be calculated based on
'vms->highmem_redists'. The follow-up error message is also improved
to indicate if the high memory region for GICv3 and GICv4 has been
enabled or not.

Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20221029224307.138822-8-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 docs/system/arm/virt.rst | 13 +++++++
 hw/arm/virt.c            | 75 ++++++++++++++++++++++++++++++++++++++--
 2 files changed, 86 insertions(+), 2 deletions(-)

diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
index 4454706392c..188a4f211f4 100644
--- a/docs/system/arm/virt.rst
+++ b/docs/system/arm/virt.rst
@@ -98,6 +98,19 @@ compact-highmem
   Set ``on``/``off`` to enable/disable the compact layout for high memory regions.
   The default is ``on`` for machine types later than ``virt-7.2``.
 
+highmem-redists
+  Set ``on``/``off`` to enable/disable the high memory region for GICv3 or
+  GICv4 redistributor. The default is ``on``. Setting this to ``off`` will
+  limit the maximum number of CPUs when GICv3 or GICv4 is used.
+
+highmem-ecam
+  Set ``on``/``off`` to enable/disable the high memory region for PCI ECAM.
+  The default is ``on`` for machine types later than ``virt-3.0``.
+
+highmem-mmio
+  Set ``on``/``off`` to enable/disable the high memory region for PCI MMIO.
+  The default is ``on``.
+
 gic-version
   Specify the version of the Generic Interrupt Controller (GIC) to provide.
   Valid values are:
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 3d1371c05c0..0acb71be962 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2096,14 +2096,20 @@ static void machvirt_init(MachineState *machine)
     if (vms->gic_version == VIRT_GIC_VERSION_2) {
         virt_max_cpus = GIC_NCPU;
     } else {
-        virt_max_cpus = virt_redist_capacity(vms, VIRT_GIC_REDIST) +
-            virt_redist_capacity(vms, VIRT_HIGH_GIC_REDIST2);
+        virt_max_cpus = virt_redist_capacity(vms, VIRT_GIC_REDIST);
+        if (vms->highmem_redists) {
+            virt_max_cpus += virt_redist_capacity(vms, VIRT_HIGH_GIC_REDIST2);
+        }
     }
 
     if (max_cpus > virt_max_cpus) {
         error_report("Number of SMP CPUs requested (%d) exceeds max CPUs "
                      "supported by machine 'mach-virt' (%d)",
                      max_cpus, virt_max_cpus);
+        if (vms->gic_version != VIRT_GIC_VERSION_2 && !vms->highmem_redists) {
+            error_printf("Try 'highmem-redists=on' for more CPUs\n");
+        }
+
         exit(1);
     }
 
@@ -2372,6 +2378,49 @@ static void virt_set_compact_highmem(Object *obj, bool value, Error **errp)
     vms->highmem_compact = value;
 }
 
+static bool virt_get_highmem_redists(Object *obj, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    return vms->highmem_redists;
+}
+
+static void virt_set_highmem_redists(Object *obj, bool value, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    vms->highmem_redists = value;
+}
+
+static bool virt_get_highmem_ecam(Object *obj, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    return vms->highmem_ecam;
+}
+
+static void virt_set_highmem_ecam(Object *obj, bool value, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    vms->highmem_ecam = value;
+}
+
+static bool virt_get_highmem_mmio(Object *obj, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    return vms->highmem_mmio;
+}
+
+static void virt_set_highmem_mmio(Object *obj, bool value, Error **errp)
+{
+    VirtMachineState *vms = VIRT_MACHINE(obj);
+
+    vms->highmem_mmio = value;
+}
+
+
 static bool virt_get_its(Object *obj, Error **errp)
 {
     VirtMachineState *vms = VIRT_MACHINE(obj);
@@ -2997,6 +3046,28 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
                                           "Set on/off to enable/disable compact "
                                           "layout for high memory regions");
 
+    object_class_property_add_bool(oc, "highmem-redists",
+                                   virt_get_highmem_redists,
+                                   virt_set_highmem_redists);
+    object_class_property_set_description(oc, "highmem-redists",
+                                          "Set on/off to enable/disable high "
+                                          "memory region for GICv3 or GICv4 "
+                                          "redistributor");
+
+    object_class_property_add_bool(oc, "highmem-ecam",
+                                   virt_get_highmem_ecam,
+                                   virt_set_highmem_ecam);
+    object_class_property_set_description(oc, "highmem-ecam",
+                                          "Set on/off to enable/disable high "
+                                          "memory region for PCI ECAM");
+
+    object_class_property_add_bool(oc, "highmem-mmio",
+                                   virt_get_highmem_mmio,
+                                   virt_set_highmem_mmio);
+    object_class_property_set_description(oc, "highmem-mmio",
+                                          "Set on/off to enable/disable high "
+                                          "memory region for PCI MMIO");
+
     object_class_property_add_str(oc, "gic-version", virt_get_gic_version,
                                   virt_set_gic_version);
     object_class_property_set_description(oc, "gic-version",
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 08/29] hw/arm/virt: build SMBIOS 19 table
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (6 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 07/29] hw/arm/virt: Add properties to disable high memory regions Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 09/29] target/arm: Add Cortex-A55 CPU Peter Maydell
                   ` (20 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Mihai Carabas <mihai.carabas@oracle.com>

Use the base_memmap to build the SMBIOS 19 table which provides the address
mapping for a Physical Memory Array (from spec [1] chapter 7.20).

This was present on i386 from commit c97294ec1b9e36887e119589d456557d72ab37b5
("SMBIOS: Build aggregate smbios tables and entry point").

[1] https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.5.0.pdf

The absence of this table is a breach of the specs and is
detected by the FirmwareTestSuite (FWTS), but it doesn't
cause any known problems for guest OSes.

Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com>
Message-id: 1668789029-5432-1-git-send-email-mihai.carabas@oracle.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/virt.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 0acb71be962..bf59784aefa 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1614,9 +1614,11 @@ static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size)
 static void virt_build_smbios(VirtMachineState *vms)
 {
     MachineClass *mc = MACHINE_GET_CLASS(vms);
+    MachineState *ms = MACHINE(vms);
     VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
     uint8_t *smbios_tables, *smbios_anchor;
     size_t smbios_tables_len, smbios_anchor_len;
+    struct smbios_phys_mem_area mem_array;
     const char *product = "QEMU Virtual Machine";
 
     if (kvm_enabled()) {
@@ -1627,7 +1629,11 @@ static void virt_build_smbios(VirtMachineState *vms)
                         vmc->smbios_old_sys_ver ? "1.0" : mc->name, false,
                         true, SMBIOS_ENTRY_POINT_TYPE_64);
 
-    smbios_get_tables(MACHINE(vms), NULL, 0,
+    /* build the array of physical mem area from base_memmap */
+    mem_array.address = vms->memmap[VIRT_MEM].base;
+    mem_array.length = ms->ram_size;
+
+    smbios_get_tables(ms, &mem_array, 1,
                       &smbios_tables, &smbios_tables_len,
                       &smbios_anchor, &smbios_anchor_len,
                       &error_fatal);
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 09/29] target/arm: Add Cortex-A55 CPU
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (7 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 08/29] hw/arm/virt: build SMBIOS 19 table Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 10/29] hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement Peter Maydell
                   ` (19 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Timofey Kutergin <tkutergin@gmail.com>

The Cortex-A55 is one of the newer armv8.2+ CPUs; in particular
it supports the Privileged Access Never (PAN) feature. Add
a model of this CPU, so you can use a CPU type on the virt
board that models a specific real hardware CPU, rather than
having to use the QEMU-specific "max" CPU type.

Signed-off-by: Timofey Kutergin <tkutergin@gmail.com>
Message-id: 20221121150819.2782817-1-tkutergin@gmail.com
[PMM: tweaked commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 docs/system/arm/virt.rst |  1 +
 hw/arm/virt.c            |  1 +
 target/arm/cpu64.c       | 69 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 71 insertions(+)

diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
index 188a4f211f4..1cab33f02e3 100644
--- a/docs/system/arm/virt.rst
+++ b/docs/system/arm/virt.rst
@@ -54,6 +54,7 @@ Supported guest CPU types:
 - ``cortex-a15`` (32-bit; the default)
 - ``cortex-a35`` (64-bit)
 - ``cortex-a53`` (64-bit)
+- ``cortex-a55`` (64-bit)
 - ``cortex-a57`` (64-bit)
 - ``cortex-a72`` (64-bit)
 - ``cortex-a76`` (64-bit)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index bf59784aefa..a2dd48dfb80 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -207,6 +207,7 @@ static const char *valid_cpus[] = {
     ARM_CPU_TYPE_NAME("cortex-a15"),
     ARM_CPU_TYPE_NAME("cortex-a35"),
     ARM_CPU_TYPE_NAME("cortex-a53"),
+    ARM_CPU_TYPE_NAME("cortex-a55"),
     ARM_CPU_TYPE_NAME("cortex-a57"),
     ARM_CPU_TYPE_NAME("cortex-a72"),
     ARM_CPU_TYPE_NAME("cortex-a76"),
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 3d74f134f57..cec64471b4e 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -792,6 +792,74 @@ static void aarch64_a53_initfn(Object *obj)
     define_cortex_a72_a57_a53_cp_reginfo(cpu);
 }
 
+static void aarch64_a55_initfn(Object *obj)
+{
+    ARMCPU *cpu = ARM_CPU(obj);
+
+    cpu->dtb_compatible = "arm,cortex-a55";
+    set_feature(&cpu->env, ARM_FEATURE_V8);
+    set_feature(&cpu->env, ARM_FEATURE_NEON);
+    set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
+    set_feature(&cpu->env, ARM_FEATURE_AARCH64);
+    set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
+    set_feature(&cpu->env, ARM_FEATURE_EL2);
+    set_feature(&cpu->env, ARM_FEATURE_EL3);
+    set_feature(&cpu->env, ARM_FEATURE_PMU);
+
+    /* Ordered by B2.4 AArch64 registers by functional group */
+    cpu->clidr = 0x82000023;
+    cpu->ctr = 0x84448004; /* L1Ip = VIPT */
+    cpu->dcz_blocksize = 4; /* 64 bytes */
+    cpu->isar.id_aa64dfr0  = 0x0000000010305408ull;
+    cpu->isar.id_aa64isar0 = 0x0000100010211120ull;
+    cpu->isar.id_aa64isar1 = 0x0000000000100001ull;
+    cpu->isar.id_aa64mmfr0 = 0x0000000000101122ull;
+    cpu->isar.id_aa64mmfr1 = 0x0000000010212122ull;
+    cpu->isar.id_aa64mmfr2 = 0x0000000000001011ull;
+    cpu->isar.id_aa64pfr0  = 0x0000000010112222ull;
+    cpu->isar.id_aa64pfr1  = 0x0000000000000010ull;
+    cpu->id_afr0       = 0x00000000;
+    cpu->isar.id_dfr0  = 0x04010088;
+    cpu->isar.id_isar0 = 0x02101110;
+    cpu->isar.id_isar1 = 0x13112111;
+    cpu->isar.id_isar2 = 0x21232042;
+    cpu->isar.id_isar3 = 0x01112131;
+    cpu->isar.id_isar4 = 0x00011142;
+    cpu->isar.id_isar5 = 0x01011121;
+    cpu->isar.id_isar6 = 0x00000010;
+    cpu->isar.id_mmfr0 = 0x10201105;
+    cpu->isar.id_mmfr1 = 0x40000000;
+    cpu->isar.id_mmfr2 = 0x01260000;
+    cpu->isar.id_mmfr3 = 0x02122211;
+    cpu->isar.id_mmfr4 = 0x00021110;
+    cpu->isar.id_pfr0  = 0x10010131;
+    cpu->isar.id_pfr1  = 0x00011011;
+    cpu->isar.id_pfr2  = 0x00000011;
+    cpu->midr = 0x412FD050;          /* r2p0 */
+    cpu->revidr = 0;
+
+    /* From B2.23 CCSIDR_EL1 */
+    cpu->ccsidr[0] = 0x700fe01a; /* 32KB L1 dcache */
+    cpu->ccsidr[1] = 0x200fe01a; /* 32KB L1 icache */
+    cpu->ccsidr[2] = 0x703fe07a; /* 512KB L2 cache */
+
+    /* From B2.96 SCTLR_EL3 */
+    cpu->reset_sctlr = 0x30c50838;
+
+    /* From B4.45 ICH_VTR_EL2 */
+    cpu->gic_num_lrs = 4;
+    cpu->gic_vpribits = 5;
+    cpu->gic_vprebits = 5;
+    cpu->gic_pribits = 5;
+
+    cpu->isar.mvfr0 = 0x10110222;
+    cpu->isar.mvfr1 = 0x13211111;
+    cpu->isar.mvfr2 = 0x00000043;
+
+    /* From D5.4 AArch64 PMU register summary */
+    cpu->isar.reset_pmcr_el0 = 0x410b3000;
+}
+
 static void aarch64_a72_initfn(Object *obj)
 {
     ARMCPU *cpu = ARM_CPU(obj);
@@ -1243,6 +1311,7 @@ static const ARMCPUInfo aarch64_cpus[] = {
     { .name = "cortex-a35",         .initfn = aarch64_a35_initfn },
     { .name = "cortex-a57",         .initfn = aarch64_a57_initfn },
     { .name = "cortex-a53",         .initfn = aarch64_a53_initfn },
+    { .name = "cortex-a55",         .initfn = aarch64_a55_initfn },
     { .name = "cortex-a72",         .initfn = aarch64_a72_initfn },
     { .name = "cortex-a76",         .initfn = aarch64_a76_initfn },
     { .name = "a64fx",              .initfn = aarch64_a64fx_initfn },
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 10/29] hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (8 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 09/29] target/arm: Add Cortex-A55 CPU Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 11/29] target/arm: Allow relevant HCR bits to be written for FEAT_EVT Peter Maydell
                   ` (18 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

From: Luke Starrett <lukes@xsightlabs.com>

The ARM GICv3 TRM describes that the ITLinesNumber field of GICD_TYPER
register:

"indicates the maximum SPI INTID that the GIC implementation supports"

As SPI #0 is absolute IRQ #32, the max SPI INTID should have accounted
for the internal 16x SGI's and 16x PPI's.  However, the original GICv3
model subtracted off the SGI/PPI.  Cosmetically this can be seen at OS
boot (Linux) showing 32 shy of what should be there, i.e.:

    [    0.000000] GICv3: 224 SPIs implemented

Though in hw/arm/virt.c, the machine is configured for 256 SPI's.  ARM
virt machine likely doesn't have a problem with this because the upper
32 IRQ's don't actually have anything meaningful wired. But, this does
become a functional issue on a custom use case which wants to make use
of these IRQ's.  Additionally, boot code (i.e. TF-A) will only init up
to the number (blocks of 32) that it believes to actually be there.

Signed-off-by: Luke Starrett <lukes@xsightlabs.com>
Message-id: AM9P193MB168473D99B761E204E032095D40D9@AM9P193MB1684.EURP193.PROD.OUTLOOK.COM
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/intc/arm_gicv3_dist.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c
index eea03681187..d599fefcbcf 100644
--- a/hw/intc/arm_gicv3_dist.c
+++ b/hw/intc/arm_gicv3_dist.c
@@ -390,9 +390,9 @@ static bool gicd_readl(GICv3State *s, hwaddr offset,
          * MBIS == 0 (message-based SPIs not supported)
          * SecurityExtn == 1 if security extns supported
          * CPUNumber == 0 since for us ARE is always 1
-         * ITLinesNumber == (num external irqs / 32) - 1
+         * ITLinesNumber == (((max SPI IntID + 1) / 32) - 1)
          */
-        int itlinesnumber = ((s->num_irq - GIC_INTERNAL) / 32) - 1;
+        int itlinesnumber = (s->num_irq / 32) - 1;
         /*
          * SecurityExtn must be RAZ if GICD_CTLR.DS == 1, and
          * "security extensions not supported" always implies DS == 1,
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 11/29] target/arm: Allow relevant HCR bits to be written for FEAT_EVT
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (9 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 10/29] hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 12/29] target/arm: Implement HCR_EL2.TTLBIS traps Peter Maydell
                   ` (17 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

FEAT_EVT adds five new bits to the HCR_EL2 register: TTLBIS, TTLBOS,
TICAB, TOCU and TID4.  These allow the guest to enable trapping of
various EL1 instructions to EL2.  In this commit, add the necessary
code to allow the guest to set these bits if the feature is present;
because the bit is always zero when the feature isn't present we
won't need to use explicit feature checks in the "trap on condition"
tests in the following commits.

Note that although full implementation of the feature (mandatory from
Armv8.5 onward) requires all five trap bits, the ID registers permit
a value indicating that only TICAB, TOCU and TID4 are implemented,
which might be the case for CPUs between Armv8.2 and Armv8.5.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu.h    | 30 ++++++++++++++++++++++++++++++
 target/arm/helper.c |  6 ++++++
 2 files changed, 36 insertions(+)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 9aeed3c8481..2b4bd20f9d0 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3757,6 +3757,16 @@ static inline bool isar_feature_aa32_tts2uxn(const ARMISARegisters *id)
     return FIELD_EX32(id->id_mmfr4, ID_MMFR4, XNX) != 0;
 }
 
+static inline bool isar_feature_aa32_half_evt(const ARMISARegisters *id)
+{
+    return FIELD_EX32(id->id_mmfr4, ID_MMFR4, EVT) >= 1;
+}
+
+static inline bool isar_feature_aa32_evt(const ARMISARegisters *id)
+{
+    return FIELD_EX32(id->id_mmfr4, ID_MMFR4, EVT) >= 2;
+}
+
 static inline bool isar_feature_aa32_dit(const ARMISARegisters *id)
 {
     return FIELD_EX32(id->id_pfr0, ID_PFR0, DIT) != 0;
@@ -4029,6 +4039,16 @@ static inline bool isar_feature_aa64_ids(const ARMISARegisters *id)
     return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, IDS) != 0;
 }
 
+static inline bool isar_feature_aa64_half_evt(const ARMISARegisters *id)
+{
+    return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, EVT) >= 1;
+}
+
+static inline bool isar_feature_aa64_evt(const ARMISARegisters *id)
+{
+    return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, EVT) >= 2;
+}
+
 static inline bool isar_feature_aa64_bti(const ARMISARegisters *id)
 {
     return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, BT) != 0;
@@ -4313,6 +4333,16 @@ static inline bool isar_feature_any_ras(const ARMISARegisters *id)
     return isar_feature_aa64_ras(id) || isar_feature_aa32_ras(id);
 }
 
+static inline bool isar_feature_any_half_evt(const ARMISARegisters *id)
+{
+    return isar_feature_aa64_half_evt(id) || isar_feature_aa32_half_evt(id);
+}
+
+static inline bool isar_feature_any_evt(const ARMISARegisters *id)
+{
+    return isar_feature_aa64_evt(id) || isar_feature_aa32_evt(id);
+}
+
 /*
  * Forward to the above feature tests given an ARMCPU pointer.
  */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index d8c8223ec38..751c360ce45 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5267,6 +5267,12 @@ static void do_hcr_write(CPUARMState *env, uint64_t value, uint64_t valid_mask)
         }
     }
 
+    if (cpu_isar_feature(any_evt, cpu)) {
+        valid_mask |= HCR_TTLBIS | HCR_TTLBOS | HCR_TICAB | HCR_TOCU | HCR_TID4;
+    } else if (cpu_isar_feature(any_half_evt, cpu)) {
+        valid_mask |= HCR_TICAB | HCR_TOCU | HCR_TID4;
+    }
+
     /* Clear RES0 bits.  */
     value &= valid_mask;
 
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 12/29] target/arm: Implement HCR_EL2.TTLBIS traps
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (10 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 11/29] target/arm: Allow relevant HCR bits to be written for FEAT_EVT Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 13/29] target/arm: Implement HCR_EL2.TTLBOS traps Peter Maydell
                   ` (16 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

For FEAT_EVT, the HCR_EL2.TTLBIS bit allows trapping on EL1 use of
TLB maintenance instructions that operate on the inner shareable
domain:

AArch64:
 TLBI VMALLE1IS, TLBI VAE1IS, TLBI ASIDE1IS, TLBI VAAE1IS,
 TLBI VALE1IS, TLBI VAALE1IS, TLBI RVAE1IS, TLBI RVAAE1IS,
 TLBI RVALE1IS, and TLBI RVAALE1IS.

AArch32:
 TLBIALLIS, TLBIMVAIS, TLBIASIDIS, TLBIMVAAIS, TLBIMVALIS,
 and TLBIMVAALIS.

Add the trapping support.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper.c | 43 +++++++++++++++++++++++++++----------------
 1 file changed, 27 insertions(+), 16 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 751c360ce45..475b48750e9 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -362,6 +362,17 @@ static CPAccessResult access_ttlb(CPUARMState *env, const ARMCPRegInfo *ri,
     return CP_ACCESS_OK;
 }
 
+/* Check for traps from EL1 due to HCR_EL2.TTLB or TTLBIS. */
+static CPAccessResult access_ttlbis(CPUARMState *env, const ARMCPRegInfo *ri,
+                                    bool isread)
+{
+    if (arm_current_el(env) == 1 &&
+        (arm_hcr_el2_eff(env) & (HCR_TTLB | HCR_TTLBIS))) {
+        return CP_ACCESS_TRAP_EL2;
+    }
+    return CP_ACCESS_OK;
+}
+
 static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
 {
     ARMCPU *cpu = env_archcpu(env);
@@ -2206,16 +2217,16 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
 static const ARMCPRegInfo v7mp_cp_reginfo[] = {
     /* 32 bit TLB invalidates, Inner Shareable */
     { .name = "TLBIALLIS", .cp = 15, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 0,
-      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
+      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlbis,
       .writefn = tlbiall_is_write },
     { .name = "TLBIMVAIS", .cp = 15, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 1,
-      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
+      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlbis,
       .writefn = tlbimva_is_write },
     { .name = "TLBIASIDIS", .cp = 15, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 2,
-      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
+      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlbis,
       .writefn = tlbiasid_is_write },
     { .name = "TLBIMVAAIS", .cp = 15, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 3,
-      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
+      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlbis,
       .writefn = tlbimvaa_is_write },
 };
 
@@ -4948,27 +4959,27 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
     /* TLBI operations */
     { .name = "TLBI_VMALLE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 0,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vmalle1is_write },
     { .name = "TLBI_VAE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 1,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vae1is_write },
     { .name = "TLBI_ASIDE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 2,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vmalle1is_write },
     { .name = "TLBI_VAAE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 3,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vae1is_write },
     { .name = "TLBI_VALE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 5,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vae1is_write },
     { .name = "TLBI_VAALE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 7,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vae1is_write },
     { .name = "TLBI_VMALLE1", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 7, .opc2 = 0,
@@ -5078,10 +5089,10 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
 #endif
     /* TLB invalidate last level of translation table walk */
     { .name = "TLBIMVALIS", .cp = 15, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 5,
-      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
+      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlbis,
       .writefn = tlbimva_is_write },
     { .name = "TLBIMVAALIS", .cp = 15, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 7,
-      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
+      .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlbis,
       .writefn = tlbimvaa_is_write },
     { .name = "TLBIMVAL", .cp = 15, .opc1 = 0, .crn = 8, .crm = 7, .opc2 = 5,
       .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
@@ -6726,19 +6737,19 @@ static const ARMCPRegInfo pauth_reginfo[] = {
 static const ARMCPRegInfo tlbirange_reginfo[] = {
     { .name = "TLBI_RVAE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 2, .opc2 = 1,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_rvae1is_write },
     { .name = "TLBI_RVAAE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 2, .opc2 = 3,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_rvae1is_write },
    { .name = "TLBI_RVALE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 2, .opc2 = 5,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_rvae1is_write },
     { .name = "TLBI_RVAALE1IS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 2, .opc2 = 7,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbis, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_rvae1is_write },
     { .name = "TLBI_RVAE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 5, .opc2 = 1,
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 13/29] target/arm: Implement HCR_EL2.TTLBOS traps
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (11 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 12/29] target/arm: Implement HCR_EL2.TTLBIS traps Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 14/29] target/arm: Implement HCR_EL2.TICAB,TOCU traps Peter Maydell
                   ` (15 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

For FEAT_EVT, the HCR_EL2.TTLBOS bit allows trapping on EL1
use of TLB maintenance instructions that operate on the
outer shareable domain:

TLBI VMALLE1OS, TLBI VAE1OS, TLBI ASIDE1OS,TLBI VAAE1OS,
TLBI VALE1OS, TLBI VAALE1OS, TLBI RVAE1OS, TLBI RVAAE1OS,
TLBI RVALE1OS, and TLBI RVAALE1OS.

(There are no AArch32 outer-shareable TLB maintenance ops.)

Implement the trapping.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper.c | 33 +++++++++++++++++++++++----------
 1 file changed, 23 insertions(+), 10 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 475b48750e9..0ec1c3ffbd6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -373,6 +373,19 @@ static CPAccessResult access_ttlbis(CPUARMState *env, const ARMCPRegInfo *ri,
     return CP_ACCESS_OK;
 }
 
+#ifdef TARGET_AARCH64
+/* Check for traps from EL1 due to HCR_EL2.TTLB or TTLBOS. */
+static CPAccessResult access_ttlbos(CPUARMState *env, const ARMCPRegInfo *ri,
+                                    bool isread)
+{
+    if (arm_current_el(env) == 1 &&
+        (arm_hcr_el2_eff(env) & (HCR_TTLB | HCR_TTLBOS))) {
+        return CP_ACCESS_TRAP_EL2;
+    }
+    return CP_ACCESS_OK;
+}
+#endif
+
 static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
 {
     ARMCPU *cpu = env_archcpu(env);
@@ -6753,19 +6766,19 @@ static const ARMCPRegInfo tlbirange_reginfo[] = {
       .writefn = tlbi_aa64_rvae1is_write },
     { .name = "TLBI_RVAE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 5, .opc2 = 1,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_rvae1is_write },
     { .name = "TLBI_RVAAE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 5, .opc2 = 3,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_rvae1is_write },
    { .name = "TLBI_RVALE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 5, .opc2 = 5,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_rvae1is_write },
     { .name = "TLBI_RVAALE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 5, .opc2 = 7,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_rvae1is_write },
     { .name = "TLBI_RVAE1", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 6, .opc2 = 1,
@@ -6852,27 +6865,27 @@ static const ARMCPRegInfo tlbirange_reginfo[] = {
 static const ARMCPRegInfo tlbios_reginfo[] = {
     { .name = "TLBI_VMALLE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 0,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vmalle1is_write },
     { .name = "TLBI_VAE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 1,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vae1is_write },
     { .name = "TLBI_ASIDE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 2,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vmalle1is_write },
     { .name = "TLBI_VAAE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 3,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vae1is_write },
     { .name = "TLBI_VALE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 5,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vae1is_write },
     { .name = "TLBI_VAALE1OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 7,
-      .access = PL1_W, .accessfn = access_ttlb, .type = ARM_CP_NO_RAW,
+      .access = PL1_W, .accessfn = access_ttlbos, .type = ARM_CP_NO_RAW,
       .writefn = tlbi_aa64_vae1is_write },
     { .name = "TLBI_ALLE2OS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 1, .opc2 = 0,
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 14/29] target/arm: Implement HCR_EL2.TICAB,TOCU traps
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (12 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 13/29] target/arm: Implement HCR_EL2.TTLBOS traps Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 15/29] target/arm: Implement HCR_EL2.TID4 traps Peter Maydell
                   ` (14 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

For FEAT_EVT, the HCR_EL2.TICAB bit allows trapping of the ICIALLUIS
and IC IALLUIS cache maintenance instructions.

The HCR_EL2.TOCU bit traps all the other cache maintenance
instructions that operate to the point of unification:
 AArch64 IC IVAU, IC IALLU, DC CVAU
 AArch32 ICIMVAU, ICIALLU, DCCMVAU

The two trap bits between them cover all of the cache maintenance
instructions which must also check the HCR_TPU flag.  Turn the old
aa64_cacheop_pou_access() function into a helper function which takes
the set of HCR_EL2 flags to check as an argument, and call it from
new access_ticab() and access_tocu() functions as appropriate for
each cache op.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper.c | 36 +++++++++++++++++++++++-------------
 1 file changed, 23 insertions(+), 13 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0ec1c3ffbd6..eee95a42f7f 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4273,9 +4273,7 @@ static CPAccessResult aa64_cacheop_poc_access(CPUARMState *env,
     return CP_ACCESS_OK;
 }
 
-static CPAccessResult aa64_cacheop_pou_access(CPUARMState *env,
-                                              const ARMCPRegInfo *ri,
-                                              bool isread)
+static CPAccessResult do_cacheop_pou_access(CPUARMState *env, uint64_t hcrflags)
 {
     /* Cache invalidate/clean to Point of Unification... */
     switch (arm_current_el(env)) {
@@ -4286,8 +4284,8 @@ static CPAccessResult aa64_cacheop_pou_access(CPUARMState *env,
         }
         /* fall through */
     case 1:
-        /* ... EL1 must trap to EL2 if HCR_EL2.TPU is set.  */
-        if (arm_hcr_el2_eff(env) & HCR_TPU) {
+        /* ... EL1 must trap to EL2 if relevant HCR_EL2 flags are set.  */
+        if (arm_hcr_el2_eff(env) & hcrflags) {
             return CP_ACCESS_TRAP_EL2;
         }
         break;
@@ -4295,6 +4293,18 @@ static CPAccessResult aa64_cacheop_pou_access(CPUARMState *env,
     return CP_ACCESS_OK;
 }
 
+static CPAccessResult access_ticab(CPUARMState *env, const ARMCPRegInfo *ri,
+                                   bool isread)
+{
+    return do_cacheop_pou_access(env, HCR_TICAB | HCR_TPU);
+}
+
+static CPAccessResult access_tocu(CPUARMState *env, const ARMCPRegInfo *ri,
+                                  bool isread)
+{
+    return do_cacheop_pou_access(env, HCR_TOCU | HCR_TPU);
+}
+
 /* See: D4.7.2 TLB maintenance requirements and the TLB maintenance instructions
  * Page D4-1736 (DDI0487A.b)
  */
@@ -4935,15 +4945,15 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
     { .name = "IC_IALLUIS", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 1, .opc2 = 0,
       .access = PL1_W, .type = ARM_CP_NOP,
-      .accessfn = aa64_cacheop_pou_access },
+      .accessfn = access_ticab },
     { .name = "IC_IALLU", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 5, .opc2 = 0,
       .access = PL1_W, .type = ARM_CP_NOP,
-      .accessfn = aa64_cacheop_pou_access },
+      .accessfn = access_tocu },
     { .name = "IC_IVAU", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 5, .opc2 = 1,
       .access = PL0_W, .type = ARM_CP_NOP,
-      .accessfn = aa64_cacheop_pou_access },
+      .accessfn = access_tocu },
     { .name = "DC_IVAC", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 6, .opc2 = 1,
       .access = PL1_W, .accessfn = aa64_cacheop_poc_access,
@@ -4961,7 +4971,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
     { .name = "DC_CVAU", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 11, .opc2 = 1,
       .access = PL0_W, .type = ARM_CP_NOP,
-      .accessfn = aa64_cacheop_pou_access },
+      .accessfn = access_tocu },
     { .name = "DC_CIVAC", .state = ARM_CP_STATE_AA64,
       .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 14, .opc2 = 1,
       .access = PL0_W, .type = ARM_CP_NOP,
@@ -5138,13 +5148,13 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
       .writefn = tlbiipas2is_hyp_write },
     /* 32 bit cache operations */
     { .name = "ICIALLUIS", .cp = 15, .opc1 = 0, .crn = 7, .crm = 1, .opc2 = 0,
-      .type = ARM_CP_NOP, .access = PL1_W, .accessfn = aa64_cacheop_pou_access },
+      .type = ARM_CP_NOP, .access = PL1_W, .accessfn = access_ticab },
     { .name = "BPIALLUIS", .cp = 15, .opc1 = 0, .crn = 7, .crm = 1, .opc2 = 6,
       .type = ARM_CP_NOP, .access = PL1_W },
     { .name = "ICIALLU", .cp = 15, .opc1 = 0, .crn = 7, .crm = 5, .opc2 = 0,
-      .type = ARM_CP_NOP, .access = PL1_W, .accessfn = aa64_cacheop_pou_access },
+      .type = ARM_CP_NOP, .access = PL1_W, .accessfn = access_tocu },
     { .name = "ICIMVAU", .cp = 15, .opc1 = 0, .crn = 7, .crm = 5, .opc2 = 1,
-      .type = ARM_CP_NOP, .access = PL1_W, .accessfn = aa64_cacheop_pou_access },
+      .type = ARM_CP_NOP, .access = PL1_W, .accessfn = access_tocu },
     { .name = "BPIALL", .cp = 15, .opc1 = 0, .crn = 7, .crm = 5, .opc2 = 6,
       .type = ARM_CP_NOP, .access = PL1_W },
     { .name = "BPIMVA", .cp = 15, .opc1 = 0, .crn = 7, .crm = 5, .opc2 = 7,
@@ -5158,7 +5168,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
     { .name = "DCCSW", .cp = 15, .opc1 = 0, .crn = 7, .crm = 10, .opc2 = 2,
       .type = ARM_CP_NOP, .access = PL1_W, .accessfn = access_tsw },
     { .name = "DCCMVAU", .cp = 15, .opc1 = 0, .crn = 7, .crm = 11, .opc2 = 1,
-      .type = ARM_CP_NOP, .access = PL1_W, .accessfn = aa64_cacheop_pou_access },
+      .type = ARM_CP_NOP, .access = PL1_W, .accessfn = access_tocu },
     { .name = "DCCIMVAC", .cp = 15, .opc1 = 0, .crn = 7, .crm = 14, .opc2 = 1,
       .type = ARM_CP_NOP, .access = PL1_W, .accessfn = aa64_cacheop_poc_access },
     { .name = "DCCISW", .cp = 15, .opc1 = 0, .crn = 7, .crm = 14, .opc2 = 2,
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 15/29] target/arm: Implement HCR_EL2.TID4 traps
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (13 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 14/29] target/arm: Implement HCR_EL2.TICAB,TOCU traps Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 16/29] target/arm: Report FEAT_EVT for TCG '-cpu max' Peter Maydell
                   ` (13 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

For FEAT_EVT, the HCR_EL2.TID4 trap allows trapping of the cache ID
registers CCSIDR_EL1, CCSIDR2_EL1, CLIDR_EL1 and CSSELR_EL1 (and
their AArch32 equivalents).  This is a subset of the registers
trapped by HCR_EL2.TID2, which includes all of these and also the
CTR_EL0 register.

Our implementation already uses a separate access function for
CTR_EL0 (ctr_el0_access()), so all of the registers currently using
access_aa64_tid2() should also be checking TID4.  Make that function
check both TID2 and TID4, and rename it appropriately.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index eee95a42f7f..bac2ea62c44 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -1895,11 +1895,12 @@ static void scr_reset(CPUARMState *env, const ARMCPRegInfo *ri)
     scr_write(env, ri, 0);
 }
 
-static CPAccessResult access_aa64_tid2(CPUARMState *env,
-                                       const ARMCPRegInfo *ri,
-                                       bool isread)
+static CPAccessResult access_tid4(CPUARMState *env,
+                                  const ARMCPRegInfo *ri,
+                                  bool isread)
 {
-    if (arm_current_el(env) == 1 && (arm_hcr_el2_eff(env) & HCR_TID2)) {
+    if (arm_current_el(env) == 1 &&
+        (arm_hcr_el2_eff(env) & (HCR_TID2 | HCR_TID4))) {
         return CP_ACCESS_TRAP_EL2;
     }
 
@@ -2130,12 +2131,12 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
     { .name = "CCSIDR", .state = ARM_CP_STATE_BOTH,
       .opc0 = 3, .crn = 0, .crm = 0, .opc1 = 1, .opc2 = 0,
       .access = PL1_R,
-      .accessfn = access_aa64_tid2,
+      .accessfn = access_tid4,
       .readfn = ccsidr_read, .type = ARM_CP_NO_RAW },
     { .name = "CSSELR", .state = ARM_CP_STATE_BOTH,
       .opc0 = 3, .crn = 0, .crm = 0, .opc1 = 2, .opc2 = 0,
       .access = PL1_RW,
-      .accessfn = access_aa64_tid2,
+      .accessfn = access_tid4,
       .writefn = csselr_write, .resetvalue = 0,
       .bank_fieldoffsets = { offsetof(CPUARMState, cp15.csselr_s),
                              offsetof(CPUARMState, cp15.csselr_ns) } },
@@ -7281,7 +7282,7 @@ static const ARMCPRegInfo ccsidr2_reginfo[] = {
     { .name = "CCSIDR2", .state = ARM_CP_STATE_BOTH,
       .opc0 = 3, .opc1 = 1, .crn = 0, .crm = 0, .opc2 = 2,
       .access = PL1_R,
-      .accessfn = access_aa64_tid2,
+      .accessfn = access_tid4,
       .readfn = ccsidr2_read, .type = ARM_CP_NO_RAW },
 };
 
@@ -7581,7 +7582,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
             .name = "CLIDR", .state = ARM_CP_STATE_BOTH,
             .opc0 = 3, .crn = 0, .crm = 0, .opc1 = 1, .opc2 = 1,
             .access = PL1_R, .type = ARM_CP_CONST,
-            .accessfn = access_aa64_tid2,
+            .accessfn = access_tid4,
             .resetvalue = cpu->clidr
         };
         define_one_arm_cp_reg(cpu, &clidr);
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 16/29] target/arm: Report FEAT_EVT for TCG '-cpu max'
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (14 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 15/29] target/arm: Implement HCR_EL2.TID4 traps Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 17/29] hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset Peter Maydell
                   ` (12 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

Update the ID registers for TCG's '-cpu max' to report the
FEAT_EVT Enhanced Virtualization Traps support.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 docs/system/arm/emulation.rst | 1 +
 target/arm/cpu64.c            | 1 +
 target/arm/cpu_tcg.c          | 1 +
 3 files changed, 3 insertions(+)

diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index e3af79bb8c9..b33d7c28dc1 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -26,6 +26,7 @@ the following architecture extensions:
 - FEAT_DoubleFault (Double Fault Extension)
 - FEAT_E0PD (Preventing EL0 access to halves of address maps)
 - FEAT_ETS (Enhanced Translation Synchronization)
+- FEAT_EVT (Enhanced Virtualization Traps)
 - FEAT_FCMA (Floating-point complex number instructions)
 - FEAT_FHM (Floating-point half-precision multiplication instructions)
 - FEAT_FP16 (Half-precision floating-point data processing)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index cec64471b4e..2cf2ca4ce5a 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -1254,6 +1254,7 @@ static void aarch64_max_initfn(Object *obj)
     t = FIELD_DP64(t, ID_AA64MMFR2, FWB, 1);      /* FEAT_S2FWB */
     t = FIELD_DP64(t, ID_AA64MMFR2, TTL, 1);      /* FEAT_TTL */
     t = FIELD_DP64(t, ID_AA64MMFR2, BBM, 2);      /* FEAT_BBM at level 2 */
+    t = FIELD_DP64(t, ID_AA64MMFR2, EVT, 2);      /* FEAT_EVT */
     t = FIELD_DP64(t, ID_AA64MMFR2, E0PD, 1);     /* FEAT_E0PD */
     cpu->isar.id_aa64mmfr2 = t;
 
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
index 9a2cef7d05a..568cbcfc524 100644
--- a/target/arm/cpu_tcg.c
+++ b/target/arm/cpu_tcg.c
@@ -65,6 +65,7 @@ void aa32_max_features(ARMCPU *cpu)
     t = FIELD_DP32(t, ID_MMFR4, AC2, 1);          /* ACTLR2, HACTLR2 */
     t = FIELD_DP32(t, ID_MMFR4, CNP, 1);          /* FEAT_TTCNP */
     t = FIELD_DP32(t, ID_MMFR4, XNX, 1);          /* FEAT_XNX */
+    t = FIELD_DP32(t, ID_MMFR4, EVT, 2);          /* FEAT_EVT */
     cpu->isar.id_mmfr4 = t;
 
     t = cpu->isar.id_mmfr5;
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 17/29] hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (15 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 16/29] target/arm: Report FEAT_EVT for TCG '-cpu max' Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 18/29] hw/arm: Convert TYPE_ARM_SMMUV3 " Peter Maydell
                   ` (11 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

Convert the TYPE_ARM_SMMU device to 3-phase reset.  The legacy method
doesn't do anything that's invalid in the hold phase, so the
conversion is simple and not a behaviour change.

Note that we must convert this base class before we can convert the
TYPE_ARM_SMMUV3 subclass -- transitional support in Resettable
handles "chain to parent class reset" when the base class is 3-phase
and the subclass is still using legacy reset, but not the other way
around.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20221109161444.3397405-2-peter.maydell@linaro.org
---
 hw/arm/smmu-common.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index e09b9c13b74..220838525d4 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -526,9 +526,9 @@ static void smmu_base_realize(DeviceState *dev, Error **errp)
     }
 }
 
-static void smmu_base_reset(DeviceState *dev)
+static void smmu_base_reset_hold(Object *obj)
 {
-    SMMUState *s = ARM_SMMU(dev);
+    SMMUState *s = ARM_SMMU(obj);
 
     g_hash_table_remove_all(s->configs);
     g_hash_table_remove_all(s->iotlb);
@@ -543,12 +543,13 @@ static Property smmu_dev_properties[] = {
 static void smmu_base_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    ResettableClass *rc = RESETTABLE_CLASS(klass);
     SMMUBaseClass *sbc = ARM_SMMU_CLASS(klass);
 
     device_class_set_props(dc, smmu_dev_properties);
     device_class_set_parent_realize(dc, smmu_base_realize,
                                     &sbc->parent_realize);
-    dc->reset = smmu_base_reset;
+    rc->phases.hold = smmu_base_reset_hold;
 }
 
 static const TypeInfo smmu_base_info = {
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 18/29] hw/arm: Convert TYPE_ARM_SMMUV3 to 3-phase reset
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (16 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 17/29] hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:49 ` [PULL 19/29] hw/intc: Convert TYPE_ARM_GIC_COMMON " Peter Maydell
                   ` (10 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

Convert the TYPE_ARM_SMMUV3 device to 3-phase reset.  The legacy
reset method doesn't do anything that's invalid in the hold phase, so
the conversion only requires changing it to a hold phase method, and
using the 3-phase versions of the "save the parent reset method and
chain to it" code.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221109161444.3397405-3-peter.maydell@linaro.org
---
 include/hw/arm/smmuv3.h |  2 +-
 hw/arm/smmuv3.c         | 12 ++++++++----
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
index c641e60735e..f1921fdf9e7 100644
--- a/include/hw/arm/smmuv3.h
+++ b/include/hw/arm/smmuv3.h
@@ -77,7 +77,7 @@ struct SMMUv3Class {
     /*< public >*/
 
     DeviceRealize parent_realize;
-    DeviceReset   parent_reset;
+    ResettablePhases parent_phases;
 };
 
 #define TYPE_ARM_SMMUV3   "arm-smmuv3"
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index daa80e9c7b6..955b89c8d59 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1431,12 +1431,14 @@ static void smmu_init_irq(SMMUv3State *s, SysBusDevice *dev)
     }
 }
 
-static void smmu_reset(DeviceState *dev)
+static void smmu_reset_hold(Object *obj)
 {
-    SMMUv3State *s = ARM_SMMUV3(dev);
+    SMMUv3State *s = ARM_SMMUV3(obj);
     SMMUv3Class *c = ARM_SMMUV3_GET_CLASS(s);
 
-    c->parent_reset(dev);
+    if (c->parent_phases.hold) {
+        c->parent_phases.hold(obj);
+    }
 
     smmuv3_init_regs(s);
 }
@@ -1520,10 +1522,12 @@ static void smmuv3_instance_init(Object *obj)
 static void smmuv3_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    ResettableClass *rc = RESETTABLE_CLASS(klass);
     SMMUv3Class *c = ARM_SMMUV3_CLASS(klass);
 
     dc->vmsd = &vmstate_smmuv3;
-    device_class_set_parent_reset(dc, smmu_reset, &c->parent_reset);
+    resettable_class_set_parent_phases(rc, NULL, smmu_reset_hold, NULL,
+                                       &c->parent_phases);
     c->parent_realize = dc->realize;
     dc->realize = smmu_realize;
 }
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 19/29] hw/intc: Convert TYPE_ARM_GIC_COMMON to 3-phase reset
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (17 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 18/29] hw/arm: Convert TYPE_ARM_SMMUV3 " Peter Maydell
@ 2022-12-15 12:49 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 20/29] hw/intc: Convert TYPE_ARM_GIC_KVM " Peter Maydell
                   ` (9 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:49 UTC (permalink / raw)
  To: qemu-devel

Convert the TYPE_ARM_GIC_COMMON device to 3-phase reset.  This is a
simple no-behaviour-change conversion.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221109161444.3397405-4-peter.maydell@linaro.org
---
 hw/intc/arm_gic_common.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
index 7b44d5625b6..a379cea3959 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -261,9 +261,9 @@ static inline void arm_gic_common_reset_irq_state(GICState *s, int first_cpu,
     }
 }
 
-static void arm_gic_common_reset(DeviceState *dev)
+static void arm_gic_common_reset_hold(Object *obj)
 {
-    GICState *s = ARM_GIC_COMMON(dev);
+    GICState *s = ARM_GIC_COMMON(obj);
     int i, j;
     int resetprio;
 
@@ -364,9 +364,10 @@ static Property arm_gic_common_properties[] = {
 static void arm_gic_common_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    ResettableClass *rc = RESETTABLE_CLASS(klass);
     ARMLinuxBootIfClass *albifc = ARM_LINUX_BOOT_IF_CLASS(klass);
 
-    dc->reset = arm_gic_common_reset;
+    rc->phases.hold = arm_gic_common_reset_hold;
     dc->realize = arm_gic_common_realize;
     device_class_set_props(dc, arm_gic_common_properties);
     dc->vmsd = &vmstate_gic;
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 20/29] hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase reset
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (18 preceding siblings ...)
  2022-12-15 12:49 ` [PULL 19/29] hw/intc: Convert TYPE_ARM_GIC_COMMON " Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 21/29] hw/intc: Convert TYPE_ARM_GICV3_COMMON " Peter Maydell
                   ` (8 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

Now we have converted TYPE_ARM_GIC_COMMON, we can convert the
TYPE_ARM_GIC_KVM subclass to 3-phase reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221109161444.3397405-5-peter.maydell@linaro.org
---
 hw/intc/arm_gic_kvm.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
index 7d2a13273a4..1d588946bce 100644
--- a/hw/intc/arm_gic_kvm.c
+++ b/hw/intc/arm_gic_kvm.c
@@ -38,7 +38,7 @@ DECLARE_OBJ_CHECKERS(GICState, KVMARMGICClass,
 struct KVMARMGICClass {
     ARMGICCommonClass parent_class;
     DeviceRealize parent_realize;
-    void (*parent_reset)(DeviceState *dev);
+    ResettablePhases parent_phases;
 };
 
 void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level)
@@ -473,12 +473,14 @@ static void kvm_arm_gic_get(GICState *s)
     }
 }
 
-static void kvm_arm_gic_reset(DeviceState *dev)
+static void kvm_arm_gic_reset_hold(Object *obj)
 {
-    GICState *s = ARM_GIC_COMMON(dev);
+    GICState *s = ARM_GIC_COMMON(obj);
     KVMARMGICClass *kgc = KVM_ARM_GIC_GET_CLASS(s);
 
-    kgc->parent_reset(dev);
+    if (kgc->parent_phases.hold) {
+        kgc->parent_phases.hold(obj);
+    }
 
     if (kvm_arm_gic_can_save_restore(s)) {
         kvm_arm_gic_put(s);
@@ -593,6 +595,7 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)
 static void kvm_arm_gic_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    ResettableClass *rc = RESETTABLE_CLASS(klass);
     ARMGICCommonClass *agcc = ARM_GIC_COMMON_CLASS(klass);
     KVMARMGICClass *kgc = KVM_ARM_GIC_CLASS(klass);
 
@@ -600,7 +603,8 @@ static void kvm_arm_gic_class_init(ObjectClass *klass, void *data)
     agcc->post_load = kvm_arm_gic_put;
     device_class_set_parent_realize(dc, kvm_arm_gic_realize,
                                     &kgc->parent_realize);
-    device_class_set_parent_reset(dc, kvm_arm_gic_reset, &kgc->parent_reset);
+    resettable_class_set_parent_phases(rc, NULL, kvm_arm_gic_reset_hold, NULL,
+                                       &kgc->parent_phases);
 }
 
 static const TypeInfo kvm_arm_gic_info = {
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 21/29] hw/intc: Convert TYPE_ARM_GICV3_COMMON to 3-phase reset
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (19 preceding siblings ...)
  2022-12-15 12:50 ` [PULL 20/29] hw/intc: Convert TYPE_ARM_GIC_KVM " Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 22/29] hw/intc: Convert TYPE_KVM_ARM_GICV3 " Peter Maydell
                   ` (7 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

Convert the TYPE_ARM_GICV3_COMMON parent class to 3-phase reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221109161444.3397405-6-peter.maydell@linaro.org
---
 hw/intc/arm_gicv3_common.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 351843db4aa..642a8243ed4 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -450,9 +450,9 @@ static void arm_gicv3_finalize(Object *obj)
     g_free(s->redist_region_count);
 }
 
-static void arm_gicv3_common_reset(DeviceState *dev)
+static void arm_gicv3_common_reset_hold(Object *obj)
 {
-    GICv3State *s = ARM_GICV3_COMMON(dev);
+    GICv3State *s = ARM_GICV3_COMMON(obj);
     int i;
 
     for (i = 0; i < s->num_cpu; i++) {
@@ -578,9 +578,10 @@ static Property arm_gicv3_common_properties[] = {
 static void arm_gicv3_common_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    ResettableClass *rc = RESETTABLE_CLASS(klass);
     ARMLinuxBootIfClass *albifc = ARM_LINUX_BOOT_IF_CLASS(klass);
 
-    dc->reset = arm_gicv3_common_reset;
+    rc->phases.hold = arm_gicv3_common_reset_hold;
     dc->realize = arm_gicv3_common_realize;
     device_class_set_props(dc, arm_gicv3_common_properties);
     dc->vmsd = &vmstate_gicv3;
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 22/29] hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase reset
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (20 preceding siblings ...)
  2022-12-15 12:50 ` [PULL 21/29] hw/intc: Convert TYPE_ARM_GICV3_COMMON " Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 23/29] hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON " Peter Maydell
                   ` (6 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

Convert the TYPE_KVM_ARM_GICV3 device to 3-phase reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221109161444.3397405-7-peter.maydell@linaro.org
---
 hw/intc/arm_gicv3_kvm.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c
index 3ca643ecba4..72ad916d3db 100644
--- a/hw/intc/arm_gicv3_kvm.c
+++ b/hw/intc/arm_gicv3_kvm.c
@@ -77,7 +77,7 @@ DECLARE_OBJ_CHECKERS(GICv3State, KVMARMGICv3Class,
 struct KVMARMGICv3Class {
     ARMGICv3CommonClass parent_class;
     DeviceRealize parent_realize;
-    void (*parent_reset)(DeviceState *dev);
+    ResettablePhases parent_phases;
 };
 
 static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level)
@@ -703,14 +703,16 @@ static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri)
     c->icc_ctlr_el1[GICV3_S] = c->icc_ctlr_el1[GICV3_NS];
 }
 
-static void kvm_arm_gicv3_reset(DeviceState *dev)
+static void kvm_arm_gicv3_reset_hold(Object *obj)
 {
-    GICv3State *s = ARM_GICV3_COMMON(dev);
+    GICv3State *s = ARM_GICV3_COMMON(obj);
     KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
 
     DPRINTF("Reset\n");
 
-    kgc->parent_reset(dev);
+    if (kgc->parent_phases.hold) {
+        kgc->parent_phases.hold(obj);
+    }
 
     if (s->migration_blocker) {
         DPRINTF("Cannot put kernel gic state, no kernel interface\n");
@@ -890,6 +892,7 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp)
 static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    ResettableClass *rc = RESETTABLE_CLASS(klass);
     ARMGICv3CommonClass *agcc = ARM_GICV3_COMMON_CLASS(klass);
     KVMARMGICv3Class *kgc = KVM_ARM_GICV3_CLASS(klass);
 
@@ -897,7 +900,8 @@ static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data)
     agcc->post_load = kvm_arm_gicv3_put;
     device_class_set_parent_realize(dc, kvm_arm_gicv3_realize,
                                     &kgc->parent_realize);
-    device_class_set_parent_reset(dc, kvm_arm_gicv3_reset, &kgc->parent_reset);
+    resettable_class_set_parent_phases(rc, NULL, kvm_arm_gicv3_reset_hold, NULL,
+                                       &kgc->parent_phases);
 }
 
 static const TypeInfo kvm_arm_gicv3_info = {
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 23/29] hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON to 3-phase reset
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (21 preceding siblings ...)
  2022-12-15 12:50 ` [PULL 22/29] hw/intc: Convert TYPE_KVM_ARM_GICV3 " Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 24/29] hw/intc: Convert TYPE_ARM_GICV3_ITS " Peter Maydell
                   ` (5 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

Convert the TYPE_ARM_GICV3_ITS_COMMON parent class to 3-phase reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221109161444.3397405-8-peter.maydell@linaro.org
---
 hw/intc/arm_gicv3_its_common.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c
index 90b85f1e25c..d7532a7a899 100644
--- a/hw/intc/arm_gicv3_its_common.c
+++ b/hw/intc/arm_gicv3_its_common.c
@@ -122,9 +122,9 @@ void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops,
     msi_nonbroken = true;
 }
 
-static void gicv3_its_common_reset(DeviceState *dev)
+static void gicv3_its_common_reset_hold(Object *obj)
 {
-    GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
+    GICv3ITSState *s = ARM_GICV3_ITS_COMMON(obj);
 
     s->ctlr = 0;
     s->cbaser = 0;
@@ -137,8 +137,9 @@ static void gicv3_its_common_reset(DeviceState *dev)
 static void gicv3_its_common_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    ResettableClass *rc = RESETTABLE_CLASS(klass);
 
-    dc->reset = gicv3_its_common_reset;
+    rc->phases.hold = gicv3_its_common_reset_hold;
     dc->vmsd = &vmstate_its;
 }
 
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 24/29] hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase reset
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (22 preceding siblings ...)
  2022-12-15 12:50 ` [PULL 23/29] hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON " Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 25/29] hw/intc: Convert TYPE_KVM_ARM_ITS " Peter Maydell
                   ` (4 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

Convert the TYPE_ARM_GICV3_ITS device to 3-phase reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221109161444.3397405-9-peter.maydell@linaro.org
---
 hw/intc/arm_gicv3_its.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 2ff21ed6bbe..57c79da5c55 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -27,7 +27,7 @@ DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSClass,
 
 struct GICv3ITSClass {
     GICv3ITSCommonClass parent_class;
-    void (*parent_reset)(DeviceState *dev);
+    ResettablePhases parent_phases;
 };
 
 /*
@@ -1953,12 +1953,14 @@ static void gicv3_arm_its_realize(DeviceState *dev, Error **errp)
     }
 }
 
-static void gicv3_its_reset(DeviceState *dev)
+static void gicv3_its_reset_hold(Object *obj)
 {
-    GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
+    GICv3ITSState *s = ARM_GICV3_ITS_COMMON(obj);
     GICv3ITSClass *c = ARM_GICV3_ITS_GET_CLASS(s);
 
-    c->parent_reset(dev);
+    if (c->parent_phases.hold) {
+        c->parent_phases.hold(obj);
+    }
 
     /* Quiescent bit reset to 1 */
     s->ctlr = FIELD_DP32(s->ctlr, GITS_CTLR, QUIESCENT, 1);
@@ -2012,12 +2014,14 @@ static Property gicv3_its_props[] = {
 static void gicv3_its_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    ResettableClass *rc = RESETTABLE_CLASS(klass);
     GICv3ITSClass *ic = ARM_GICV3_ITS_CLASS(klass);
     GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass);
 
     dc->realize = gicv3_arm_its_realize;
     device_class_set_props(dc, gicv3_its_props);
-    device_class_set_parent_reset(dc, gicv3_its_reset, &ic->parent_reset);
+    resettable_class_set_parent_phases(rc, NULL, gicv3_its_reset_hold, NULL,
+                                       &ic->parent_phases);
     icc->post_load = gicv3_its_post_load;
 }
 
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 25/29] hw/intc: Convert TYPE_KVM_ARM_ITS to 3-phase reset
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (23 preceding siblings ...)
  2022-12-15 12:50 ` [PULL 24/29] hw/intc: Convert TYPE_ARM_GICV3_ITS " Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 26/29] hw/arm/boot: set initrd with #address-cells type in fdt Peter Maydell
                   ` (3 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

Convert the TYPE_KVM_ARM_ITS device to 3-phase reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221109161444.3397405-10-peter.maydell@linaro.org
---
 hw/intc/arm_gicv3_its_kvm.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c
index 529c7bd4946..7eda9fb86ea 100644
--- a/hw/intc/arm_gicv3_its_kvm.c
+++ b/hw/intc/arm_gicv3_its_kvm.c
@@ -37,7 +37,7 @@ DECLARE_OBJ_CHECKERS(GICv3ITSState, KVMARMITSClass,
 
 struct KVMARMITSClass {
     GICv3ITSCommonClass parent_class;
-    void (*parent_reset)(DeviceState *dev);
+    ResettablePhases parent_phases;
 };
 
 
@@ -197,13 +197,15 @@ static void kvm_arm_its_post_load(GICv3ITSState *s)
                       GITS_CTLR, &s->ctlr, true, &error_abort);
 }
 
-static void kvm_arm_its_reset(DeviceState *dev)
+static void kvm_arm_its_reset_hold(Object *obj)
 {
-    GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
+    GICv3ITSState *s = ARM_GICV3_ITS_COMMON(obj);
     KVMARMITSClass *c = KVM_ARM_ITS_GET_CLASS(s);
     int i;
 
-    c->parent_reset(dev);
+    if (c->parent_phases.hold) {
+        c->parent_phases.hold(obj);
+    }
 
     if (kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
                                KVM_DEV_ARM_ITS_CTRL_RESET)) {
@@ -241,12 +243,14 @@ static Property kvm_arm_its_props[] = {
 static void kvm_arm_its_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
+    ResettableClass *rc = RESETTABLE_CLASS(klass);
     GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass);
     KVMARMITSClass *ic = KVM_ARM_ITS_CLASS(klass);
 
     dc->realize = kvm_arm_its_realize;
     device_class_set_props(dc, kvm_arm_its_props);
-    device_class_set_parent_reset(dc, kvm_arm_its_reset, &ic->parent_reset);
+    resettable_class_set_parent_phases(rc, NULL, kvm_arm_its_reset_hold, NULL,
+                                       &ic->parent_phases);
     icc->send_msi = kvm_its_send_msi;
     icc->pre_save = kvm_arm_its_pre_save;
     icc->post_load = kvm_arm_its_post_load;
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 26/29] hw/arm/boot: set initrd with #address-cells type in fdt
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (24 preceding siblings ...)
  2022-12-15 12:50 ` [PULL 25/29] hw/intc: Convert TYPE_KVM_ARM_ITS " Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 27/29] target/arm: align exposed ID registers with Linux Peter Maydell
                   ` (2 subsequent siblings)
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

From: Schspa Shi <schspa@gmail.com>

We use 32bit value for linux,initrd-[start/end], when we have
loader_start > 4GB, there will be a wrong initrd_start passed
to the kernel, and the kernel will report the following warning.

[    0.000000] ------------[ cut here ]------------
[    0.000000] initrd not fully accessible via the linear mapping -- please check your bootloader ...
[    0.000000] WARNING: CPU: 0 PID: 0 at arch/arm64/mm/init.c:355 arm64_memblock_init+0x158/0x244
[    0.000000] Modules linked in:
[    0.000000] CPU: 0 PID: 0 Comm: swapper Tainted: G        W          6.1.0-rc3-13250-g30a0b95b1335-dirty #28
[    0.000000] Hardware name: Horizon Sigi Virtual development board (DT)
[    0.000000] pstate: 600000c5 (nZCv daIF -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[    0.000000] pc : arm64_memblock_init+0x158/0x244
[    0.000000] lr : arm64_memblock_init+0x158/0x244
[    0.000000] sp : ffff800009273df0
[    0.000000] x29: ffff800009273df0 x28: 0000001000cc0010 x27: 0000800000000000
[    0.000000] x26: 000000000050a3e2 x25: ffff800008b46000 x24: ffff800008b46000
[    0.000000] x23: ffff800008a53000 x22: ffff800009420000 x21: ffff800008a53000
[    0.000000] x20: 0000000004000000 x19: 0000000004000000 x18: 00000000ffff1020
[    0.000000] x17: 6568632065736165 x16: 6c70202d2d20676e x15: 697070616d207261
[    0.000000] x14: 656e696c20656874 x13: 0a2e2e2e20726564 x12: 0000000000000000
[    0.000000] x11: 0000000000000000 x10: 00000000ffffffff x9 : 0000000000000000
[    0.000000] x8 : 0000000000000000 x7 : 796c6c756620746f x6 : 6e20647274696e69
[    0.000000] x5 : ffff8000093c7c47 x4 : ffff800008a2102f x3 : ffff800009273a88
[    0.000000] x2 : 80000000fffff038 x1 : 00000000000000c0 x0 : 0000000000000056
[    0.000000] Call trace:
[    0.000000]  arm64_memblock_init+0x158/0x244
[    0.000000]  setup_arch+0x164/0x1cc
[    0.000000]  start_kernel+0x94/0x4ac
[    0.000000]  __primary_switched+0xb4/0xbc
[    0.000000] ---[ end trace 0000000000000000 ]---
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000001000000000-0x0000001007ffffff]

This doesn't affect any machine types we currently support, because
for all of our machine types the RAM starts well below the 4GB
mark, but it does demonstrate that we're not currently writing
the device-tree properties quite as intended.

To fix it, we can change it to write these values to the dtb using a
type width matching #address-cells.  This is the intended size for
these dtb properties, and is how u-boot, for instance, writes them,
although in practice the Linux kernel will cope with them being any
width as long as they're big enough to fit the value.

Signed-off-by: Schspa Shi <schspa@gmail.com>
Message-id: 20221129160724.75667-1-schspa@gmail.com
[PMM: tweaked commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/boot.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 15c2bf1867f..3d7d11f782f 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -656,15 +656,17 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo,
     }
 
     if (binfo->initrd_size) {
-        rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
-                                   binfo->initrd_start);
+        rc = qemu_fdt_setprop_sized_cells(fdt, "/chosen", "linux,initrd-start",
+                                          acells, binfo->initrd_start);
         if (rc < 0) {
             fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
             goto fail;
         }
 
-        rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
-                                   binfo->initrd_start + binfo->initrd_size);
+        rc = qemu_fdt_setprop_sized_cells(fdt, "/chosen", "linux,initrd-end",
+                                          acells,
+                                          binfo->initrd_start +
+                                          binfo->initrd_size);
         if (rc < 0) {
             fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
             goto fail;
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 27/29] target/arm: align exposed ID registers with Linux
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (25 preceding siblings ...)
  2022-12-15 12:50 ` [PULL 26/29] hw/arm/boot: set initrd with #address-cells type in fdt Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 28/29] hw/misc: Move some arm-related files from specific_ss into softmmu_ss Peter Maydell
  2022-12-15 12:50 ` [PULL 29/29] target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator Peter Maydell
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

From: Zhuojia Shen <chaosdefinition@hotmail.com>

In CPUID registers exposed to userspace, some registers were missing
and some fields were not exposed.  This patch aligns exposed ID
registers and their fields with what the upstream kernel currently
exposes.

Specifically, the following new ID registers/fields are exposed to
userspace:

ID_AA64PFR1_EL1.BT:       bits 3-0
ID_AA64PFR1_EL1.MTE:      bits 11-8
ID_AA64PFR1_EL1.SME:      bits 27-24

ID_AA64ZFR0_EL1.SVEver:   bits 3-0
ID_AA64ZFR0_EL1.AES:      bits 7-4
ID_AA64ZFR0_EL1.BitPerm:  bits 19-16
ID_AA64ZFR0_EL1.BF16:     bits 23-20
ID_AA64ZFR0_EL1.SHA3:     bits 35-32
ID_AA64ZFR0_EL1.SM4:      bits 43-40
ID_AA64ZFR0_EL1.I8MM:     bits 47-44
ID_AA64ZFR0_EL1.F32MM:    bits 55-52
ID_AA64ZFR0_EL1.F64MM:    bits 59-56

ID_AA64SMFR0_EL1.F32F32:  bit 32
ID_AA64SMFR0_EL1.B16F32:  bit 34
ID_AA64SMFR0_EL1.F16F32:  bit 35
ID_AA64SMFR0_EL1.I8I32:   bits 39-36
ID_AA64SMFR0_EL1.F64F64:  bit 48
ID_AA64SMFR0_EL1.I16I64:  bits 55-52
ID_AA64SMFR0_EL1.FA64:    bit 63

ID_AA64MMFR0_EL1.ECV:     bits 63-60

ID_AA64MMFR1_EL1.AFP:     bits 47-44

ID_AA64MMFR2_EL1.AT:      bits 35-32

ID_AA64ISAR0_EL1.RNDR:    bits 63-60

ID_AA64ISAR1_EL1.FRINTTS: bits 35-32
ID_AA64ISAR1_EL1.BF16:    bits 47-44
ID_AA64ISAR1_EL1.DGH:     bits 51-48
ID_AA64ISAR1_EL1.I8MM:    bits 55-52

ID_AA64ISAR2_EL1.WFxT:    bits 3-0
ID_AA64ISAR2_EL1.RPRES:   bits 7-4
ID_AA64ISAR2_EL1.GPA3:    bits 11-8
ID_AA64ISAR2_EL1.APA3:    bits 15-12

The code is also refactored to use symbolic names for ID register fields
for better readability and maintainability.

Signed-off-by: Zhuojia Shen <chaosdefinition@hotmail.com>
Message-id: DS7PR12MB6309BC9133877BCC6FC419FEAC0D9@DS7PR12MB6309.namprd12.prod.outlook.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/helper.c | 96 +++++++++++++++++++++++++++++++++++++--------
 1 file changed, 79 insertions(+), 17 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index bac2ea62c44..6efc632b20d 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7864,31 +7864,89 @@ void register_cp_regs_for_features(ARMCPU *cpu)
 #ifdef CONFIG_USER_ONLY
         static const ARMCPRegUserSpaceInfo v8_user_idregs[] = {
             { .name = "ID_AA64PFR0_EL1",
-              .exported_bits = 0x000f000f00ff0000,
-              .fixed_bits    = 0x0000000000000011 },
+              .exported_bits = R_ID_AA64PFR0_FP_MASK |
+                               R_ID_AA64PFR0_ADVSIMD_MASK |
+                               R_ID_AA64PFR0_SVE_MASK |
+                               R_ID_AA64PFR0_DIT_MASK,
+              .fixed_bits = (0x1 << R_ID_AA64PFR0_EL0_SHIFT) |
+                            (0x1 << R_ID_AA64PFR0_EL1_SHIFT) },
             { .name = "ID_AA64PFR1_EL1",
-              .exported_bits = 0x00000000000000f0 },
+              .exported_bits = R_ID_AA64PFR1_BT_MASK |
+                               R_ID_AA64PFR1_SSBS_MASK |
+                               R_ID_AA64PFR1_MTE_MASK |
+                               R_ID_AA64PFR1_SME_MASK },
             { .name = "ID_AA64PFR*_EL1_RESERVED",
-              .is_glob = true                     },
-            { .name = "ID_AA64ZFR0_EL1"           },
+              .is_glob = true },
+            { .name = "ID_AA64ZFR0_EL1",
+              .exported_bits = R_ID_AA64ZFR0_SVEVER_MASK |
+                               R_ID_AA64ZFR0_AES_MASK |
+                               R_ID_AA64ZFR0_BITPERM_MASK |
+                               R_ID_AA64ZFR0_BFLOAT16_MASK |
+                               R_ID_AA64ZFR0_SHA3_MASK |
+                               R_ID_AA64ZFR0_SM4_MASK |
+                               R_ID_AA64ZFR0_I8MM_MASK |
+                               R_ID_AA64ZFR0_F32MM_MASK |
+                               R_ID_AA64ZFR0_F64MM_MASK },
+            { .name = "ID_AA64SMFR0_EL1",
+              .exported_bits = R_ID_AA64SMFR0_F32F32_MASK |
+                               R_ID_AA64SMFR0_B16F32_MASK |
+                               R_ID_AA64SMFR0_F16F32_MASK |
+                               R_ID_AA64SMFR0_I8I32_MASK |
+                               R_ID_AA64SMFR0_F64F64_MASK |
+                               R_ID_AA64SMFR0_I16I64_MASK |
+                               R_ID_AA64SMFR0_FA64_MASK },
             { .name = "ID_AA64MMFR0_EL1",
-              .fixed_bits    = 0x00000000ff000000 },
-            { .name = "ID_AA64MMFR1_EL1"          },
+              .exported_bits = R_ID_AA64MMFR0_ECV_MASK,
+              .fixed_bits = (0xf << R_ID_AA64MMFR0_TGRAN64_SHIFT) |
+                            (0xf << R_ID_AA64MMFR0_TGRAN4_SHIFT) },
+            { .name = "ID_AA64MMFR1_EL1",
+              .exported_bits = R_ID_AA64MMFR1_AFP_MASK },
+            { .name = "ID_AA64MMFR2_EL1",
+              .exported_bits = R_ID_AA64MMFR2_AT_MASK },
             { .name = "ID_AA64MMFR*_EL1_RESERVED",
-              .is_glob = true                     },
+              .is_glob = true },
             { .name = "ID_AA64DFR0_EL1",
-              .fixed_bits    = 0x0000000000000006 },
-            { .name = "ID_AA64DFR1_EL1"           },
+              .fixed_bits = (0x6 << R_ID_AA64DFR0_DEBUGVER_SHIFT) },
+            { .name = "ID_AA64DFR1_EL1" },
             { .name = "ID_AA64DFR*_EL1_RESERVED",
-              .is_glob = true                     },
+              .is_glob = true },
             { .name = "ID_AA64AFR*",
-              .is_glob = true                     },
+              .is_glob = true },
             { .name = "ID_AA64ISAR0_EL1",
-              .exported_bits = 0x00fffffff0fffff0 },
+              .exported_bits = R_ID_AA64ISAR0_AES_MASK |
+                               R_ID_AA64ISAR0_SHA1_MASK |
+                               R_ID_AA64ISAR0_SHA2_MASK |
+                               R_ID_AA64ISAR0_CRC32_MASK |
+                               R_ID_AA64ISAR0_ATOMIC_MASK |
+                               R_ID_AA64ISAR0_RDM_MASK |
+                               R_ID_AA64ISAR0_SHA3_MASK |
+                               R_ID_AA64ISAR0_SM3_MASK |
+                               R_ID_AA64ISAR0_SM4_MASK |
+                               R_ID_AA64ISAR0_DP_MASK |
+                               R_ID_AA64ISAR0_FHM_MASK |
+                               R_ID_AA64ISAR0_TS_MASK |
+                               R_ID_AA64ISAR0_RNDR_MASK },
             { .name = "ID_AA64ISAR1_EL1",
-              .exported_bits = 0x000000f0ffffffff },
+              .exported_bits = R_ID_AA64ISAR1_DPB_MASK |
+                               R_ID_AA64ISAR1_APA_MASK |
+                               R_ID_AA64ISAR1_API_MASK |
+                               R_ID_AA64ISAR1_JSCVT_MASK |
+                               R_ID_AA64ISAR1_FCMA_MASK |
+                               R_ID_AA64ISAR1_LRCPC_MASK |
+                               R_ID_AA64ISAR1_GPA_MASK |
+                               R_ID_AA64ISAR1_GPI_MASK |
+                               R_ID_AA64ISAR1_FRINTTS_MASK |
+                               R_ID_AA64ISAR1_SB_MASK |
+                               R_ID_AA64ISAR1_BF16_MASK |
+                               R_ID_AA64ISAR1_DGH_MASK |
+                               R_ID_AA64ISAR1_I8MM_MASK },
+            { .name = "ID_AA64ISAR2_EL1",
+              .exported_bits = R_ID_AA64ISAR2_WFXT_MASK |
+                               R_ID_AA64ISAR2_RPRES_MASK |
+                               R_ID_AA64ISAR2_GPA3_MASK |
+                               R_ID_AA64ISAR2_APA3_MASK },
             { .name = "ID_AA64ISAR*_EL1_RESERVED",
-              .is_glob = true                     },
+              .is_glob = true },
         };
         modify_arm_cp_regs(v8_idregs, v8_user_idregs);
 #endif
@@ -8206,8 +8264,12 @@ void register_cp_regs_for_features(ARMCPU *cpu)
 #ifdef CONFIG_USER_ONLY
         static const ARMCPRegUserSpaceInfo id_v8_user_midr_cp_reginfo[] = {
             { .name = "MIDR_EL1",
-              .exported_bits = 0x00000000ffffffff },
-            { .name = "REVIDR_EL1"                },
+              .exported_bits = R_MIDR_EL1_REVISION_MASK |
+                               R_MIDR_EL1_PARTNUM_MASK |
+                               R_MIDR_EL1_ARCHITECTURE_MASK |
+                               R_MIDR_EL1_VARIANT_MASK |
+                               R_MIDR_EL1_IMPLEMENTER_MASK },
+            { .name = "REVIDR_EL1" },
         };
         modify_arm_cp_regs(id_v8_midr_cp_reginfo, id_v8_user_midr_cp_reginfo);
 #endif
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 28/29] hw/misc: Move some arm-related files from specific_ss into softmmu_ss
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (26 preceding siblings ...)
  2022-12-15 12:50 ` [PULL 27/29] target/arm: align exposed ID registers with Linux Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  2022-12-15 12:50 ` [PULL 29/29] target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator Peter Maydell
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

From: Thomas Huth <thuth@redhat.com>

The header target/arm/kvm-consts.h checks CONFIG_KVM which is marked as
poisoned in common code, so the files that include this header have to
be added to specific_ss and recompiled for each, qemu-system-arm and
qemu-system-aarch64. However, since the kvm headers are only optionally
used in kvm-constants.h for some sanity checks, we can additionally
check the NEED_CPU_H macro first to avoid the poisoned CONFIG_KVM macro,
so kvm-constants.h can also be used from "common" files (without the
sanity checks - which should be OK since they are still done from other
target-specific files instead). This way, and by adjusting some other
include statements in the related files here and there, we can move some
files from specific_ss into softmmu_ss, so that they only need to be
compiled once during the build process.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221202154023.293614-1-thuth@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/misc/xlnx-zynqmp-apu-ctrl.h |  2 +-
 target/arm/kvm-consts.h                |  8 ++++----
 hw/misc/imx6_src.c                     |  2 +-
 hw/misc/iotkit-sysctl.c                |  1 -
 hw/misc/meson.build                    | 11 +++++------
 5 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/include/hw/misc/xlnx-zynqmp-apu-ctrl.h b/include/hw/misc/xlnx-zynqmp-apu-ctrl.h
index b8ca9434afb..c3bf3c1583b 100644
--- a/include/hw/misc/xlnx-zynqmp-apu-ctrl.h
+++ b/include/hw/misc/xlnx-zynqmp-apu-ctrl.h
@@ -13,7 +13,7 @@
 
 #include "hw/sysbus.h"
 #include "hw/register.h"
-#include "target/arm/cpu.h"
+#include "target/arm/cpu-qom.h"
 
 #define TYPE_XLNX_ZYNQMP_APU_CTRL "xlnx.apu-ctrl"
 OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPAPUCtrl, XLNX_ZYNQMP_APU_CTRL)
diff --git a/target/arm/kvm-consts.h b/target/arm/kvm-consts.h
index faacf96fdc7..09967ec5e64 100644
--- a/target/arm/kvm-consts.h
+++ b/target/arm/kvm-consts.h
@@ -14,16 +14,16 @@
 #ifndef ARM_KVM_CONSTS_H
 #define ARM_KVM_CONSTS_H
 
+#ifdef NEED_CPU_H
 #ifdef CONFIG_KVM
 #include <linux/kvm.h>
 #include <linux/psci.h>
-
 #define MISMATCH_CHECK(X, Y) QEMU_BUILD_BUG_ON(X != Y)
+#endif
+#endif
 
-#else
-
+#ifndef MISMATCH_CHECK
 #define MISMATCH_CHECK(X, Y) QEMU_BUILD_BUG_ON(0)
-
 #endif
 
 #define CP_REG_SIZE_SHIFT 52
diff --git a/hw/misc/imx6_src.c b/hw/misc/imx6_src.c
index 7b0e968804a..a9c64d06ebc 100644
--- a/hw/misc/imx6_src.c
+++ b/hw/misc/imx6_src.c
@@ -15,7 +15,7 @@
 #include "qemu/log.h"
 #include "qemu/main-loop.h"
 #include "qemu/module.h"
-#include "arm-powerctl.h"
+#include "target/arm/arm-powerctl.h"
 #include "hw/core/cpu.h"
 
 #ifndef DEBUG_IMX6_SRC
diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c
index 7147e2f84e6..e664215ee67 100644
--- a/hw/misc/iotkit-sysctl.c
+++ b/hw/misc/iotkit-sysctl.c
@@ -30,7 +30,6 @@
 #include "hw/qdev-properties.h"
 #include "hw/arm/armsse-version.h"
 #include "target/arm/arm-powerctl.h"
-#include "target/arm/cpu.h"
 
 REG32(SECDBGSTAT, 0x0)
 REG32(SECDBGSET, 0x4)
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 95268eddc07..ed0598dc9eb 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -51,6 +51,7 @@ softmmu_ss.add(when: 'CONFIG_IMX', if_true: files(
   'imx25_ccm.c',
   'imx31_ccm.c',
   'imx6_ccm.c',
+  'imx6_src.c',
   'imx6ul_ccm.c',
   'imx7_ccm.c',
   'imx7_gpr.c',
@@ -84,8 +85,8 @@ softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files(
 ))
 softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c'))
 softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c'))
-specific_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-crf.c'))
-specific_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-apu-ctrl.c'))
+softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-crf.c'))
+softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-apu-ctrl.c'))
 specific_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-crl.c'))
 softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files(
   'xlnx-versal-xramc.c',
@@ -101,6 +102,7 @@ softmmu_ss.add(when: 'CONFIG_TZ_MPC', if_true: files('tz-mpc.c'))
 softmmu_ss.add(when: 'CONFIG_TZ_MSC', if_true: files('tz-msc.c'))
 softmmu_ss.add(when: 'CONFIG_TZ_PPC', if_true: files('tz-ppc.c'))
 softmmu_ss.add(when: 'CONFIG_IOTKIT_SECCTL', if_true: files('iotkit-secctl.c'))
+softmmu_ss.add(when: 'CONFIG_IOTKIT_SYSCTL', if_true: files('iotkit-sysctl.c'))
 softmmu_ss.add(when: 'CONFIG_IOTKIT_SYSINFO', if_true: files('iotkit-sysinfo.c'))
 softmmu_ss.add(when: 'CONFIG_ARMSSE_CPU_PWRCTRL', if_true: files('armsse-cpu-pwrctrl.c'))
 softmmu_ss.add(when: 'CONFIG_ARMSSE_CPUID', if_true: files('armsse-cpuid.c'))
@@ -126,15 +128,12 @@ softmmu_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_ahb_apb_pnp.c'))
 
 specific_ss.add(when: 'CONFIG_AVR_POWER', if_true: files('avr_power.c'))
 
-specific_ss.add(when: 'CONFIG_IMX', if_true: files('imx6_src.c'))
-specific_ss.add(when: 'CONFIG_IOTKIT_SYSCTL', if_true: files('iotkit-sysctl.c'))
-
 specific_ss.add(when: 'CONFIG_MAC_VIA', if_true: files('mac_via.c'))
 
 specific_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_cmgcr.c', 'mips_cpc.c'))
 specific_ss.add(when: 'CONFIG_MIPS_ITU', if_true: files('mips_itu.c'))
 
-specific_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c'))
+softmmu_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c'))
 
 # HPPA devices
 softmmu_ss.add(when: 'CONFIG_LASI', if_true: files('lasi.c'))
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [PULL 29/29] target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator
  2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
                   ` (27 preceding siblings ...)
  2022-12-15 12:50 ` [PULL 28/29] hw/misc: Move some arm-related files from specific_ss into softmmu_ss Peter Maydell
@ 2022-12-15 12:50 ` Peter Maydell
  28 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2022-12-15 12:50 UTC (permalink / raw)
  To: qemu-devel

From: Philippe Mathieu-Daudé <philmd@linaro.org>

When building with --disable-tcg on Darwin we get:

  target/arm/cpu.c:725:16: error: incomplete definition of type 'struct TCGCPUOps'
    cc->tcg_ops->do_interrupt(cs);
    ~~~~~~~~~~~^

Commit 083afd18a9 ("target/arm: Restrict cpu_exec_interrupt()
handler to sysemu") limited this block to system emulation,
but neglected to also limit it to TCG.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-id: 20221209110823.59495-1-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/cpu.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 38d066c294d..0f55004d7e7 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -528,7 +528,7 @@ static void arm_cpu_reset(DeviceState *dev)
     arm_rebuild_hflags(env);
 }
 
-#ifndef CONFIG_USER_ONLY
+#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
 
 static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx,
                                      unsigned int target_el,
@@ -725,7 +725,8 @@ static bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
     cc->tcg_ops->do_interrupt(cs);
     return true;
 }
-#endif /* !CONFIG_USER_ONLY */
+
+#endif /* CONFIG_TCG && !CONFIG_USER_ONLY */
 
 void arm_cpu_update_virq(ARMCPU *cpu)
 {
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 36+ messages in thread

* Re: [PULL 00/29] target-arm queue
  2023-05-18 12:50 [PULL 00/29] target-arm queue Peter Maydell
@ 2023-05-18 14:51 ` Richard Henderson
  0 siblings, 0 replies; 36+ messages in thread
From: Richard Henderson @ 2023-05-18 14:51 UTC (permalink / raw)
  To: Peter Maydell, qemu-devel

On 5/18/23 05:50, Peter Maydell wrote:
> Hi; this mostly contains the first slice of A64 decodetree
> patches, plus some other minor pieces. It also has the
> enablement of MTE for KVM guests.
> 
> thanks
> -- PMM
> 
> The following changes since commit d27e7c359330ba7020bdbed7ed2316cb4cf6ffc1:
> 
>    qapi/parser: Drop two bad type hints for now (2023-05-17 10:18:33 -0700)
> 
> are available in the Git repository at:
> 
>    https://git.linaro.org/people/pmaydell/qemu-arm.git  tags/pull-target-arm-20230518
> 
> for you to fetch changes up to 91608e2a44f36e79cb83f863b8a7bb57d2c98061:
> 
>    docs: Convert u2f.txt to rST (2023-05-18 11:40:32 +0100)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * Fix vd == vm overlap in sve_ldff1_z
>   * Add support for MTE with KVM guests
>   * Add RAZ/WI handling for DBGDTR[TX|RX]
>   * Start of conversion of A64 decoder to decodetree
>   * Saturate L2CTLR_EL1 core count field rather than overflowing
>   * vexpress: Avoid trivial memory leak of 'flashalias'
>   * sbsa-ref: switch default cpu core to Neoverse-N1
>   * sbsa-ref: use Bochs graphics card instead of VGA
>   * MAINTAINERS: Add Marcin Juszkiewicz to sbsa-ref reviewer list
>   * docs: Convert u2f.txt to rST

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate.


r~



^ permalink raw reply	[flat|nested] 36+ messages in thread

* [PULL 00/29] target-arm queue
@ 2023-05-18 12:50 Peter Maydell
  2023-05-18 14:51 ` Richard Henderson
  0 siblings, 1 reply; 36+ messages in thread
From: Peter Maydell @ 2023-05-18 12:50 UTC (permalink / raw)
  To: qemu-devel

Hi; this mostly contains the first slice of A64 decodetree
patches, plus some other minor pieces. It also has the
enablement of MTE for KVM guests.

thanks
-- PMM

The following changes since commit d27e7c359330ba7020bdbed7ed2316cb4cf6ffc1:

  qapi/parser: Drop two bad type hints for now (2023-05-17 10:18:33 -0700)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230518

for you to fetch changes up to 91608e2a44f36e79cb83f863b8a7bb57d2c98061:

  docs: Convert u2f.txt to rST (2023-05-18 11:40:32 +0100)

----------------------------------------------------------------
target-arm queue:
 * Fix vd == vm overlap in sve_ldff1_z
 * Add support for MTE with KVM guests
 * Add RAZ/WI handling for DBGDTR[TX|RX]
 * Start of conversion of A64 decoder to decodetree
 * Saturate L2CTLR_EL1 core count field rather than overflowing
 * vexpress: Avoid trivial memory leak of 'flashalias'
 * sbsa-ref: switch default cpu core to Neoverse-N1
 * sbsa-ref: use Bochs graphics card instead of VGA
 * MAINTAINERS: Add Marcin Juszkiewicz to sbsa-ref reviewer list
 * docs: Convert u2f.txt to rST

----------------------------------------------------------------
Alex Bennée (1):
      target/arm: add RAZ/WI handling for DBGDTR[TX|RX]

Cornelia Huck (1):
      arm/kvm: add support for MTE

Marcin Juszkiewicz (3):
      sbsa-ref: switch default cpu core to Neoverse-N1
      Maintainers: add myself as reviewer for sbsa-ref
      sbsa-ref: use Bochs graphics card instead of VGA

Peter Maydell (14):
      target/arm: Create decodetree skeleton for A64
      target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder
      target/arm: Convert Extract instructions to decodetree
      target/arm: Convert unconditional branch immediate to decodetree
      target/arm: Convert CBZ, CBNZ to decodetree
      target/arm: Convert TBZ, TBNZ to decodetree
      target/arm: Convert conditional branch insns to decodetree
      target/arm: Convert BR, BLR, RET to decodetree
      target/arm: Convert BRA[AB]Z, BLR[AB]Z, RETA[AB] to decodetree
      target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree
      target/arm: Convert ERET, ERETAA, ERETAB to decodetree
      target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing
      hw/arm/vexpress: Avoid trivial memory leak of 'flashalias'
      docs: Convert u2f.txt to rST

Richard Henderson (10):
      target/arm: Fix vd == vm overlap in sve_ldff1_z
      target/arm: Split out disas_a64_legacy
      target/arm: Convert PC-rel addressing to decodetree
      target/arm: Split gen_add_CC and gen_sub_CC
      target/arm: Convert Add/subtract (immediate) to decodetree
      target/arm: Convert Add/subtract (immediate with tags) to decodetree
      target/arm: Replace bitmask64 with MAKE_64BIT_MASK
      target/arm: Convert Logical (immediate) to decodetree
      target/arm: Convert Move wide (immediate) to decodetree
      target/arm: Convert Bitfield to decodetree

 MAINTAINERS                      |    1 +
 docs/system/device-emulation.rst |    1 +
 docs/system/devices/usb-u2f.rst  |   93 +++
 docs/system/devices/usb.rst      |    2 +-
 docs/u2f.txt                     |  110 ----
 target/arm/cpu.h                 |    4 +
 target/arm/kvm_arm.h             |   19 +
 target/arm/tcg/translate.h       |    5 +
 target/arm/tcg/a64.decode        |  152 +++++
 hw/arm/sbsa-ref.c                |    4 +-
 hw/arm/vexpress.c                |   40 +-
 hw/arm/virt.c                    |   73 ++-
 target/arm/cortex-regs.c         |   11 +-
 target/arm/cpu.c                 |    9 +-
 target/arm/debug_helper.c        |   11 +-
 target/arm/kvm.c                 |   35 +
 target/arm/kvm64.c               |    5 +
 target/arm/tcg/sve_helper.c      |    6 +
 target/arm/tcg/translate-a64.c   | 1321 ++++++++++++++++----------------------
 target/arm/tcg/meson.build       |    1 +
 20 files changed, 979 insertions(+), 924 deletions(-)
 create mode 100644 docs/system/devices/usb-u2f.rst
 delete mode 100644 docs/u2f.txt
 create mode 100644 target/arm/tcg/a64.decode


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PULL 00/29] target-arm queue
  2020-06-05 16:49 Peter Maydell
  2020-06-05 20:10 ` no-reply
@ 2020-06-08 10:04 ` Peter Maydell
  1 sibling, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-06-08 10:04 UTC (permalink / raw)
  To: QEMU Developers

On Fri, 5 Jun 2020 at 17:50, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Arm queue; some of the simpler stuff, things other have reviewed (thanks!), etc.
>
> -- PMM
>
> The following changes since commit 5d2f557b47dfbf8f23277a5bdd8473d4607c681a:
>
>   Merge remote-tracking branch 'remotes/kraxel/tags/vga-20200605-pull-request' into staging (2020-06-05 13:53:05 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200605
>
> for you to fetch changes up to 2c35a39eda0b16c2ed85c94cec204bf5efb97812:
>
>   target/arm: Convert Neon one-register-and-immediate insns to decodetree (2020-06-05 17:23:10 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  hw/ssi/imx_spi: Handle tx burst lengths other than 8 correctly
>  hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask()
>  hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()
>  target/arm: Convert crypto insns to gvec
>  hw/adc/stm32f2xx_adc: Correct memory region size and access size
>  tests/acceptance: Add a boot test for the xlnx-versal-virt machine
>  docs/system: Document Aspeed boards
>  raspi: Add model of the USB controller
>  target/arm: Convert 2-reg-and-shift and 1-reg-imm Neon insns to decodetree
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.

-- PMM


^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [PULL 00/29] target-arm queue
  2020-06-05 16:49 Peter Maydell
@ 2020-06-05 20:10 ` no-reply
  2020-06-08 10:04 ` Peter Maydell
  1 sibling, 0 replies; 36+ messages in thread
From: no-reply @ 2020-06-05 20:10 UTC (permalink / raw)
  To: peter.maydell; +Cc: qemu-devel

Patchew URL: https://patchew.org/QEMU/20200605165007.12095-1-peter.maydell@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20200605165007.12095-1-peter.maydell@linaro.org
Subject: [PULL 00/29] target-arm queue
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
   5d2f557..175198a  master     -> master
Switched to a new branch 'test'
8d19bb1 target/arm: Convert Neon one-register-and-immediate insns to decodetree
c07ebcb target/arm: Convert VCVT fixed-point ops to decodetree
595e77e target/arm: Convert Neon VSHLL, VMOVL to decodetree
0f42979 target/arm: Convert Neon narrowing shifts with op==9 to decodetree
93549e8 target/arm: Convert Neon narrowing shifts with op==8 to decodetree
f0efe71 target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree
c0457fa target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree
7e946c5 target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree
3daf164 target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree
725f9e4 raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host
2a56c0c wire in the dwc-hsotg (dwc2) USB host controller emulation
f9720e8 usb: add short-packet handling to usb-storage driver
d6df0bc dwc-hsotg (dwc2) USB host controller emulation
26ec413 dwc-hsotg (dwc2) USB host controller state definitions
27c3b07 dwc-hsotg (dwc2) USB host controller register definitions
3f982e5 raspi: add BCM2835 SOC MPHI emulation
21a59c9 docs/system: Document Aspeed boards
65b3e83 tests/acceptance: Add a boot test for the xlnx-versal-virt machine
a494cb0 hw/adc/stm32f2xx_adc: Correct memory region size and access size
abbdeb5 target/arm: Split helper_crypto_sm3tt
0db4fd4 target/arm: Split helper_crypto_sha1_3reg
00ad42c target/arm: Convert sha1 and sha256 to gvec helpers
96fc084 target/arm: Convert sha512 and sm3 to gvec helpers
5199605 target/arm: Convert rax1 to gvec helpers
7cd9082 target/arm: Convert aes and sm4 to gvec helpers
188335a hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()
240dce6 hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask()
b09557e hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave
f979463 hw/ssi/imx_spi: changed while statement to prevent underflow

=== OUTPUT BEGIN ===
1/29 Checking commit f979463e1fdd (hw/ssi/imx_spi: changed while statement to prevent underflow)
2/29 Checking commit b09557efe185 (hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave)
3/29 Checking commit 240dce66be50 (hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask())
4/29 Checking commit 188335aa83c3 (hw/arm/pxa2xx: Replace printf() call by qemu_log_mask())
5/29 Checking commit 7cd9082434bd (target/arm: Convert aes and sm4 to gvec helpers)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#396: 
new file mode 100644

total: 0 errors, 1 warnings, 364 lines checked

Patch 5/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/29 Checking commit 519960531b00 (target/arm: Convert rax1 to gvec helpers)
7/29 Checking commit 96fc08401629 (target/arm: Convert sha512 and sm3 to gvec helpers)
8/29 Checking commit 00ad42c753c1 (target/arm: Convert sha1 and sha256 to gvec helpers)
ERROR: spaces required around that '*' (ctx:WxV)
#270: FILE: target/arm/translate-neon.inc.c:735:
+    static bool trans_##NAME##_3s(DisasContext *s, arg_3same *a)        \
                                                              ^

total: 1 errors, 0 warnings, 366 lines checked

Patch 8/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

9/29 Checking commit 0db4fd4a19b7 (target/arm: Split helper_crypto_sha1_3reg)
ERROR: spaces required around that '*' (ctx:WxV)
#246: FILE: target/arm/translate-neon.inc.c:698:
+    static bool trans_##NAME##_3s(DisasContext *s, arg_3same *a)        \
                                                              ^

total: 1 errors, 0 warnings, 243 lines checked

Patch 9/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

10/29 Checking commit abbdeb5eb100 (target/arm: Split helper_crypto_sm3tt)
11/29 Checking commit a494cb00d665 (hw/adc/stm32f2xx_adc: Correct memory region size and access size)
12/29 Checking commit 65b3e832526b (tests/acceptance: Add a boot test for the xlnx-versal-virt machine)
13/29 Checking commit 21a59c942494 (docs/system: Document Aspeed boards)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#14: 
new file mode 100644

total: 0 errors, 1 warnings, 92 lines checked

Patch 13/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/29 Checking commit 3f982e580b4f (raspi: add BCM2835 SOC MPHI emulation)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#67: 
new file mode 100644

WARNING: line over 80 characters
#222: FILE: hw/misc/bcm2835_mphi.c:151:
+    memory_region_init_io(&s->iomem, obj, &mphi_mmio_ops, s, "mphi", MPHI_MMIO_SIZE);

total: 0 errors, 2 warnings, 285 lines checked

Patch 14/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/29 Checking commit 27c3b07beecb (dwc-hsotg (dwc2) USB host controller register definitions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#21: 
new file mode 100644

WARNING: architecture specific defines should be avoided
#67: FILE: include/hw/usb/dwc2-regs.h:42:
+#ifndef __DWC2_HW_H__

ERROR: code indent should never use tabs
#70: FILE: include/hw/usb/dwc2-regs.h:45:
+#define HSOTG_REG(x)^I(x)$

ERROR: code indent should never use tabs
#72: FILE: include/hw/usb/dwc2-regs.h:47:
+#define GOTGCTL^I^I^I^IHSOTG_REG(0x000)$

ERROR: code indent should never use tabs
#73: FILE: include/hw/usb/dwc2-regs.h:48:
+#define GOTGCTL_CHIRPEN^I^I^IBIT(27)$

ERROR: code indent should never use tabs
#74: FILE: include/hw/usb/dwc2-regs.h:49:
+#define GOTGCTL_MULT_VALID_BC_MASK^I(0x1f << 22)$

ERROR: code indent should never use tabs
#75: FILE: include/hw/usb/dwc2-regs.h:50:
+#define GOTGCTL_MULT_VALID_BC_SHIFT^I22$

ERROR: code indent should never use tabs
#76: FILE: include/hw/usb/dwc2-regs.h:51:
+#define GOTGCTL_OTGVER^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#77: FILE: include/hw/usb/dwc2-regs.h:52:
+#define GOTGCTL_BSESVLD^I^I^IBIT(19)$

ERROR: code indent should never use tabs
#78: FILE: include/hw/usb/dwc2-regs.h:53:
+#define GOTGCTL_ASESVLD^I^I^IBIT(18)$

ERROR: code indent should never use tabs
#79: FILE: include/hw/usb/dwc2-regs.h:54:
+#define GOTGCTL_DBNC_SHORT^I^IBIT(17)$

ERROR: code indent should never use tabs
#80: FILE: include/hw/usb/dwc2-regs.h:55:
+#define GOTGCTL_CONID_B^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#81: FILE: include/hw/usb/dwc2-regs.h:56:
+#define GOTGCTL_DBNCE_FLTR_BYPASS^IBIT(15)$

ERROR: code indent should never use tabs
#82: FILE: include/hw/usb/dwc2-regs.h:57:
+#define GOTGCTL_DEVHNPEN^I^IBIT(11)$

ERROR: code indent should never use tabs
#83: FILE: include/hw/usb/dwc2-regs.h:58:
+#define GOTGCTL_HSTSETHNPEN^I^IBIT(10)$

ERROR: code indent should never use tabs
#84: FILE: include/hw/usb/dwc2-regs.h:59:
+#define GOTGCTL_HNPREQ^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#85: FILE: include/hw/usb/dwc2-regs.h:60:
+#define GOTGCTL_HSTNEGSCS^I^IBIT(8)$

ERROR: code indent should never use tabs
#86: FILE: include/hw/usb/dwc2-regs.h:61:
+#define GOTGCTL_SESREQ^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#87: FILE: include/hw/usb/dwc2-regs.h:62:
+#define GOTGCTL_SESREQSCS^I^IBIT(0)$

ERROR: code indent should never use tabs
#89: FILE: include/hw/usb/dwc2-regs.h:64:
+#define GOTGINT^I^I^I^IHSOTG_REG(0x004)$

ERROR: code indent should never use tabs
#90: FILE: include/hw/usb/dwc2-regs.h:65:
+#define GOTGINT_DBNCE_DONE^I^IBIT(19)$

ERROR: code indent should never use tabs
#91: FILE: include/hw/usb/dwc2-regs.h:66:
+#define GOTGINT_A_DEV_TOUT_CHG^I^IBIT(18)$

ERROR: code indent should never use tabs
#92: FILE: include/hw/usb/dwc2-regs.h:67:
+#define GOTGINT_HST_NEG_DET^I^IBIT(17)$

ERROR: code indent should never use tabs
#93: FILE: include/hw/usb/dwc2-regs.h:68:
+#define GOTGINT_HST_NEG_SUC_STS_CHNG^IBIT(9)$

ERROR: code indent should never use tabs
#94: FILE: include/hw/usb/dwc2-regs.h:69:
+#define GOTGINT_SES_REQ_SUC_STS_CHNG^IBIT(8)$

ERROR: code indent should never use tabs
#95: FILE: include/hw/usb/dwc2-regs.h:70:
+#define GOTGINT_SES_END_DET^I^IBIT(2)$

ERROR: code indent should never use tabs
#97: FILE: include/hw/usb/dwc2-regs.h:72:
+#define GAHBCFG^I^I^I^IHSOTG_REG(0x008)$

ERROR: code indent should never use tabs
#98: FILE: include/hw/usb/dwc2-regs.h:73:
+#define GAHBCFG_AHB_SINGLE^I^IBIT(23)$

ERROR: code indent should never use tabs
#99: FILE: include/hw/usb/dwc2-regs.h:74:
+#define GAHBCFG_NOTI_ALL_DMA_WRIT^IBIT(22)$

ERROR: code indent should never use tabs
#100: FILE: include/hw/usb/dwc2-regs.h:75:
+#define GAHBCFG_REM_MEM_SUPP^I^IBIT(21)$

ERROR: code indent should never use tabs
#101: FILE: include/hw/usb/dwc2-regs.h:76:
+#define GAHBCFG_P_TXF_EMP_LVL^I^IBIT(8)$

ERROR: code indent should never use tabs
#102: FILE: include/hw/usb/dwc2-regs.h:77:
+#define GAHBCFG_NP_TXF_EMP_LVL^I^IBIT(7)$

ERROR: code indent should never use tabs
#103: FILE: include/hw/usb/dwc2-regs.h:78:
+#define GAHBCFG_DMA_EN^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#104: FILE: include/hw/usb/dwc2-regs.h:79:
+#define GAHBCFG_HBSTLEN_MASK^I^I(0xf << 1)$

ERROR: code indent should never use tabs
#105: FILE: include/hw/usb/dwc2-regs.h:80:
+#define GAHBCFG_HBSTLEN_SHIFT^I^I1$

ERROR: code indent should never use tabs
#106: FILE: include/hw/usb/dwc2-regs.h:81:
+#define GAHBCFG_HBSTLEN_SINGLE^I^I0$

ERROR: code indent should never use tabs
#107: FILE: include/hw/usb/dwc2-regs.h:82:
+#define GAHBCFG_HBSTLEN_INCR^I^I1$

ERROR: code indent should never use tabs
#108: FILE: include/hw/usb/dwc2-regs.h:83:
+#define GAHBCFG_HBSTLEN_INCR4^I^I3$

ERROR: code indent should never use tabs
#109: FILE: include/hw/usb/dwc2-regs.h:84:
+#define GAHBCFG_HBSTLEN_INCR8^I^I5$

ERROR: code indent should never use tabs
#110: FILE: include/hw/usb/dwc2-regs.h:85:
+#define GAHBCFG_HBSTLEN_INCR16^I^I7$

ERROR: code indent should never use tabs
#111: FILE: include/hw/usb/dwc2-regs.h:86:
+#define GAHBCFG_GLBL_INTR_EN^I^IBIT(0)$

ERROR: code indent should never use tabs
#112: FILE: include/hw/usb/dwc2-regs.h:87:
+#define GAHBCFG_CTRL_MASK^I^I(GAHBCFG_P_TXF_EMP_LVL | \$

ERROR: code indent should never use tabs
#113: FILE: include/hw/usb/dwc2-regs.h:88:
+^I^I^I^I^I GAHBCFG_NP_TXF_EMP_LVL | \$

ERROR: code indent should never use tabs
#114: FILE: include/hw/usb/dwc2-regs.h:89:
+^I^I^I^I^I GAHBCFG_DMA_EN | \$

ERROR: code indent should never use tabs
#115: FILE: include/hw/usb/dwc2-regs.h:90:
+^I^I^I^I^I GAHBCFG_GLBL_INTR_EN)$

ERROR: code indent should never use tabs
#117: FILE: include/hw/usb/dwc2-regs.h:92:
+#define GUSBCFG^I^I^I^IHSOTG_REG(0x00C)$

ERROR: code indent should never use tabs
#118: FILE: include/hw/usb/dwc2-regs.h:93:
+#define GUSBCFG_FORCEDEVMODE^I^IBIT(30)$

ERROR: code indent should never use tabs
#119: FILE: include/hw/usb/dwc2-regs.h:94:
+#define GUSBCFG_FORCEHOSTMODE^I^IBIT(29)$

ERROR: code indent should never use tabs
#120: FILE: include/hw/usb/dwc2-regs.h:95:
+#define GUSBCFG_TXENDDELAY^I^IBIT(28)$

ERROR: code indent should never use tabs
#121: FILE: include/hw/usb/dwc2-regs.h:96:
+#define GUSBCFG_ICTRAFFICPULLREMOVE^IBIT(27)$

ERROR: code indent should never use tabs
#122: FILE: include/hw/usb/dwc2-regs.h:97:
+#define GUSBCFG_ICUSBCAP^I^IBIT(26)$

ERROR: code indent should never use tabs
#123: FILE: include/hw/usb/dwc2-regs.h:98:
+#define GUSBCFG_ULPI_INT_PROT_DIS^IBIT(25)$

ERROR: code indent should never use tabs
#124: FILE: include/hw/usb/dwc2-regs.h:99:
+#define GUSBCFG_INDICATORPASSTHROUGH^IBIT(24)$

ERROR: code indent should never use tabs
#125: FILE: include/hw/usb/dwc2-regs.h:100:
+#define GUSBCFG_INDICATORCOMPLEMENT^IBIT(23)$

ERROR: code indent should never use tabs
#126: FILE: include/hw/usb/dwc2-regs.h:101:
+#define GUSBCFG_TERMSELDLPULSE^I^IBIT(22)$

ERROR: code indent should never use tabs
#127: FILE: include/hw/usb/dwc2-regs.h:102:
+#define GUSBCFG_ULPI_INT_VBUS_IND^IBIT(21)$

ERROR: code indent should never use tabs
#128: FILE: include/hw/usb/dwc2-regs.h:103:
+#define GUSBCFG_ULPI_EXT_VBUS_DRV^IBIT(20)$

ERROR: code indent should never use tabs
#129: FILE: include/hw/usb/dwc2-regs.h:104:
+#define GUSBCFG_ULPI_CLK_SUSP_M^I^IBIT(19)$

ERROR: code indent should never use tabs
#130: FILE: include/hw/usb/dwc2-regs.h:105:
+#define GUSBCFG_ULPI_AUTO_RES^I^IBIT(18)$

ERROR: code indent should never use tabs
#131: FILE: include/hw/usb/dwc2-regs.h:106:
+#define GUSBCFG_ULPI_FS_LS^I^IBIT(17)$

ERROR: code indent should never use tabs
#132: FILE: include/hw/usb/dwc2-regs.h:107:
+#define GUSBCFG_OTG_UTMI_FS_SEL^I^IBIT(16)$

ERROR: code indent should never use tabs
#133: FILE: include/hw/usb/dwc2-regs.h:108:
+#define GUSBCFG_PHY_LP_CLK_SEL^I^IBIT(15)$

ERROR: code indent should never use tabs
#134: FILE: include/hw/usb/dwc2-regs.h:109:
+#define GUSBCFG_USBTRDTIM_MASK^I^I(0xf << 10)$

ERROR: code indent should never use tabs
#135: FILE: include/hw/usb/dwc2-regs.h:110:
+#define GUSBCFG_USBTRDTIM_SHIFT^I^I10$

ERROR: code indent should never use tabs
#136: FILE: include/hw/usb/dwc2-regs.h:111:
+#define GUSBCFG_HNPCAP^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#137: FILE: include/hw/usb/dwc2-regs.h:112:
+#define GUSBCFG_SRPCAP^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#138: FILE: include/hw/usb/dwc2-regs.h:113:
+#define GUSBCFG_DDRSEL^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#139: FILE: include/hw/usb/dwc2-regs.h:114:
+#define GUSBCFG_PHYSEL^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#140: FILE: include/hw/usb/dwc2-regs.h:115:
+#define GUSBCFG_FSINTF^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#141: FILE: include/hw/usb/dwc2-regs.h:116:
+#define GUSBCFG_ULPI_UTMI_SEL^I^IBIT(4)$

ERROR: code indent should never use tabs
#142: FILE: include/hw/usb/dwc2-regs.h:117:
+#define GUSBCFG_PHYIF16^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#143: FILE: include/hw/usb/dwc2-regs.h:118:
+#define GUSBCFG_PHYIF8^I^I^I(0 << 3)$

ERROR: code indent should never use tabs
#144: FILE: include/hw/usb/dwc2-regs.h:119:
+#define GUSBCFG_TOUTCAL_MASK^I^I(0x7 << 0)$

ERROR: code indent should never use tabs
#145: FILE: include/hw/usb/dwc2-regs.h:120:
+#define GUSBCFG_TOUTCAL_SHIFT^I^I0$

ERROR: code indent should never use tabs
#146: FILE: include/hw/usb/dwc2-regs.h:121:
+#define GUSBCFG_TOUTCAL_LIMIT^I^I0x7$

ERROR: code indent should never use tabs
#147: FILE: include/hw/usb/dwc2-regs.h:122:
+#define GUSBCFG_TOUTCAL(_x)^I^I((_x) << 0)$

ERROR: code indent should never use tabs
#149: FILE: include/hw/usb/dwc2-regs.h:124:
+#define GRSTCTL^I^I^I^IHSOTG_REG(0x010)$

ERROR: code indent should never use tabs
#150: FILE: include/hw/usb/dwc2-regs.h:125:
+#define GRSTCTL_AHBIDLE^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#151: FILE: include/hw/usb/dwc2-regs.h:126:
+#define GRSTCTL_DMAREQ^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#152: FILE: include/hw/usb/dwc2-regs.h:127:
+#define GRSTCTL_TXFNUM_MASK^I^I(0x1f << 6)$

ERROR: code indent should never use tabs
#153: FILE: include/hw/usb/dwc2-regs.h:128:
+#define GRSTCTL_TXFNUM_SHIFT^I^I6$

ERROR: code indent should never use tabs
#154: FILE: include/hw/usb/dwc2-regs.h:129:
+#define GRSTCTL_TXFNUM_LIMIT^I^I0x1f$

ERROR: code indent should never use tabs
#155: FILE: include/hw/usb/dwc2-regs.h:130:
+#define GRSTCTL_TXFNUM(_x)^I^I((_x) << 6)$

ERROR: code indent should never use tabs
#156: FILE: include/hw/usb/dwc2-regs.h:131:
+#define GRSTCTL_TXFFLSH^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#157: FILE: include/hw/usb/dwc2-regs.h:132:
+#define GRSTCTL_RXFFLSH^I^I^IBIT(4)$

ERROR: code indent should never use tabs
#158: FILE: include/hw/usb/dwc2-regs.h:133:
+#define GRSTCTL_IN_TKNQ_FLSH^I^IBIT(3)$

ERROR: code indent should never use tabs
#159: FILE: include/hw/usb/dwc2-regs.h:134:
+#define GRSTCTL_FRMCNTRRST^I^IBIT(2)$

ERROR: code indent should never use tabs
#160: FILE: include/hw/usb/dwc2-regs.h:135:
+#define GRSTCTL_HSFTRST^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#161: FILE: include/hw/usb/dwc2-regs.h:136:
+#define GRSTCTL_CSFTRST^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#163: FILE: include/hw/usb/dwc2-regs.h:138:
+#define GINTSTS^I^I^I^IHSOTG_REG(0x014)$

ERROR: code indent should never use tabs
#164: FILE: include/hw/usb/dwc2-regs.h:139:
+#define GINTMSK^I^I^I^IHSOTG_REG(0x018)$

ERROR: code indent should never use tabs
#165: FILE: include/hw/usb/dwc2-regs.h:140:
+#define GINTSTS_WKUPINT^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#166: FILE: include/hw/usb/dwc2-regs.h:141:
+#define GINTSTS_SESSREQINT^I^IBIT(30)$

ERROR: code indent should never use tabs
#167: FILE: include/hw/usb/dwc2-regs.h:142:
+#define GINTSTS_DISCONNINT^I^IBIT(29)$

ERROR: code indent should never use tabs
#168: FILE: include/hw/usb/dwc2-regs.h:143:
+#define GINTSTS_CONIDSTSCHNG^I^IBIT(28)$

ERROR: code indent should never use tabs
#169: FILE: include/hw/usb/dwc2-regs.h:144:
+#define GINTSTS_LPMTRANRCVD^I^IBIT(27)$

ERROR: code indent should never use tabs
#170: FILE: include/hw/usb/dwc2-regs.h:145:
+#define GINTSTS_PTXFEMP^I^I^IBIT(26)$

ERROR: code indent should never use tabs
#171: FILE: include/hw/usb/dwc2-regs.h:146:
+#define GINTSTS_HCHINT^I^I^IBIT(25)$

ERROR: code indent should never use tabs
#172: FILE: include/hw/usb/dwc2-regs.h:147:
+#define GINTSTS_PRTINT^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#173: FILE: include/hw/usb/dwc2-regs.h:148:
+#define GINTSTS_RESETDET^I^IBIT(23)$

ERROR: code indent should never use tabs
#174: FILE: include/hw/usb/dwc2-regs.h:149:
+#define GINTSTS_FET_SUSP^I^IBIT(22)$

ERROR: code indent should never use tabs
#175: FILE: include/hw/usb/dwc2-regs.h:150:
+#define GINTSTS_INCOMPL_IP^I^IBIT(21)$

ERROR: code indent should never use tabs
#176: FILE: include/hw/usb/dwc2-regs.h:151:
+#define GINTSTS_INCOMPL_SOOUT^I^IBIT(21)$

ERROR: code indent should never use tabs
#177: FILE: include/hw/usb/dwc2-regs.h:152:
+#define GINTSTS_INCOMPL_SOIN^I^IBIT(20)$

ERROR: code indent should never use tabs
#178: FILE: include/hw/usb/dwc2-regs.h:153:
+#define GINTSTS_OEPINT^I^I^IBIT(19)$

ERROR: code indent should never use tabs
#179: FILE: include/hw/usb/dwc2-regs.h:154:
+#define GINTSTS_IEPINT^I^I^IBIT(18)$

ERROR: code indent should never use tabs
#180: FILE: include/hw/usb/dwc2-regs.h:155:
+#define GINTSTS_EPMIS^I^I^IBIT(17)$

ERROR: code indent should never use tabs
#181: FILE: include/hw/usb/dwc2-regs.h:156:
+#define GINTSTS_RESTOREDONE^I^IBIT(16)$

ERROR: code indent should never use tabs
#182: FILE: include/hw/usb/dwc2-regs.h:157:
+#define GINTSTS_EOPF^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#183: FILE: include/hw/usb/dwc2-regs.h:158:
+#define GINTSTS_ISOUTDROP^I^IBIT(14)$

ERROR: code indent should never use tabs
#184: FILE: include/hw/usb/dwc2-regs.h:159:
+#define GINTSTS_ENUMDONE^I^IBIT(13)$

ERROR: code indent should never use tabs
#185: FILE: include/hw/usb/dwc2-regs.h:160:
+#define GINTSTS_USBRST^I^I^IBIT(12)$

ERROR: code indent should never use tabs
#186: FILE: include/hw/usb/dwc2-regs.h:161:
+#define GINTSTS_USBSUSP^I^I^IBIT(11)$

ERROR: code indent should never use tabs
#187: FILE: include/hw/usb/dwc2-regs.h:162:
+#define GINTSTS_ERLYSUSP^I^IBIT(10)$

ERROR: code indent should never use tabs
#188: FILE: include/hw/usb/dwc2-regs.h:163:
+#define GINTSTS_I2CINT^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#189: FILE: include/hw/usb/dwc2-regs.h:164:
+#define GINTSTS_ULPI_CK_INT^I^IBIT(8)$

ERROR: code indent should never use tabs
#190: FILE: include/hw/usb/dwc2-regs.h:165:
+#define GINTSTS_GOUTNAKEFF^I^IBIT(7)$

ERROR: code indent should never use tabs
#191: FILE: include/hw/usb/dwc2-regs.h:166:
+#define GINTSTS_GINNAKEFF^I^IBIT(6)$

ERROR: code indent should never use tabs
#192: FILE: include/hw/usb/dwc2-regs.h:167:
+#define GINTSTS_NPTXFEMP^I^IBIT(5)$

ERROR: code indent should never use tabs
#193: FILE: include/hw/usb/dwc2-regs.h:168:
+#define GINTSTS_RXFLVL^I^I^IBIT(4)$

ERROR: code indent should never use tabs
#194: FILE: include/hw/usb/dwc2-regs.h:169:
+#define GINTSTS_SOF^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#195: FILE: include/hw/usb/dwc2-regs.h:170:
+#define GINTSTS_OTGINT^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#196: FILE: include/hw/usb/dwc2-regs.h:171:
+#define GINTSTS_MODEMIS^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#197: FILE: include/hw/usb/dwc2-regs.h:172:
+#define GINTSTS_CURMODE_HOST^I^IBIT(0)$

ERROR: code indent should never use tabs
#199: FILE: include/hw/usb/dwc2-regs.h:174:
+#define GRXSTSR^I^I^I^IHSOTG_REG(0x01C)$

ERROR: code indent should never use tabs
#200: FILE: include/hw/usb/dwc2-regs.h:175:
+#define GRXSTSP^I^I^I^IHSOTG_REG(0x020)$

ERROR: code indent should never use tabs
#201: FILE: include/hw/usb/dwc2-regs.h:176:
+#define GRXSTS_FN_MASK^I^I^I(0x7f << 25)$

ERROR: code indent should never use tabs
#202: FILE: include/hw/usb/dwc2-regs.h:177:
+#define GRXSTS_FN_SHIFT^I^I^I25$

ERROR: code indent should never use tabs
#203: FILE: include/hw/usb/dwc2-regs.h:178:
+#define GRXSTS_PKTSTS_MASK^I^I(0xf << 17)$

ERROR: code indent should never use tabs
#204: FILE: include/hw/usb/dwc2-regs.h:179:
+#define GRXSTS_PKTSTS_SHIFT^I^I17$

ERROR: code indent should never use tabs
#205: FILE: include/hw/usb/dwc2-regs.h:180:
+#define GRXSTS_PKTSTS_GLOBALOUTNAK^I1$

ERROR: code indent should never use tabs
#206: FILE: include/hw/usb/dwc2-regs.h:181:
+#define GRXSTS_PKTSTS_OUTRX^I^I2$

ERROR: code indent should never use tabs
#207: FILE: include/hw/usb/dwc2-regs.h:182:
+#define GRXSTS_PKTSTS_HCHIN^I^I2$

ERROR: code indent should never use tabs
#208: FILE: include/hw/usb/dwc2-regs.h:183:
+#define GRXSTS_PKTSTS_OUTDONE^I^I3$

ERROR: code indent should never use tabs
#209: FILE: include/hw/usb/dwc2-regs.h:184:
+#define GRXSTS_PKTSTS_HCHIN_XFER_COMP^I3$

ERROR: code indent should never use tabs
#210: FILE: include/hw/usb/dwc2-regs.h:185:
+#define GRXSTS_PKTSTS_SETUPDONE^I^I4$

ERROR: code indent should never use tabs
#211: FILE: include/hw/usb/dwc2-regs.h:186:
+#define GRXSTS_PKTSTS_DATATOGGLEERR^I5$

ERROR: code indent should never use tabs
#212: FILE: include/hw/usb/dwc2-regs.h:187:
+#define GRXSTS_PKTSTS_SETUPRX^I^I6$

ERROR: code indent should never use tabs
#213: FILE: include/hw/usb/dwc2-regs.h:188:
+#define GRXSTS_PKTSTS_HCHHALTED^I^I7$

ERROR: code indent should never use tabs
#214: FILE: include/hw/usb/dwc2-regs.h:189:
+#define GRXSTS_HCHNUM_MASK^I^I(0xf << 0)$

ERROR: code indent should never use tabs
#215: FILE: include/hw/usb/dwc2-regs.h:190:
+#define GRXSTS_HCHNUM_SHIFT^I^I0$

ERROR: code indent should never use tabs
#216: FILE: include/hw/usb/dwc2-regs.h:191:
+#define GRXSTS_DPID_MASK^I^I(0x3 << 15)$

ERROR: code indent should never use tabs
#217: FILE: include/hw/usb/dwc2-regs.h:192:
+#define GRXSTS_DPID_SHIFT^I^I15$

ERROR: code indent should never use tabs
#218: FILE: include/hw/usb/dwc2-regs.h:193:
+#define GRXSTS_BYTECNT_MASK^I^I(0x7ff << 4)$

ERROR: code indent should never use tabs
#219: FILE: include/hw/usb/dwc2-regs.h:194:
+#define GRXSTS_BYTECNT_SHIFT^I^I4$

ERROR: code indent should never use tabs
#220: FILE: include/hw/usb/dwc2-regs.h:195:
+#define GRXSTS_EPNUM_MASK^I^I(0xf << 0)$

ERROR: code indent should never use tabs
#221: FILE: include/hw/usb/dwc2-regs.h:196:
+#define GRXSTS_EPNUM_SHIFT^I^I0$

ERROR: code indent should never use tabs
#223: FILE: include/hw/usb/dwc2-regs.h:198:
+#define GRXFSIZ^I^I^I^IHSOTG_REG(0x024)$

ERROR: code indent should never use tabs
#224: FILE: include/hw/usb/dwc2-regs.h:199:
+#define GRXFSIZ_DEPTH_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#225: FILE: include/hw/usb/dwc2-regs.h:200:
+#define GRXFSIZ_DEPTH_SHIFT^I^I0$

ERROR: code indent should never use tabs
#227: FILE: include/hw/usb/dwc2-regs.h:202:
+#define GNPTXFSIZ^I^I^IHSOTG_REG(0x028)$

ERROR: code indent should never use tabs
#230: FILE: include/hw/usb/dwc2-regs.h:205:
+#define GNPTXSTS^I^I^IHSOTG_REG(0x02C)$

ERROR: code indent should never use tabs
#231: FILE: include/hw/usb/dwc2-regs.h:206:
+#define GNPTXSTS_NP_TXQ_TOP_MASK^I^I(0x7f << 24)$

ERROR: code indent should never use tabs
#232: FILE: include/hw/usb/dwc2-regs.h:207:
+#define GNPTXSTS_NP_TXQ_TOP_SHIFT^I^I24$

ERROR: code indent should never use tabs
#233: FILE: include/hw/usb/dwc2-regs.h:208:
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_MASK^I^I(0xff << 16)$

ERROR: code indent should never use tabs
#234: FILE: include/hw/usb/dwc2-regs.h:209:
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_SHIFT^I^I16$

ERROR: code indent should never use tabs
#235: FILE: include/hw/usb/dwc2-regs.h:210:
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_GET(_v)^I(((_v) >> 16) & 0xff)$

ERROR: code indent should never use tabs
#236: FILE: include/hw/usb/dwc2-regs.h:211:
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#237: FILE: include/hw/usb/dwc2-regs.h:212:
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_SHIFT^I^I0$

ERROR: code indent should never use tabs
#238: FILE: include/hw/usb/dwc2-regs.h:213:
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_GET(_v)^I(((_v) >> 0) & 0xffff)$

ERROR: code indent should never use tabs
#240: FILE: include/hw/usb/dwc2-regs.h:215:
+#define GI2CCTL^I^I^I^IHSOTG_REG(0x0030)$

ERROR: code indent should never use tabs
#241: FILE: include/hw/usb/dwc2-regs.h:216:
+#define GI2CCTL_BSYDNE^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#242: FILE: include/hw/usb/dwc2-regs.h:217:
+#define GI2CCTL_RW^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#243: FILE: include/hw/usb/dwc2-regs.h:218:
+#define GI2CCTL_I2CDATSE0^I^IBIT(28)$

ERROR: code indent should never use tabs
#244: FILE: include/hw/usb/dwc2-regs.h:219:
+#define GI2CCTL_I2CDEVADDR_MASK^I^I(0x3 << 26)$

ERROR: code indent should never use tabs
#245: FILE: include/hw/usb/dwc2-regs.h:220:
+#define GI2CCTL_I2CDEVADDR_SHIFT^I26$

ERROR: code indent should never use tabs
#246: FILE: include/hw/usb/dwc2-regs.h:221:
+#define GI2CCTL_I2CSUSPCTL^I^IBIT(25)$

ERROR: code indent should never use tabs
#247: FILE: include/hw/usb/dwc2-regs.h:222:
+#define GI2CCTL_ACK^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#248: FILE: include/hw/usb/dwc2-regs.h:223:
+#define GI2CCTL_I2CEN^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#249: FILE: include/hw/usb/dwc2-regs.h:224:
+#define GI2CCTL_ADDR_MASK^I^I(0x7f << 16)$

ERROR: code indent should never use tabs
#250: FILE: include/hw/usb/dwc2-regs.h:225:
+#define GI2CCTL_ADDR_SHIFT^I^I16$

ERROR: code indent should never use tabs
#251: FILE: include/hw/usb/dwc2-regs.h:226:
+#define GI2CCTL_REGADDR_MASK^I^I(0xff << 8)$

ERROR: code indent should never use tabs
#252: FILE: include/hw/usb/dwc2-regs.h:227:
+#define GI2CCTL_REGADDR_SHIFT^I^I8$

ERROR: code indent should never use tabs
#253: FILE: include/hw/usb/dwc2-regs.h:228:
+#define GI2CCTL_RWDATA_MASK^I^I(0xff << 0)$

ERROR: code indent should never use tabs
#254: FILE: include/hw/usb/dwc2-regs.h:229:
+#define GI2CCTL_RWDATA_SHIFT^I^I0$

ERROR: code indent should never use tabs
#256: FILE: include/hw/usb/dwc2-regs.h:231:
+#define GPVNDCTL^I^I^IHSOTG_REG(0x0034)$

ERROR: code indent should never use tabs
#257: FILE: include/hw/usb/dwc2-regs.h:232:
+#define GGPIO^I^I^I^IHSOTG_REG(0x0038)$

ERROR: code indent should never use tabs
#258: FILE: include/hw/usb/dwc2-regs.h:233:
+#define GGPIO_STM32_OTG_GCCFG_PWRDWN^IBIT(16)$

ERROR: code indent should never use tabs
#260: FILE: include/hw/usb/dwc2-regs.h:235:
+#define GUID^I^I^I^IHSOTG_REG(0x003c)$

ERROR: code indent should never use tabs
#261: FILE: include/hw/usb/dwc2-regs.h:236:
+#define GSNPSID^I^I^I^IHSOTG_REG(0x0040)$

ERROR: code indent should never use tabs
#262: FILE: include/hw/usb/dwc2-regs.h:237:
+#define GHWCFG1^I^I^I^IHSOTG_REG(0x0044)$

ERROR: code indent should never use tabs
#263: FILE: include/hw/usb/dwc2-regs.h:238:
+#define GSNPSID_ID_MASK^I^I^IGENMASK(31, 16)$

ERROR: code indent should never use tabs
#265: FILE: include/hw/usb/dwc2-regs.h:240:
+#define GHWCFG2^I^I^I^IHSOTG_REG(0x0048)$

ERROR: code indent should never use tabs
#266: FILE: include/hw/usb/dwc2-regs.h:241:
+#define GHWCFG2_OTG_ENABLE_IC_USB^I^IBIT(31)$

ERROR: code indent should never use tabs
#267: FILE: include/hw/usb/dwc2-regs.h:242:
+#define GHWCFG2_DEV_TOKEN_Q_DEPTH_MASK^I^I(0x1f << 26)$

ERROR: code indent should never use tabs
#268: FILE: include/hw/usb/dwc2-regs.h:243:
+#define GHWCFG2_DEV_TOKEN_Q_DEPTH_SHIFT^I^I26$

ERROR: code indent should never use tabs
#269: FILE: include/hw/usb/dwc2-regs.h:244:
+#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK^I(0x3 << 24)$

ERROR: code indent should never use tabs
#270: FILE: include/hw/usb/dwc2-regs.h:245:
+#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_SHIFT^I24$

ERROR: code indent should never use tabs
#271: FILE: include/hw/usb/dwc2-regs.h:246:
+#define GHWCFG2_NONPERIO_TX_Q_DEPTH_MASK^I(0x3 << 22)$

ERROR: code indent should never use tabs
#272: FILE: include/hw/usb/dwc2-regs.h:247:
+#define GHWCFG2_NONPERIO_TX_Q_DEPTH_SHIFT^I22$

ERROR: code indent should never use tabs
#273: FILE: include/hw/usb/dwc2-regs.h:248:
+#define GHWCFG2_MULTI_PROC_INT^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#274: FILE: include/hw/usb/dwc2-regs.h:249:
+#define GHWCFG2_DYNAMIC_FIFO^I^I^IBIT(19)$

ERROR: code indent should never use tabs
#275: FILE: include/hw/usb/dwc2-regs.h:250:
+#define GHWCFG2_PERIO_EP_SUPPORTED^I^IBIT(18)$

ERROR: code indent should never use tabs
#276: FILE: include/hw/usb/dwc2-regs.h:251:
+#define GHWCFG2_NUM_HOST_CHAN_MASK^I^I(0xf << 14)$

ERROR: code indent should never use tabs
#277: FILE: include/hw/usb/dwc2-regs.h:252:
+#define GHWCFG2_NUM_HOST_CHAN_SHIFT^I^I14$

ERROR: code indent should never use tabs
#278: FILE: include/hw/usb/dwc2-regs.h:253:
+#define GHWCFG2_NUM_DEV_EP_MASK^I^I^I(0xf << 10)$

ERROR: code indent should never use tabs
#279: FILE: include/hw/usb/dwc2-regs.h:254:
+#define GHWCFG2_NUM_DEV_EP_SHIFT^I^I10$

ERROR: code indent should never use tabs
#280: FILE: include/hw/usb/dwc2-regs.h:255:
+#define GHWCFG2_FS_PHY_TYPE_MASK^I^I(0x3 << 8)$

ERROR: code indent should never use tabs
#281: FILE: include/hw/usb/dwc2-regs.h:256:
+#define GHWCFG2_FS_PHY_TYPE_SHIFT^I^I8$

ERROR: code indent should never use tabs
#282: FILE: include/hw/usb/dwc2-regs.h:257:
+#define GHWCFG2_FS_PHY_TYPE_NOT_SUPPORTED^I0$

ERROR: code indent should never use tabs
#283: FILE: include/hw/usb/dwc2-regs.h:258:
+#define GHWCFG2_FS_PHY_TYPE_DEDICATED^I^I1$

ERROR: code indent should never use tabs
#284: FILE: include/hw/usb/dwc2-regs.h:259:
+#define GHWCFG2_FS_PHY_TYPE_SHARED_UTMI^I^I2$

ERROR: code indent should never use tabs
#285: FILE: include/hw/usb/dwc2-regs.h:260:
+#define GHWCFG2_FS_PHY_TYPE_SHARED_ULPI^I^I3$

ERROR: code indent should never use tabs
#286: FILE: include/hw/usb/dwc2-regs.h:261:
+#define GHWCFG2_HS_PHY_TYPE_MASK^I^I(0x3 << 6)$

ERROR: code indent should never use tabs
#287: FILE: include/hw/usb/dwc2-regs.h:262:
+#define GHWCFG2_HS_PHY_TYPE_SHIFT^I^I6$

ERROR: code indent should never use tabs
#288: FILE: include/hw/usb/dwc2-regs.h:263:
+#define GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED^I0$

ERROR: code indent should never use tabs
#289: FILE: include/hw/usb/dwc2-regs.h:264:
+#define GHWCFG2_HS_PHY_TYPE_UTMI^I^I1$

ERROR: code indent should never use tabs
#290: FILE: include/hw/usb/dwc2-regs.h:265:
+#define GHWCFG2_HS_PHY_TYPE_ULPI^I^I2$

ERROR: code indent should never use tabs
#291: FILE: include/hw/usb/dwc2-regs.h:266:
+#define GHWCFG2_HS_PHY_TYPE_UTMI_ULPI^I^I3$

ERROR: code indent should never use tabs
#292: FILE: include/hw/usb/dwc2-regs.h:267:
+#define GHWCFG2_POINT2POINT^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#293: FILE: include/hw/usb/dwc2-regs.h:268:
+#define GHWCFG2_ARCHITECTURE_MASK^I^I(0x3 << 3)$

ERROR: code indent should never use tabs
#294: FILE: include/hw/usb/dwc2-regs.h:269:
+#define GHWCFG2_ARCHITECTURE_SHIFT^I^I3$

ERROR: code indent should never use tabs
#295: FILE: include/hw/usb/dwc2-regs.h:270:
+#define GHWCFG2_SLAVE_ONLY_ARCH^I^I^I0$

ERROR: code indent should never use tabs
#296: FILE: include/hw/usb/dwc2-regs.h:271:
+#define GHWCFG2_EXT_DMA_ARCH^I^I^I1$

ERROR: code indent should never use tabs
#297: FILE: include/hw/usb/dwc2-regs.h:272:
+#define GHWCFG2_INT_DMA_ARCH^I^I^I2$

ERROR: code indent should never use tabs
#298: FILE: include/hw/usb/dwc2-regs.h:273:
+#define GHWCFG2_OP_MODE_MASK^I^I^I(0x7 << 0)$

ERROR: code indent should never use tabs
#299: FILE: include/hw/usb/dwc2-regs.h:274:
+#define GHWCFG2_OP_MODE_SHIFT^I^I^I0$

ERROR: code indent should never use tabs
#300: FILE: include/hw/usb/dwc2-regs.h:275:
+#define GHWCFG2_OP_MODE_HNP_SRP_CAPABLE^I^I0$

ERROR: code indent should never use tabs
#301: FILE: include/hw/usb/dwc2-regs.h:276:
+#define GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE^I1$

ERROR: code indent should never use tabs
#302: FILE: include/hw/usb/dwc2-regs.h:277:
+#define GHWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE^I2$

ERROR: code indent should never use tabs
#303: FILE: include/hw/usb/dwc2-regs.h:278:
+#define GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE^I3$

ERROR: code indent should never use tabs
#304: FILE: include/hw/usb/dwc2-regs.h:279:
+#define GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE^I4$

ERROR: code indent should never use tabs
#305: FILE: include/hw/usb/dwc2-regs.h:280:
+#define GHWCFG2_OP_MODE_SRP_CAPABLE_HOST^I5$

ERROR: code indent should never use tabs
#306: FILE: include/hw/usb/dwc2-regs.h:281:
+#define GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST^I6$

ERROR: code indent should never use tabs
#307: FILE: include/hw/usb/dwc2-regs.h:282:
+#define GHWCFG2_OP_MODE_UNDEFINED^I^I7$

ERROR: code indent should never use tabs
#309: FILE: include/hw/usb/dwc2-regs.h:284:
+#define GHWCFG3^I^I^I^IHSOTG_REG(0x004c)$

ERROR: code indent should never use tabs
#310: FILE: include/hw/usb/dwc2-regs.h:285:
+#define GHWCFG3_DFIFO_DEPTH_MASK^I^I(0xffff << 16)$

ERROR: code indent should never use tabs
#311: FILE: include/hw/usb/dwc2-regs.h:286:
+#define GHWCFG3_DFIFO_DEPTH_SHIFT^I^I16$

ERROR: code indent should never use tabs
#312: FILE: include/hw/usb/dwc2-regs.h:287:
+#define GHWCFG3_OTG_LPM_EN^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#313: FILE: include/hw/usb/dwc2-regs.h:288:
+#define GHWCFG3_BC_SUPPORT^I^I^IBIT(14)$

ERROR: code indent should never use tabs
#314: FILE: include/hw/usb/dwc2-regs.h:289:
+#define GHWCFG3_OTG_ENABLE_HSIC^I^I^IBIT(13)$

ERROR: code indent should never use tabs
#315: FILE: include/hw/usb/dwc2-regs.h:290:
+#define GHWCFG3_ADP_SUPP^I^I^IBIT(12)$

ERROR: code indent should never use tabs
#316: FILE: include/hw/usb/dwc2-regs.h:291:
+#define GHWCFG3_SYNCH_RESET_TYPE^I^IBIT(11)$

ERROR: code indent should never use tabs
#317: FILE: include/hw/usb/dwc2-regs.h:292:
+#define GHWCFG3_OPTIONAL_FEATURES^I^IBIT(10)$

ERROR: code indent should never use tabs
#318: FILE: include/hw/usb/dwc2-regs.h:293:
+#define GHWCFG3_VENDOR_CTRL_IF^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#319: FILE: include/hw/usb/dwc2-regs.h:294:
+#define GHWCFG3_I2C^I^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#320: FILE: include/hw/usb/dwc2-regs.h:295:
+#define GHWCFG3_OTG_FUNC^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#321: FILE: include/hw/usb/dwc2-regs.h:296:
+#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK^I(0x7 << 4)$

ERROR: code indent should never use tabs
#322: FILE: include/hw/usb/dwc2-regs.h:297:
+#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT^I4$

ERROR: code indent should never use tabs
#323: FILE: include/hw/usb/dwc2-regs.h:298:
+#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK^I(0xf << 0)$

ERROR: code indent should never use tabs
#324: FILE: include/hw/usb/dwc2-regs.h:299:
+#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT^I0$

ERROR: code indent should never use tabs
#326: FILE: include/hw/usb/dwc2-regs.h:301:
+#define GHWCFG4^I^I^I^IHSOTG_REG(0x0050)$

ERROR: code indent should never use tabs
#327: FILE: include/hw/usb/dwc2-regs.h:302:
+#define GHWCFG4_DESC_DMA_DYN^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#328: FILE: include/hw/usb/dwc2-regs.h:303:
+#define GHWCFG4_DESC_DMA^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#329: FILE: include/hw/usb/dwc2-regs.h:304:
+#define GHWCFG4_NUM_IN_EPS_MASK^I^I^I(0xf << 26)$

ERROR: code indent should never use tabs
#330: FILE: include/hw/usb/dwc2-regs.h:305:
+#define GHWCFG4_NUM_IN_EPS_SHIFT^I^I26$

ERROR: code indent should never use tabs
#331: FILE: include/hw/usb/dwc2-regs.h:306:
+#define GHWCFG4_DED_FIFO_EN^I^I^IBIT(25)$

ERROR: code indent should never use tabs
#332: FILE: include/hw/usb/dwc2-regs.h:307:
+#define GHWCFG4_DED_FIFO_SHIFT^I^I25$

ERROR: code indent should never use tabs
#333: FILE: include/hw/usb/dwc2-regs.h:308:
+#define GHWCFG4_SESSION_END_FILT_EN^I^IBIT(24)$

ERROR: code indent should never use tabs
#334: FILE: include/hw/usb/dwc2-regs.h:309:
+#define GHWCFG4_B_VALID_FILT_EN^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#335: FILE: include/hw/usb/dwc2-regs.h:310:
+#define GHWCFG4_A_VALID_FILT_EN^I^I^IBIT(22)$

ERROR: code indent should never use tabs
#336: FILE: include/hw/usb/dwc2-regs.h:311:
+#define GHWCFG4_VBUS_VALID_FILT_EN^I^IBIT(21)$

ERROR: code indent should never use tabs
#337: FILE: include/hw/usb/dwc2-regs.h:312:
+#define GHWCFG4_IDDIG_FILT_EN^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#338: FILE: include/hw/usb/dwc2-regs.h:313:
+#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_MASK^I(0xf << 16)$

ERROR: code indent should never use tabs
#339: FILE: include/hw/usb/dwc2-regs.h:314:
+#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_SHIFT^I16$

ERROR: code indent should never use tabs
#340: FILE: include/hw/usb/dwc2-regs.h:315:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK^I(0x3 << 14)$

ERROR: code indent should never use tabs
#341: FILE: include/hw/usb/dwc2-regs.h:316:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT^I14$

ERROR: code indent should never use tabs
#342: FILE: include/hw/usb/dwc2-regs.h:317:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8^I^I0$

ERROR: code indent should never use tabs
#343: FILE: include/hw/usb/dwc2-regs.h:318:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_16^I^I1$

ERROR: code indent should never use tabs
#344: FILE: include/hw/usb/dwc2-regs.h:319:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16^I2$

ERROR: code indent should never use tabs
#345: FILE: include/hw/usb/dwc2-regs.h:320:
+#define GHWCFG4_ACG_SUPPORTED^I^I^IBIT(12)$

ERROR: code indent should never use tabs
#346: FILE: include/hw/usb/dwc2-regs.h:321:
+#define GHWCFG4_IPG_ISOC_SUPPORTED^I^IBIT(11)$

ERROR: code indent should never use tabs
#348: FILE: include/hw/usb/dwc2-regs.h:323:
+#define GHWCFG4_XHIBER^I^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#349: FILE: include/hw/usb/dwc2-regs.h:324:
+#define GHWCFG4_HIBER^I^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#350: FILE: include/hw/usb/dwc2-regs.h:325:
+#define GHWCFG4_MIN_AHB_FREQ^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#351: FILE: include/hw/usb/dwc2-regs.h:326:
+#define GHWCFG4_POWER_OPTIMIZ^I^I^IBIT(4)$

ERROR: code indent should never use tabs
#352: FILE: include/hw/usb/dwc2-regs.h:327:
+#define GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK^I(0xf << 0)$

ERROR: code indent should never use tabs
#353: FILE: include/hw/usb/dwc2-regs.h:328:
+#define GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT^I0$

ERROR: code indent should never use tabs
#355: FILE: include/hw/usb/dwc2-regs.h:330:
+#define GLPMCFG^I^I^I^IHSOTG_REG(0x0054)$

ERROR: code indent should never use tabs
#356: FILE: include/hw/usb/dwc2-regs.h:331:
+#define GLPMCFG_INVSELHSIC^I^IBIT(31)$

ERROR: code indent should never use tabs
#357: FILE: include/hw/usb/dwc2-regs.h:332:
+#define GLPMCFG_HSICCON^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#358: FILE: include/hw/usb/dwc2-regs.h:333:
+#define GLPMCFG_RSTRSLPSTS^I^IBIT(29)$

ERROR: code indent should never use tabs
#359: FILE: include/hw/usb/dwc2-regs.h:334:
+#define GLPMCFG_ENBESL^I^I^IBIT(28)$

ERROR: code indent should never use tabs
#360: FILE: include/hw/usb/dwc2-regs.h:335:
+#define GLPMCFG_LPM_RETRYCNT_STS_MASK^I(0x7 << 25)$

ERROR: code indent should never use tabs
#361: FILE: include/hw/usb/dwc2-regs.h:336:
+#define GLPMCFG_LPM_RETRYCNT_STS_SHIFT^I25$

ERROR: code indent should never use tabs
#362: FILE: include/hw/usb/dwc2-regs.h:337:
+#define GLPMCFG_SNDLPM^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#363: FILE: include/hw/usb/dwc2-regs.h:338:
+#define GLPMCFG_RETRY_CNT_MASK^I^I(0x7 << 21)$

ERROR: code indent should never use tabs
#364: FILE: include/hw/usb/dwc2-regs.h:339:
+#define GLPMCFG_RETRY_CNT_SHIFT^I^I21$

ERROR: code indent should never use tabs
#365: FILE: include/hw/usb/dwc2-regs.h:340:
+#define GLPMCFG_LPM_REJECT_CTRL_CONTROL^IBIT(21)$

ERROR: code indent should never use tabs
#366: FILE: include/hw/usb/dwc2-regs.h:341:
+#define GLPMCFG_LPM_ACCEPT_CTRL_ISOC^IBIT(22)$

ERROR: code indent should never use tabs
#367: FILE: include/hw/usb/dwc2-regs.h:342:
+#define GLPMCFG_LPM_CHNL_INDX_MASK^I(0xf << 17)$

ERROR: code indent should never use tabs
#368: FILE: include/hw/usb/dwc2-regs.h:343:
+#define GLPMCFG_LPM_CHNL_INDX_SHIFT^I17$

ERROR: code indent should never use tabs
#369: FILE: include/hw/usb/dwc2-regs.h:344:
+#define GLPMCFG_L1RESUMEOK^I^IBIT(16)$

ERROR: code indent should never use tabs
#370: FILE: include/hw/usb/dwc2-regs.h:345:
+#define GLPMCFG_SLPSTS^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#371: FILE: include/hw/usb/dwc2-regs.h:346:
+#define GLPMCFG_COREL1RES_MASK^I^I(0x3 << 13)$

ERROR: code indent should never use tabs
#372: FILE: include/hw/usb/dwc2-regs.h:347:
+#define GLPMCFG_COREL1RES_SHIFT^I^I13$

ERROR: code indent should never use tabs
#373: FILE: include/hw/usb/dwc2-regs.h:348:
+#define GLPMCFG_HIRD_THRES_MASK^I^I(0x1f << 8)$

ERROR: code indent should never use tabs
#374: FILE: include/hw/usb/dwc2-regs.h:349:
+#define GLPMCFG_HIRD_THRES_SHIFT^I8$

ERROR: code indent should never use tabs
#375: FILE: include/hw/usb/dwc2-regs.h:350:
+#define GLPMCFG_HIRD_THRES_EN^I^I(0x10 << 8)$

ERROR: code indent should never use tabs
#376: FILE: include/hw/usb/dwc2-regs.h:351:
+#define GLPMCFG_ENBLSLPM^I^IBIT(7)$

ERROR: code indent should never use tabs
#377: FILE: include/hw/usb/dwc2-regs.h:352:
+#define GLPMCFG_BREMOTEWAKE^I^IBIT(6)$

ERROR: code indent should never use tabs
#378: FILE: include/hw/usb/dwc2-regs.h:353:
+#define GLPMCFG_HIRD_MASK^I^I(0xf << 2)$

ERROR: code indent should never use tabs
#379: FILE: include/hw/usb/dwc2-regs.h:354:
+#define GLPMCFG_HIRD_SHIFT^I^I2$

ERROR: code indent should never use tabs
#380: FILE: include/hw/usb/dwc2-regs.h:355:
+#define GLPMCFG_APPL1RES^I^IBIT(1)$

ERROR: code indent should never use tabs
#381: FILE: include/hw/usb/dwc2-regs.h:356:
+#define GLPMCFG_LPMCAP^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#383: FILE: include/hw/usb/dwc2-regs.h:358:
+#define GPWRDN^I^I^I^IHSOTG_REG(0x0058)$

ERROR: code indent should never use tabs
#384: FILE: include/hw/usb/dwc2-regs.h:359:
+#define GPWRDN_MULT_VAL_ID_BC_MASK^I(0x1f << 24)$

ERROR: code indent should never use tabs
#385: FILE: include/hw/usb/dwc2-regs.h:360:
+#define GPWRDN_MULT_VAL_ID_BC_SHIFT^I24$

ERROR: code indent should never use tabs
#386: FILE: include/hw/usb/dwc2-regs.h:361:
+#define GPWRDN_ADP_INT^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#387: FILE: include/hw/usb/dwc2-regs.h:362:
+#define GPWRDN_BSESSVLD^I^I^IBIT(22)$

ERROR: code indent should never use tabs
#388: FILE: include/hw/usb/dwc2-regs.h:363:
+#define GPWRDN_IDSTS^I^I^IBIT(21)$

ERROR: code indent should never use tabs
#389: FILE: include/hw/usb/dwc2-regs.h:364:
+#define GPWRDN_LINESTATE_MASK^I^I(0x3 << 19)$

ERROR: code indent should never use tabs
#390: FILE: include/hw/usb/dwc2-regs.h:365:
+#define GPWRDN_LINESTATE_SHIFT^I^I19$

ERROR: code indent should never use tabs
#391: FILE: include/hw/usb/dwc2-regs.h:366:
+#define GPWRDN_STS_CHGINT_MSK^I^IBIT(18)$

ERROR: code indent should never use tabs
#392: FILE: include/hw/usb/dwc2-regs.h:367:
+#define GPWRDN_STS_CHGINT^I^IBIT(17)$

ERROR: code indent should never use tabs
#393: FILE: include/hw/usb/dwc2-regs.h:368:
+#define GPWRDN_SRP_DET_MSK^I^IBIT(16)$

ERROR: code indent should never use tabs
#394: FILE: include/hw/usb/dwc2-regs.h:369:
+#define GPWRDN_SRP_DET^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#395: FILE: include/hw/usb/dwc2-regs.h:370:
+#define GPWRDN_CONNECT_DET_MSK^I^IBIT(14)$

ERROR: code indent should never use tabs
#396: FILE: include/hw/usb/dwc2-regs.h:371:
+#define GPWRDN_CONNECT_DET^I^IBIT(13)$

ERROR: code indent should never use tabs
#397: FILE: include/hw/usb/dwc2-regs.h:372:
+#define GPWRDN_DISCONN_DET_MSK^I^IBIT(12)$

ERROR: code indent should never use tabs
#398: FILE: include/hw/usb/dwc2-regs.h:373:
+#define GPWRDN_DISCONN_DET^I^IBIT(11)$

ERROR: code indent should never use tabs
#399: FILE: include/hw/usb/dwc2-regs.h:374:
+#define GPWRDN_RST_DET_MSK^I^IBIT(10)$

ERROR: code indent should never use tabs
#400: FILE: include/hw/usb/dwc2-regs.h:375:
+#define GPWRDN_RST_DET^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#401: FILE: include/hw/usb/dwc2-regs.h:376:
+#define GPWRDN_LNSTSCHG_MSK^I^IBIT(8)$

ERROR: code indent should never use tabs
#402: FILE: include/hw/usb/dwc2-regs.h:377:
+#define GPWRDN_LNSTSCHG^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#403: FILE: include/hw/usb/dwc2-regs.h:378:
+#define GPWRDN_DIS_VBUS^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#404: FILE: include/hw/usb/dwc2-regs.h:379:
+#define GPWRDN_PWRDNSWTCH^I^IBIT(5)$

ERROR: code indent should never use tabs
#405: FILE: include/hw/usb/dwc2-regs.h:380:
+#define GPWRDN_PWRDNRSTN^I^IBIT(4)$

ERROR: code indent should never use tabs
#406: FILE: include/hw/usb/dwc2-regs.h:381:
+#define GPWRDN_PWRDNCLMP^I^IBIT(3)$

ERROR: code indent should never use tabs
#407: FILE: include/hw/usb/dwc2-regs.h:382:
+#define GPWRDN_RESTORE^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#408: FILE: include/hw/usb/dwc2-regs.h:383:
+#define GPWRDN_PMUACTV^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#409: FILE: include/hw/usb/dwc2-regs.h:384:
+#define GPWRDN_PMUINTSEL^I^IBIT(0)$

ERROR: code indent should never use tabs
#411: FILE: include/hw/usb/dwc2-regs.h:386:
+#define GDFIFOCFG^I^I^IHSOTG_REG(0x005c)$

ERROR: code indent should never use tabs
#412: FILE: include/hw/usb/dwc2-regs.h:387:
+#define GDFIFOCFG_EPINFOBASE_MASK^I(0xffff << 16)$

ERROR: code indent should never use tabs
#413: FILE: include/hw/usb/dwc2-regs.h:388:
+#define GDFIFOCFG_EPINFOBASE_SHIFT^I16$

ERROR: code indent should never use tabs
#414: FILE: include/hw/usb/dwc2-regs.h:389:
+#define GDFIFOCFG_GDFIFOCFG_MASK^I(0xffff << 0)$

ERROR: code indent should never use tabs
#415: FILE: include/hw/usb/dwc2-regs.h:390:
+#define GDFIFOCFG_GDFIFOCFG_SHIFT^I0$

ERROR: code indent should never use tabs
#417: FILE: include/hw/usb/dwc2-regs.h:392:
+#define ADPCTL^I^I^I^IHSOTG_REG(0x0060)$

ERROR: code indent should never use tabs
#418: FILE: include/hw/usb/dwc2-regs.h:393:
+#define ADPCTL_AR_MASK^I^I^I(0x3 << 27)$

ERROR: code indent should never use tabs
#419: FILE: include/hw/usb/dwc2-regs.h:394:
+#define ADPCTL_AR_SHIFT^I^I^I27$

ERROR: code indent should never use tabs
#420: FILE: include/hw/usb/dwc2-regs.h:395:
+#define ADPCTL_ADP_TMOUT_INT_MSK^IBIT(26)$

ERROR: code indent should never use tabs
#421: FILE: include/hw/usb/dwc2-regs.h:396:
+#define ADPCTL_ADP_SNS_INT_MSK^I^IBIT(25)$

ERROR: code indent should never use tabs
#422: FILE: include/hw/usb/dwc2-regs.h:397:
+#define ADPCTL_ADP_PRB_INT_MSK^I^IBIT(24)$

ERROR: code indent should never use tabs
#423: FILE: include/hw/usb/dwc2-regs.h:398:
+#define ADPCTL_ADP_TMOUT_INT^I^IBIT(23)$

ERROR: code indent should never use tabs
#424: FILE: include/hw/usb/dwc2-regs.h:399:
+#define ADPCTL_ADP_SNS_INT^I^IBIT(22)$

ERROR: code indent should never use tabs
#425: FILE: include/hw/usb/dwc2-regs.h:400:
+#define ADPCTL_ADP_PRB_INT^I^IBIT(21)$

ERROR: code indent should never use tabs
#426: FILE: include/hw/usb/dwc2-regs.h:401:
+#define ADPCTL_ADPENA^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#427: FILE: include/hw/usb/dwc2-regs.h:402:
+#define ADPCTL_ADPRES^I^I^IBIT(19)$

ERROR: code indent should never use tabs
#428: FILE: include/hw/usb/dwc2-regs.h:403:
+#define ADPCTL_ENASNS^I^I^IBIT(18)$

ERROR: code indent should never use tabs
#429: FILE: include/hw/usb/dwc2-regs.h:404:
+#define ADPCTL_ENAPRB^I^I^IBIT(17)$

ERROR: code indent should never use tabs
#430: FILE: include/hw/usb/dwc2-regs.h:405:
+#define ADPCTL_RTIM_MASK^I^I(0x7ff << 6)$

ERROR: code indent should never use tabs
#431: FILE: include/hw/usb/dwc2-regs.h:406:
+#define ADPCTL_RTIM_SHIFT^I^I6$

ERROR: code indent should never use tabs
#432: FILE: include/hw/usb/dwc2-regs.h:407:
+#define ADPCTL_PRB_PER_MASK^I^I(0x3 << 4)$

ERROR: code indent should never use tabs
#433: FILE: include/hw/usb/dwc2-regs.h:408:
+#define ADPCTL_PRB_PER_SHIFT^I^I4$

ERROR: code indent should never use tabs
#434: FILE: include/hw/usb/dwc2-regs.h:409:
+#define ADPCTL_PRB_DELTA_MASK^I^I(0x3 << 2)$

ERROR: code indent should never use tabs
#435: FILE: include/hw/usb/dwc2-regs.h:410:
+#define ADPCTL_PRB_DELTA_SHIFT^I^I2$

ERROR: code indent should never use tabs
#436: FILE: include/hw/usb/dwc2-regs.h:411:
+#define ADPCTL_PRB_DSCHRG_MASK^I^I(0x3 << 0)$

ERROR: code indent should never use tabs
#437: FILE: include/hw/usb/dwc2-regs.h:412:
+#define ADPCTL_PRB_DSCHRG_SHIFT^I^I0$

ERROR: code indent should never use tabs
#439: FILE: include/hw/usb/dwc2-regs.h:414:
+#define GREFCLK^I^I^I^I    HSOTG_REG(0x0064)$

ERROR: code indent should never use tabs
#440: FILE: include/hw/usb/dwc2-regs.h:415:
+#define GREFCLK_REFCLKPER_MASK^I^I    (0x1ffff << 15)$

ERROR: code indent should never use tabs
#441: FILE: include/hw/usb/dwc2-regs.h:416:
+#define GREFCLK_REFCLKPER_SHIFT^I^I    15$

ERROR: code indent should never use tabs
#442: FILE: include/hw/usb/dwc2-regs.h:417:
+#define GREFCLK_REF_CLK_MODE^I^I    BIT(14)$

ERROR: code indent should never use tabs
#443: FILE: include/hw/usb/dwc2-regs.h:418:
+#define GREFCLK_SOF_CNT_WKUP_ALERT_MASK^I    (0x3ff)$

ERROR: code indent should never use tabs
#446: FILE: include/hw/usb/dwc2-regs.h:421:
+#define GINTMSK2^I^I^IHSOTG_REG(0x0068)$

ERROR: code indent should never use tabs
#447: FILE: include/hw/usb/dwc2-regs.h:422:
+#define GINTMSK2_WKUP_ALERT_INT_MSK^IBIT(0)$

ERROR: code indent should never use tabs
#449: FILE: include/hw/usb/dwc2-regs.h:424:
+#define GINTSTS2^I^I^IHSOTG_REG(0x006c)$

ERROR: code indent should never use tabs
#450: FILE: include/hw/usb/dwc2-regs.h:425:
+#define GINTSTS2_WKUP_ALERT_INT^I^IBIT(0)$

ERROR: code indent should never use tabs
#452: FILE: include/hw/usb/dwc2-regs.h:427:
+#define HPTXFSIZ^I^I^IHSOTG_REG(0x100)$

ERROR: code indent should never use tabs
#455: FILE: include/hw/usb/dwc2-regs.h:430:
+#define DPTXFSIZN(_a)^I^I^IHSOTG_REG(0x104 + (((_a) - 1) * 4))$

ERROR: code indent should never use tabs
#459: FILE: include/hw/usb/dwc2-regs.h:434:
+#define FIFOSIZE_DEPTH_MASK^I^I(0xffff << 16)$

ERROR: code indent should never use tabs
#460: FILE: include/hw/usb/dwc2-regs.h:435:
+#define FIFOSIZE_DEPTH_SHIFT^I^I16$

ERROR: code indent should never use tabs
#461: FILE: include/hw/usb/dwc2-regs.h:436:
+#define FIFOSIZE_STARTADDR_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#462: FILE: include/hw/usb/dwc2-regs.h:437:
+#define FIFOSIZE_STARTADDR_SHIFT^I0$

ERROR: code indent should never use tabs
#463: FILE: include/hw/usb/dwc2-regs.h:438:
+#define FIFOSIZE_DEPTH_GET(_x)^I^I(((_x) >> 16) & 0xffff)$

ERROR: code indent should never use tabs
#467: FILE: include/hw/usb/dwc2-regs.h:442:
+#define DCFG^I^I^I^IHSOTG_REG(0x800)$

ERROR: code indent should never use tabs
#468: FILE: include/hw/usb/dwc2-regs.h:443:
+#define DCFG_DESCDMA_EN^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#469: FILE: include/hw/usb/dwc2-regs.h:444:
+#define DCFG_EPMISCNT_MASK^I^I(0x1f << 18)$

ERROR: code indent should never use tabs
#470: FILE: include/hw/usb/dwc2-regs.h:445:
+#define DCFG_EPMISCNT_SHIFT^I^I18$

ERROR: code indent should never use tabs
#471: FILE: include/hw/usb/dwc2-regs.h:446:
+#define DCFG_EPMISCNT_LIMIT^I^I0x1f$

ERROR: code indent should never use tabs
#472: FILE: include/hw/usb/dwc2-regs.h:447:
+#define DCFG_EPMISCNT(_x)^I^I((_x) << 18)$

ERROR: code indent should never use tabs
#473: FILE: include/hw/usb/dwc2-regs.h:448:
+#define DCFG_IPG_ISOC_SUPPORDED^I^IBIT(17)$

ERROR: code indent should never use tabs
#474: FILE: include/hw/usb/dwc2-regs.h:449:
+#define DCFG_PERFRINT_MASK^I^I(0x3 << 11)$

ERROR: code indent should never use tabs
#475: FILE: include/hw/usb/dwc2-regs.h:450:
+#define DCFG_PERFRINT_SHIFT^I^I11$

ERROR: code indent should never use tabs
#476: FILE: include/hw/usb/dwc2-regs.h:451:
+#define DCFG_PERFRINT_LIMIT^I^I0x3$

ERROR: code indent should never use tabs
#477: FILE: include/hw/usb/dwc2-regs.h:452:
+#define DCFG_PERFRINT(_x)^I^I((_x) << 11)$

ERROR: code indent should never use tabs
#478: FILE: include/hw/usb/dwc2-regs.h:453:
+#define DCFG_DEVADDR_MASK^I^I(0x7f << 4)$

ERROR: code indent should never use tabs
#479: FILE: include/hw/usb/dwc2-regs.h:454:
+#define DCFG_DEVADDR_SHIFT^I^I4$

ERROR: code indent should never use tabs
#480: FILE: include/hw/usb/dwc2-regs.h:455:
+#define DCFG_DEVADDR_LIMIT^I^I0x7f$

ERROR: code indent should never use tabs
#481: FILE: include/hw/usb/dwc2-regs.h:456:
+#define DCFG_DEVADDR(_x)^I^I((_x) << 4)$

ERROR: code indent should never use tabs
#482: FILE: include/hw/usb/dwc2-regs.h:457:
+#define DCFG_NZ_STS_OUT_HSHK^I^IBIT(2)$

ERROR: code indent should never use tabs
#483: FILE: include/hw/usb/dwc2-regs.h:458:
+#define DCFG_DEVSPD_MASK^I^I(0x3 << 0)$

ERROR: code indent should never use tabs
#484: FILE: include/hw/usb/dwc2-regs.h:459:
+#define DCFG_DEVSPD_SHIFT^I^I0$

ERROR: code indent should never use tabs
#485: FILE: include/hw/usb/dwc2-regs.h:460:
+#define DCFG_DEVSPD_HS^I^I^I0$

ERROR: code indent should never use tabs
#486: FILE: include/hw/usb/dwc2-regs.h:461:
+#define DCFG_DEVSPD_FS^I^I^I1$

ERROR: code indent should never use tabs
#487: FILE: include/hw/usb/dwc2-regs.h:462:
+#define DCFG_DEVSPD_LS^I^I^I2$

ERROR: code indent should never use tabs
#488: FILE: include/hw/usb/dwc2-regs.h:463:
+#define DCFG_DEVSPD_FS48^I^I3$

ERROR: code indent should never use tabs
#490: FILE: include/hw/usb/dwc2-regs.h:465:
+#define DCTL^I^I^I^IHSOTG_REG(0x804)$

ERROR: code indent should never use tabs
#492: FILE: include/hw/usb/dwc2-regs.h:467:
+#define DCTL_PWRONPRGDONE^I^IBIT(11)$

ERROR: code indent should never use tabs
#493: FILE: include/hw/usb/dwc2-regs.h:468:
+#define DCTL_CGOUTNAK^I^I^IBIT(10)$

ERROR: code indent should never use tabs
#494: FILE: include/hw/usb/dwc2-regs.h:469:
+#define DCTL_SGOUTNAK^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#495: FILE: include/hw/usb/dwc2-regs.h:470:
+#define DCTL_CGNPINNAK^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#496: FILE: include/hw/usb/dwc2-regs.h:471:
+#define DCTL_SGNPINNAK^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#497: FILE: include/hw/usb/dwc2-regs.h:472:
+#define DCTL_TSTCTL_MASK^I^I(0x7 << 4)$

ERROR: code indent should never use tabs
#498: FILE: include/hw/usb/dwc2-regs.h:473:
+#define DCTL_TSTCTL_SHIFT^I^I4$

ERROR: code indent should never use tabs
#499: FILE: include/hw/usb/dwc2-regs.h:474:
+#define DCTL_GOUTNAKSTS^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#500: FILE: include/hw/usb/dwc2-regs.h:475:
+#define DCTL_GNPINNAKSTS^I^IBIT(2)$

ERROR: code indent should never use tabs
#501: FILE: include/hw/usb/dwc2-regs.h:476:
+#define DCTL_SFTDISCON^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#502: FILE: include/hw/usb/dwc2-regs.h:477:
+#define DCTL_RMTWKUPSIG^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#504: FILE: include/hw/usb/dwc2-regs.h:479:
+#define DSTS^I^I^I^IHSOTG_REG(0x808)$

ERROR: code indent should never use tabs
#505: FILE: include/hw/usb/dwc2-regs.h:480:
+#define DSTS_SOFFN_MASK^I^I^I(0x3fff << 8)$

ERROR: code indent should never use tabs
#506: FILE: include/hw/usb/dwc2-regs.h:481:
+#define DSTS_SOFFN_SHIFT^I^I8$

ERROR: code indent should never use tabs
#507: FILE: include/hw/usb/dwc2-regs.h:482:
+#define DSTS_SOFFN_LIMIT^I^I0x3fff$

ERROR: code indent should never use tabs
#508: FILE: include/hw/usb/dwc2-regs.h:483:
+#define DSTS_SOFFN(_x)^I^I^I((_x) << 8)$

ERROR: code indent should never use tabs
#509: FILE: include/hw/usb/dwc2-regs.h:484:
+#define DSTS_ERRATICERR^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#510: FILE: include/hw/usb/dwc2-regs.h:485:
+#define DSTS_ENUMSPD_MASK^I^I(0x3 << 1)$

ERROR: code indent should never use tabs
#511: FILE: include/hw/usb/dwc2-regs.h:486:
+#define DSTS_ENUMSPD_SHIFT^I^I1$

ERROR: code indent should never use tabs
#512: FILE: include/hw/usb/dwc2-regs.h:487:
+#define DSTS_ENUMSPD_HS^I^I^I0$

ERROR: code indent should never use tabs
#513: FILE: include/hw/usb/dwc2-regs.h:488:
+#define DSTS_ENUMSPD_FS^I^I^I1$

ERROR: code indent should never use tabs
#514: FILE: include/hw/usb/dwc2-regs.h:489:
+#define DSTS_ENUMSPD_LS^I^I^I2$

ERROR: code indent should never use tabs
#515: FILE: include/hw/usb/dwc2-regs.h:490:
+#define DSTS_ENUMSPD_FS48^I^I3$

ERROR: code indent should never use tabs
#516: FILE: include/hw/usb/dwc2-regs.h:491:
+#define DSTS_SUSPSTS^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#518: FILE: include/hw/usb/dwc2-regs.h:493:
+#define DIEPMSK^I^I^I^IHSOTG_REG(0x810)$

ERROR: code indent should never use tabs
#519: FILE: include/hw/usb/dwc2-regs.h:494:
+#define DIEPMSK_NAKMSK^I^I^IBIT(13)$

ERROR: code indent should never use tabs
#520: FILE: include/hw/usb/dwc2-regs.h:495:
+#define DIEPMSK_BNAININTRMSK^I^IBIT(9)$

ERROR: code indent should never use tabs
#521: FILE: include/hw/usb/dwc2-regs.h:496:
+#define DIEPMSK_TXFIFOUNDRNMSK^I^IBIT(8)$

ERROR: code indent should never use tabs
#522: FILE: include/hw/usb/dwc2-regs.h:497:
+#define DIEPMSK_TXFIFOEMPTY^I^IBIT(7)$

ERROR: code indent should never use tabs
#523: FILE: include/hw/usb/dwc2-regs.h:498:
+#define DIEPMSK_INEPNAKEFFMSK^I^IBIT(6)$

ERROR: code indent should never use tabs
#524: FILE: include/hw/usb/dwc2-regs.h:499:
+#define DIEPMSK_INTKNEPMISMSK^I^IBIT(5)$

ERROR: code indent should never use tabs
#525: FILE: include/hw/usb/dwc2-regs.h:500:
+#define DIEPMSK_INTKNTXFEMPMSK^I^IBIT(4)$

ERROR: code indent should never use tabs
#526: FILE: include/hw/usb/dwc2-regs.h:501:
+#define DIEPMSK_TIMEOUTMSK^I^IBIT(3)$

ERROR: code indent should never use tabs
#527: FILE: include/hw/usb/dwc2-regs.h:502:
+#define DIEPMSK_AHBERRMSK^I^IBIT(2)$

ERROR: code indent should never use tabs
#528: FILE: include/hw/usb/dwc2-regs.h:503:
+#define DIEPMSK_EPDISBLDMSK^I^IBIT(1)$

ERROR: code indent should never use tabs
#529: FILE: include/hw/usb/dwc2-regs.h:504:
+#define DIEPMSK_XFERCOMPLMSK^I^IBIT(0)$

ERROR: code indent should never use tabs
#531: FILE: include/hw/usb/dwc2-regs.h:506:
+#define DOEPMSK^I^I^I^IHSOTG_REG(0x814)$

ERROR: code indent should never use tabs
#532: FILE: include/hw/usb/dwc2-regs.h:507:
+#define DOEPMSK_BNAMSK^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#533: FILE: include/hw/usb/dwc2-regs.h:508:
+#define DOEPMSK_BACK2BACKSETUP^I^IBIT(6)$

ERROR: code indent should never use tabs
#534: FILE: include/hw/usb/dwc2-regs.h:509:
+#define DOEPMSK_STSPHSERCVDMSK^I^IBIT(5)$

ERROR: code indent should never use tabs
#535: FILE: include/hw/usb/dwc2-regs.h:510:
+#define DOEPMSK_OUTTKNEPDISMSK^I^IBIT(4)$

ERROR: code indent should never use tabs
#536: FILE: include/hw/usb/dwc2-regs.h:511:
+#define DOEPMSK_SETUPMSK^I^IBIT(3)$

ERROR: code indent should never use tabs
#537: FILE: include/hw/usb/dwc2-regs.h:512:
+#define DOEPMSK_AHBERRMSK^I^IBIT(2)$

ERROR: code indent should never use tabs
#538: FILE: include/hw/usb/dwc2-regs.h:513:
+#define DOEPMSK_EPDISBLDMSK^I^IBIT(1)$

ERROR: code indent should never use tabs
#539: FILE: include/hw/usb/dwc2-regs.h:514:
+#define DOEPMSK_XFERCOMPLMSK^I^IBIT(0)$

ERROR: code indent should never use tabs
#541: FILE: include/hw/usb/dwc2-regs.h:516:
+#define DAINT^I^I^I^IHSOTG_REG(0x818)$

ERROR: code indent should never use tabs
#542: FILE: include/hw/usb/dwc2-regs.h:517:
+#define DAINTMSK^I^I^IHSOTG_REG(0x81C)$

ERROR: code indent should never use tabs
#543: FILE: include/hw/usb/dwc2-regs.h:518:
+#define DAINT_OUTEP_SHIFT^I^I16$

ERROR: code indent should never use tabs
#544: FILE: include/hw/usb/dwc2-regs.h:519:
+#define DAINT_OUTEP(_x)^I^I^I(1 << ((_x) + 16))$

ERROR: code indent should never use tabs
#545: FILE: include/hw/usb/dwc2-regs.h:520:
+#define DAINT_INEP(_x)^I^I^I(1 << (_x))$

ERROR: code indent should never use tabs
#547: FILE: include/hw/usb/dwc2-regs.h:522:
+#define DTKNQR1^I^I^I^IHSOTG_REG(0x820)$

ERROR: code indent should never use tabs
#548: FILE: include/hw/usb/dwc2-regs.h:523:
+#define DTKNQR2^I^I^I^IHSOTG_REG(0x824)$

ERROR: code indent should never use tabs
#549: FILE: include/hw/usb/dwc2-regs.h:524:
+#define DTKNQR3^I^I^I^IHSOTG_REG(0x830)$

ERROR: code indent should never use tabs
#550: FILE: include/hw/usb/dwc2-regs.h:525:
+#define DTKNQR4^I^I^I^IHSOTG_REG(0x834)$

ERROR: code indent should never use tabs
#551: FILE: include/hw/usb/dwc2-regs.h:526:
+#define DIEPEMPMSK^I^I^IHSOTG_REG(0x834)$

ERROR: code indent should never use tabs
#553: FILE: include/hw/usb/dwc2-regs.h:528:
+#define DVBUSDIS^I^I^IHSOTG_REG(0x828)$

ERROR: code indent should never use tabs
#554: FILE: include/hw/usb/dwc2-regs.h:529:
+#define DVBUSPULSE^I^I^IHSOTG_REG(0x82C)$

ERROR: code indent should never use tabs
#556: FILE: include/hw/usb/dwc2-regs.h:531:
+#define DIEPCTL0^I^I^IHSOTG_REG(0x900)$

ERROR: code indent should never use tabs
#557: FILE: include/hw/usb/dwc2-regs.h:532:
+#define DIEPCTL(_a)^I^I^IHSOTG_REG(0x900 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#559: FILE: include/hw/usb/dwc2-regs.h:534:
+#define DOEPCTL0^I^I^IHSOTG_REG(0xB00)$

ERROR: code indent should never use tabs
#560: FILE: include/hw/usb/dwc2-regs.h:535:
+#define DOEPCTL(_a)^I^I^IHSOTG_REG(0xB00 + ((_a) * 0x20))$

WARNING: Block comments use a leading /* on a separate line
#562: FILE: include/hw/usb/dwc2-regs.h:537:
+/* EP0 specialness:

ERROR: code indent should never use tabs
#567: FILE: include/hw/usb/dwc2-regs.h:542:
+#define D0EPCTL_MPS_MASK^I^I(0x3 << 0)$

ERROR: code indent should never use tabs
#568: FILE: include/hw/usb/dwc2-regs.h:543:
+#define D0EPCTL_MPS_SHIFT^I^I0$

ERROR: code indent should never use tabs
#569: FILE: include/hw/usb/dwc2-regs.h:544:
+#define D0EPCTL_MPS_64^I^I^I0$

ERROR: code indent should never use tabs
#570: FILE: include/hw/usb/dwc2-regs.h:545:
+#define D0EPCTL_MPS_32^I^I^I1$

ERROR: code indent should never use tabs
#571: FILE: include/hw/usb/dwc2-regs.h:546:
+#define D0EPCTL_MPS_16^I^I^I2$

ERROR: code indent should never use tabs
#572: FILE: include/hw/usb/dwc2-regs.h:547:
+#define D0EPCTL_MPS_8^I^I^I3$

ERROR: code indent should never use tabs
#574: FILE: include/hw/usb/dwc2-regs.h:549:
+#define DXEPCTL_EPENA^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#575: FILE: include/hw/usb/dwc2-regs.h:550:
+#define DXEPCTL_EPDIS^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#576: FILE: include/hw/usb/dwc2-regs.h:551:
+#define DXEPCTL_SETD1PID^I^IBIT(29)$

ERROR: code indent should never use tabs
#577: FILE: include/hw/usb/dwc2-regs.h:552:
+#define DXEPCTL_SETODDFR^I^IBIT(29)$

ERROR: code indent should never use tabs
#578: FILE: include/hw/usb/dwc2-regs.h:553:
+#define DXEPCTL_SETD0PID^I^IBIT(28)$

ERROR: code indent should never use tabs
#579: FILE: include/hw/usb/dwc2-regs.h:554:
+#define DXEPCTL_SETEVENFR^I^IBIT(28)$

ERROR: code indent should never use tabs
#580: FILE: include/hw/usb/dwc2-regs.h:555:
+#define DXEPCTL_SNAK^I^I^IBIT(27)$

ERROR: code indent should never use tabs
#581: FILE: include/hw/usb/dwc2-regs.h:556:
+#define DXEPCTL_CNAK^I^I^IBIT(26)$

ERROR: code indent should never use tabs
#582: FILE: include/hw/usb/dwc2-regs.h:557:
+#define DXEPCTL_TXFNUM_MASK^I^I(0xf << 22)$

ERROR: code indent should never use tabs
#583: FILE: include/hw/usb/dwc2-regs.h:558:
+#define DXEPCTL_TXFNUM_SHIFT^I^I22$

ERROR: code indent should never use tabs
#584: FILE: include/hw/usb/dwc2-regs.h:559:
+#define DXEPCTL_TXFNUM_LIMIT^I^I0xf$

ERROR: code indent should never use tabs
#585: FILE: include/hw/usb/dwc2-regs.h:560:
+#define DXEPCTL_TXFNUM(_x)^I^I((_x) << 22)$

ERROR: code indent should never use tabs
#586: FILE: include/hw/usb/dwc2-regs.h:561:
+#define DXEPCTL_STALL^I^I^IBIT(21)$

ERROR: code indent should never use tabs
#587: FILE: include/hw/usb/dwc2-regs.h:562:
+#define DXEPCTL_SNP^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#588: FILE: include/hw/usb/dwc2-regs.h:563:
+#define DXEPCTL_EPTYPE_MASK^I^I(0x3 << 18)$

ERROR: code indent should never use tabs
#589: FILE: include/hw/usb/dwc2-regs.h:564:
+#define DXEPCTL_EPTYPE_CONTROL^I^I(0x0 << 18)$

ERROR: code indent should never use tabs
#590: FILE: include/hw/usb/dwc2-regs.h:565:
+#define DXEPCTL_EPTYPE_ISO^I^I(0x1 << 18)$

ERROR: code indent should never use tabs
#591: FILE: include/hw/usb/dwc2-regs.h:566:
+#define DXEPCTL_EPTYPE_BULK^I^I(0x2 << 18)$

ERROR: code indent should never use tabs
#592: FILE: include/hw/usb/dwc2-regs.h:567:
+#define DXEPCTL_EPTYPE_INTERRUPT^I(0x3 << 18)$

ERROR: code indent should never use tabs
#594: FILE: include/hw/usb/dwc2-regs.h:569:
+#define DXEPCTL_NAKSTS^I^I^IBIT(17)$

ERROR: code indent should never use tabs
#595: FILE: include/hw/usb/dwc2-regs.h:570:
+#define DXEPCTL_DPID^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#596: FILE: include/hw/usb/dwc2-regs.h:571:
+#define DXEPCTL_EOFRNUM^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#597: FILE: include/hw/usb/dwc2-regs.h:572:
+#define DXEPCTL_USBACTEP^I^IBIT(15)$

ERROR: code indent should never use tabs
#598: FILE: include/hw/usb/dwc2-regs.h:573:
+#define DXEPCTL_NEXTEP_MASK^I^I(0xf << 11)$

ERROR: code indent should never use tabs
#599: FILE: include/hw/usb/dwc2-regs.h:574:
+#define DXEPCTL_NEXTEP_SHIFT^I^I11$

ERROR: code indent should never use tabs
#600: FILE: include/hw/usb/dwc2-regs.h:575:
+#define DXEPCTL_NEXTEP_LIMIT^I^I0xf$

ERROR: code indent should never use tabs
#601: FILE: include/hw/usb/dwc2-regs.h:576:
+#define DXEPCTL_NEXTEP(_x)^I^I((_x) << 11)$

ERROR: code indent should never use tabs
#602: FILE: include/hw/usb/dwc2-regs.h:577:
+#define DXEPCTL_MPS_MASK^I^I(0x7ff << 0)$

ERROR: code indent should never use tabs
#603: FILE: include/hw/usb/dwc2-regs.h:578:
+#define DXEPCTL_MPS_SHIFT^I^I0$

ERROR: code indent should never use tabs
#604: FILE: include/hw/usb/dwc2-regs.h:579:
+#define DXEPCTL_MPS_LIMIT^I^I0x7ff$

ERROR: code indent should never use tabs
#605: FILE: include/hw/usb/dwc2-regs.h:580:
+#define DXEPCTL_MPS(_x)^I^I^I((_x) << 0)$

ERROR: code indent should never use tabs
#607: FILE: include/hw/usb/dwc2-regs.h:582:
+#define DIEPINT(_a)^I^I^IHSOTG_REG(0x908 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#608: FILE: include/hw/usb/dwc2-regs.h:583:
+#define DOEPINT(_a)^I^I^IHSOTG_REG(0xB08 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#609: FILE: include/hw/usb/dwc2-regs.h:584:
+#define DXEPINT_SETUP_RCVD^I^IBIT(15)$

ERROR: code indent should never use tabs
#610: FILE: include/hw/usb/dwc2-regs.h:585:
+#define DXEPINT_NYETINTRPT^I^IBIT(14)$

ERROR: code indent should never use tabs
#611: FILE: include/hw/usb/dwc2-regs.h:586:
+#define DXEPINT_NAKINTRPT^I^IBIT(13)$

ERROR: code indent should never use tabs
#612: FILE: include/hw/usb/dwc2-regs.h:587:
+#define DXEPINT_BBLEERRINTRPT^I^IBIT(12)$

ERROR: code indent should never use tabs
#613: FILE: include/hw/usb/dwc2-regs.h:588:
+#define DXEPINT_PKTDRPSTS^I^IBIT(11)$

ERROR: code indent should never use tabs
#614: FILE: include/hw/usb/dwc2-regs.h:589:
+#define DXEPINT_BNAINTR^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#615: FILE: include/hw/usb/dwc2-regs.h:590:
+#define DXEPINT_TXFIFOUNDRN^I^IBIT(8)$

ERROR: code indent should never use tabs
#616: FILE: include/hw/usb/dwc2-regs.h:591:
+#define DXEPINT_OUTPKTERR^I^IBIT(8)$

ERROR: code indent should never use tabs
#617: FILE: include/hw/usb/dwc2-regs.h:592:
+#define DXEPINT_TXFEMP^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#618: FILE: include/hw/usb/dwc2-regs.h:593:
+#define DXEPINT_INEPNAKEFF^I^IBIT(6)$

ERROR: code indent should never use tabs
#619: FILE: include/hw/usb/dwc2-regs.h:594:
+#define DXEPINT_BACK2BACKSETUP^I^IBIT(6)$

ERROR: code indent should never use tabs
#620: FILE: include/hw/usb/dwc2-regs.h:595:
+#define DXEPINT_INTKNEPMIS^I^IBIT(5)$

ERROR: code indent should never use tabs
#621: FILE: include/hw/usb/dwc2-regs.h:596:
+#define DXEPINT_STSPHSERCVD^I^IBIT(5)$

ERROR: code indent should never use tabs
#622: FILE: include/hw/usb/dwc2-regs.h:597:
+#define DXEPINT_INTKNTXFEMP^I^IBIT(4)$

ERROR: code indent should never use tabs
#623: FILE: include/hw/usb/dwc2-regs.h:598:
+#define DXEPINT_OUTTKNEPDIS^I^IBIT(4)$

ERROR: code indent should never use tabs
#624: FILE: include/hw/usb/dwc2-regs.h:599:
+#define DXEPINT_TIMEOUT^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#625: FILE: include/hw/usb/dwc2-regs.h:600:
+#define DXEPINT_SETUP^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#626: FILE: include/hw/usb/dwc2-regs.h:601:
+#define DXEPINT_AHBERR^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#627: FILE: include/hw/usb/dwc2-regs.h:602:
+#define DXEPINT_EPDISBLD^I^IBIT(1)$

ERROR: code indent should never use tabs
#628: FILE: include/hw/usb/dwc2-regs.h:603:
+#define DXEPINT_XFERCOMPL^I^IBIT(0)$

ERROR: code indent should never use tabs
#630: FILE: include/hw/usb/dwc2-regs.h:605:
+#define DIEPTSIZ0^I^I^IHSOTG_REG(0x910)$

ERROR: code indent should never use tabs
#631: FILE: include/hw/usb/dwc2-regs.h:606:
+#define DIEPTSIZ0_PKTCNT_MASK^I^I(0x3 << 19)$

ERROR: code indent should never use tabs
#632: FILE: include/hw/usb/dwc2-regs.h:607:
+#define DIEPTSIZ0_PKTCNT_SHIFT^I^I19$

ERROR: code indent should never use tabs
#633: FILE: include/hw/usb/dwc2-regs.h:608:
+#define DIEPTSIZ0_PKTCNT_LIMIT^I^I0x3$

ERROR: code indent should never use tabs
#634: FILE: include/hw/usb/dwc2-regs.h:609:
+#define DIEPTSIZ0_PKTCNT(_x)^I^I((_x) << 19)$

ERROR: code indent should never use tabs
#635: FILE: include/hw/usb/dwc2-regs.h:610:
+#define DIEPTSIZ0_XFERSIZE_MASK^I^I(0x7f << 0)$

ERROR: code indent should never use tabs
#636: FILE: include/hw/usb/dwc2-regs.h:611:
+#define DIEPTSIZ0_XFERSIZE_SHIFT^I0$

ERROR: code indent should never use tabs
#637: FILE: include/hw/usb/dwc2-regs.h:612:
+#define DIEPTSIZ0_XFERSIZE_LIMIT^I0x7f$

ERROR: code indent should never use tabs
#638: FILE: include/hw/usb/dwc2-regs.h:613:
+#define DIEPTSIZ0_XFERSIZE(_x)^I^I((_x) << 0)$

ERROR: code indent should never use tabs
#640: FILE: include/hw/usb/dwc2-regs.h:615:
+#define DOEPTSIZ0^I^I^IHSOTG_REG(0xB10)$

ERROR: code indent should never use tabs
#641: FILE: include/hw/usb/dwc2-regs.h:616:
+#define DOEPTSIZ0_SUPCNT_MASK^I^I(0x3 << 29)$

ERROR: code indent should never use tabs
#642: FILE: include/hw/usb/dwc2-regs.h:617:
+#define DOEPTSIZ0_SUPCNT_SHIFT^I^I29$

ERROR: code indent should never use tabs
#643: FILE: include/hw/usb/dwc2-regs.h:618:
+#define DOEPTSIZ0_SUPCNT_LIMIT^I^I0x3$

ERROR: code indent should never use tabs
#644: FILE: include/hw/usb/dwc2-regs.h:619:
+#define DOEPTSIZ0_SUPCNT(_x)^I^I((_x) << 29)$

ERROR: code indent should never use tabs
#645: FILE: include/hw/usb/dwc2-regs.h:620:
+#define DOEPTSIZ0_PKTCNT^I^IBIT(19)$

ERROR: code indent should never use tabs
#646: FILE: include/hw/usb/dwc2-regs.h:621:
+#define DOEPTSIZ0_XFERSIZE_MASK^I^I(0x7f << 0)$

ERROR: code indent should never use tabs
#647: FILE: include/hw/usb/dwc2-regs.h:622:
+#define DOEPTSIZ0_XFERSIZE_SHIFT^I0$

ERROR: code indent should never use tabs
#649: FILE: include/hw/usb/dwc2-regs.h:624:
+#define DIEPTSIZ(_a)^I^I^IHSOTG_REG(0x910 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#650: FILE: include/hw/usb/dwc2-regs.h:625:
+#define DOEPTSIZ(_a)^I^I^IHSOTG_REG(0xB10 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#651: FILE: include/hw/usb/dwc2-regs.h:626:
+#define DXEPTSIZ_MC_MASK^I^I(0x3 << 29)$

ERROR: code indent should never use tabs
#652: FILE: include/hw/usb/dwc2-regs.h:627:
+#define DXEPTSIZ_MC_SHIFT^I^I29$

ERROR: code indent should never use tabs
#653: FILE: include/hw/usb/dwc2-regs.h:628:
+#define DXEPTSIZ_MC_LIMIT^I^I0x3$

ERROR: code indent should never use tabs
#654: FILE: include/hw/usb/dwc2-regs.h:629:
+#define DXEPTSIZ_MC(_x)^I^I^I((_x) << 29)$

ERROR: code indent should never use tabs
#655: FILE: include/hw/usb/dwc2-regs.h:630:
+#define DXEPTSIZ_PKTCNT_MASK^I^I(0x3ff << 19)$

ERROR: code indent should never use tabs
#656: FILE: include/hw/usb/dwc2-regs.h:631:
+#define DXEPTSIZ_PKTCNT_SHIFT^I^I19$

ERROR: code indent should never use tabs
#657: FILE: include/hw/usb/dwc2-regs.h:632:
+#define DXEPTSIZ_PKTCNT_LIMIT^I^I0x3ff$

ERROR: code indent should never use tabs
#658: FILE: include/hw/usb/dwc2-regs.h:633:
+#define DXEPTSIZ_PKTCNT_GET(_v)^I^I(((_v) >> 19) & 0x3ff)$

ERROR: code indent should never use tabs
#659: FILE: include/hw/usb/dwc2-regs.h:634:
+#define DXEPTSIZ_PKTCNT(_x)^I^I((_x) << 19)$

ERROR: code indent should never use tabs
#660: FILE: include/hw/usb/dwc2-regs.h:635:
+#define DXEPTSIZ_XFERSIZE_MASK^I^I(0x7ffff << 0)$

ERROR: code indent should never use tabs
#661: FILE: include/hw/usb/dwc2-regs.h:636:
+#define DXEPTSIZ_XFERSIZE_SHIFT^I^I0$

ERROR: code indent should never use tabs
#662: FILE: include/hw/usb/dwc2-regs.h:637:
+#define DXEPTSIZ_XFERSIZE_LIMIT^I^I0x7ffff$

ERROR: code indent should never use tabs
#663: FILE: include/hw/usb/dwc2-regs.h:638:
+#define DXEPTSIZ_XFERSIZE_GET(_v)^I(((_v) >> 0) & 0x7ffff)$

ERROR: code indent should never use tabs
#664: FILE: include/hw/usb/dwc2-regs.h:639:
+#define DXEPTSIZ_XFERSIZE(_x)^I^I((_x) << 0)$

ERROR: code indent should never use tabs
#666: FILE: include/hw/usb/dwc2-regs.h:641:
+#define DIEPDMA(_a)^I^I^IHSOTG_REG(0x914 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#667: FILE: include/hw/usb/dwc2-regs.h:642:
+#define DOEPDMA(_a)^I^I^IHSOTG_REG(0xB14 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#669: FILE: include/hw/usb/dwc2-regs.h:644:
+#define DTXFSTS(_a)^I^I^IHSOTG_REG(0x918 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#671: FILE: include/hw/usb/dwc2-regs.h:646:
+#define PCGCTL^I^I^I^IHSOTG_REG(0x0e00)$

ERROR: code indent should never use tabs
#672: FILE: include/hw/usb/dwc2-regs.h:647:
+#define PCGCTL_IF_DEV_MODE^I^IBIT(31)$

ERROR: code indent should never use tabs
#673: FILE: include/hw/usb/dwc2-regs.h:648:
+#define PCGCTL_P2HD_PRT_SPD_MASK^I(0x3 << 29)$

ERROR: code indent should never use tabs
#674: FILE: include/hw/usb/dwc2-regs.h:649:
+#define PCGCTL_P2HD_PRT_SPD_SHIFT^I29$

ERROR: code indent should never use tabs
#675: FILE: include/hw/usb/dwc2-regs.h:650:
+#define PCGCTL_P2HD_DEV_ENUM_SPD_MASK^I(0x3 << 27)$

ERROR: code indent should never use tabs
#676: FILE: include/hw/usb/dwc2-regs.h:651:
+#define PCGCTL_P2HD_DEV_ENUM_SPD_SHIFT^I27$

ERROR: code indent should never use tabs
#677: FILE: include/hw/usb/dwc2-regs.h:652:
+#define PCGCTL_MAC_DEV_ADDR_MASK^I(0x7f << 20)$

ERROR: code indent should never use tabs
#678: FILE: include/hw/usb/dwc2-regs.h:653:
+#define PCGCTL_MAC_DEV_ADDR_SHIFT^I20$

ERROR: code indent should never use tabs
#679: FILE: include/hw/usb/dwc2-regs.h:654:
+#define PCGCTL_MAX_TERMSEL^I^IBIT(19)$

ERROR: code indent should never use tabs
#680: FILE: include/hw/usb/dwc2-regs.h:655:
+#define PCGCTL_MAX_XCVRSELECT_MASK^I(0x3 << 17)$

ERROR: code indent should never use tabs
#681: FILE: include/hw/usb/dwc2-regs.h:656:
+#define PCGCTL_MAX_XCVRSELECT_SHIFT^I17$

ERROR: code indent should never use tabs
#682: FILE: include/hw/usb/dwc2-regs.h:657:
+#define PCGCTL_PORT_POWER^I^IBIT(16)$

ERROR: code indent should never use tabs
#683: FILE: include/hw/usb/dwc2-regs.h:658:
+#define PCGCTL_PRT_CLK_SEL_MASK^I^I(0x3 << 14)$

ERROR: code indent should never use tabs
#684: FILE: include/hw/usb/dwc2-regs.h:659:
+#define PCGCTL_PRT_CLK_SEL_SHIFT^I14$

ERROR: code indent should never use tabs
#685: FILE: include/hw/usb/dwc2-regs.h:660:
+#define PCGCTL_ESS_REG_RESTORED^I^IBIT(13)$

ERROR: code indent should never use tabs
#686: FILE: include/hw/usb/dwc2-regs.h:661:
+#define PCGCTL_EXTND_HIBER_SWITCH^IBIT(12)$

ERROR: code indent should never use tabs
#687: FILE: include/hw/usb/dwc2-regs.h:662:
+#define PCGCTL_EXTND_HIBER_PWRCLMP^IBIT(11)$

ERROR: code indent should never use tabs
#688: FILE: include/hw/usb/dwc2-regs.h:663:
+#define PCGCTL_ENBL_EXTND_HIBER^I^IBIT(10)$

ERROR: code indent should never use tabs
#689: FILE: include/hw/usb/dwc2-regs.h:664:
+#define PCGCTL_RESTOREMODE^I^IBIT(9)$

ERROR: code indent should never use tabs
#690: FILE: include/hw/usb/dwc2-regs.h:665:
+#define PCGCTL_RESETAFTSUSP^I^IBIT(8)$

ERROR: code indent should never use tabs
#691: FILE: include/hw/usb/dwc2-regs.h:666:
+#define PCGCTL_DEEP_SLEEP^I^IBIT(7)$

ERROR: code indent should never use tabs
#692: FILE: include/hw/usb/dwc2-regs.h:667:
+#define PCGCTL_PHY_IN_SLEEP^I^IBIT(6)$

ERROR: code indent should never use tabs
#693: FILE: include/hw/usb/dwc2-regs.h:668:
+#define PCGCTL_ENBL_SLEEP_GATING^IBIT(5)$

ERROR: code indent should never use tabs
#694: FILE: include/hw/usb/dwc2-regs.h:669:
+#define PCGCTL_RSTPDWNMODULE^I^IBIT(3)$

ERROR: code indent should never use tabs
#695: FILE: include/hw/usb/dwc2-regs.h:670:
+#define PCGCTL_PWRCLMP^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#696: FILE: include/hw/usb/dwc2-regs.h:671:
+#define PCGCTL_GATEHCLK^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#697: FILE: include/hw/usb/dwc2-regs.h:672:
+#define PCGCTL_STOPPCLK^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#703: FILE: include/hw/usb/dwc2-regs.h:678:
+#define EPFIFO(_a)^I^I^IHSOTG_REG(0x1000 + ((_a) * 0x1000))$

ERROR: code indent should never use tabs
#707: FILE: include/hw/usb/dwc2-regs.h:682:
+#define HCFG^I^I^I^IHSOTG_REG(0x0400)$

ERROR: code indent should never use tabs
#708: FILE: include/hw/usb/dwc2-regs.h:683:
+#define HCFG_MODECHTIMEN^I^IBIT(31)$

ERROR: code indent should never use tabs
#709: FILE: include/hw/usb/dwc2-regs.h:684:
+#define HCFG_PERSCHEDENA^I^IBIT(26)$

ERROR: code indent should never use tabs
#710: FILE: include/hw/usb/dwc2-regs.h:685:
+#define HCFG_FRLISTEN_MASK^I^I(0x3 << 24)$

ERROR: code indent should never use tabs
#711: FILE: include/hw/usb/dwc2-regs.h:686:
+#define HCFG_FRLISTEN_SHIFT^I^I24$

ERROR: code indent should never use tabs
#712: FILE: include/hw/usb/dwc2-regs.h:687:
+#define HCFG_FRLISTEN_8^I^I^I^I(0 << 24)$

ERROR: code indent should never use tabs
#713: FILE: include/hw/usb/dwc2-regs.h:688:
+#define FRLISTEN_8_SIZE^I^I^I^I8$

ERROR: code indent should never use tabs
#714: FILE: include/hw/usb/dwc2-regs.h:689:
+#define HCFG_FRLISTEN_16^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#715: FILE: include/hw/usb/dwc2-regs.h:690:
+#define FRLISTEN_16_SIZE^I^I^I16$

ERROR: code indent should never use tabs
#716: FILE: include/hw/usb/dwc2-regs.h:691:
+#define HCFG_FRLISTEN_32^I^I^I(2 << 24)$

ERROR: code indent should never use tabs
#717: FILE: include/hw/usb/dwc2-regs.h:692:
+#define FRLISTEN_32_SIZE^I^I^I32$

ERROR: code indent should never use tabs
#718: FILE: include/hw/usb/dwc2-regs.h:693:
+#define HCFG_FRLISTEN_64^I^I^I(3 << 24)$

ERROR: code indent should never use tabs
#719: FILE: include/hw/usb/dwc2-regs.h:694:
+#define FRLISTEN_64_SIZE^I^I^I64$

ERROR: code indent should never use tabs
#720: FILE: include/hw/usb/dwc2-regs.h:695:
+#define HCFG_DESCDMA^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#721: FILE: include/hw/usb/dwc2-regs.h:696:
+#define HCFG_RESVALID_MASK^I^I(0xff << 8)$

ERROR: code indent should never use tabs
#722: FILE: include/hw/usb/dwc2-regs.h:697:
+#define HCFG_RESVALID_SHIFT^I^I8$

ERROR: code indent should never use tabs
#723: FILE: include/hw/usb/dwc2-regs.h:698:
+#define HCFG_ENA32KHZ^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#724: FILE: include/hw/usb/dwc2-regs.h:699:
+#define HCFG_FSLSSUPP^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#725: FILE: include/hw/usb/dwc2-regs.h:700:
+#define HCFG_FSLSPCLKSEL_MASK^I^I(0x3 << 0)$

ERROR: code indent should never use tabs
#726: FILE: include/hw/usb/dwc2-regs.h:701:
+#define HCFG_FSLSPCLKSEL_SHIFT^I^I0$

ERROR: code indent should never use tabs
#727: FILE: include/hw/usb/dwc2-regs.h:702:
+#define HCFG_FSLSPCLKSEL_30_60_MHZ^I0$

ERROR: code indent should never use tabs
#728: FILE: include/hw/usb/dwc2-regs.h:703:
+#define HCFG_FSLSPCLKSEL_48_MHZ^I^I1$

ERROR: code indent should never use tabs
#729: FILE: include/hw/usb/dwc2-regs.h:704:
+#define HCFG_FSLSPCLKSEL_6_MHZ^I^I2$

ERROR: code indent should never use tabs
#731: FILE: include/hw/usb/dwc2-regs.h:706:
+#define HFIR^I^I^I^IHSOTG_REG(0x0404)$

ERROR: code indent should never use tabs
#732: FILE: include/hw/usb/dwc2-regs.h:707:
+#define HFIR_FRINT_MASK^I^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#733: FILE: include/hw/usb/dwc2-regs.h:708:
+#define HFIR_FRINT_SHIFT^I^I0$

ERROR: code indent should never use tabs
#734: FILE: include/hw/usb/dwc2-regs.h:709:
+#define HFIR_RLDCTRL^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#736: FILE: include/hw/usb/dwc2-regs.h:711:
+#define HFNUM^I^I^I^IHSOTG_REG(0x0408)$

ERROR: code indent should never use tabs
#737: FILE: include/hw/usb/dwc2-regs.h:712:
+#define HFNUM_FRREM_MASK^I^I(0xffff << 16)$

ERROR: code indent should never use tabs
#738: FILE: include/hw/usb/dwc2-regs.h:713:
+#define HFNUM_FRREM_SHIFT^I^I16$

ERROR: code indent should never use tabs
#739: FILE: include/hw/usb/dwc2-regs.h:714:
+#define HFNUM_FRNUM_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#740: FILE: include/hw/usb/dwc2-regs.h:715:
+#define HFNUM_FRNUM_SHIFT^I^I0$

ERROR: code indent should never use tabs
#741: FILE: include/hw/usb/dwc2-regs.h:716:
+#define HFNUM_MAX_FRNUM^I^I^I0x3fff$

ERROR: code indent should never use tabs
#743: FILE: include/hw/usb/dwc2-regs.h:718:
+#define HPTXSTS^I^I^I^IHSOTG_REG(0x0410)$

ERROR: code indent should never use tabs
#744: FILE: include/hw/usb/dwc2-regs.h:719:
+#define TXSTS_QTOP_ODD^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#745: FILE: include/hw/usb/dwc2-regs.h:720:
+#define TXSTS_QTOP_CHNEP_MASK^I^I(0xf << 27)$

ERROR: code indent should never use tabs
#746: FILE: include/hw/usb/dwc2-regs.h:721:
+#define TXSTS_QTOP_CHNEP_SHIFT^I^I27$

ERROR: code indent should never use tabs
#747: FILE: include/hw/usb/dwc2-regs.h:722:
+#define TXSTS_QTOP_TOKEN_MASK^I^I(0x3 << 25)$

ERROR: code indent should never use tabs
#748: FILE: include/hw/usb/dwc2-regs.h:723:
+#define TXSTS_QTOP_TOKEN_SHIFT^I^I25$

ERROR: code indent should never use tabs
#749: FILE: include/hw/usb/dwc2-regs.h:724:
+#define TXSTS_QTOP_TERMINATE^I^IBIT(24)$

ERROR: code indent should never use tabs
#750: FILE: include/hw/usb/dwc2-regs.h:725:
+#define TXSTS_QSPCAVAIL_MASK^I^I(0xff << 16)$

ERROR: code indent should never use tabs
#751: FILE: include/hw/usb/dwc2-regs.h:726:
+#define TXSTS_QSPCAVAIL_SHIFT^I^I16$

ERROR: code indent should never use tabs
#752: FILE: include/hw/usb/dwc2-regs.h:727:
+#define TXSTS_FSPCAVAIL_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#753: FILE: include/hw/usb/dwc2-regs.h:728:
+#define TXSTS_FSPCAVAIL_SHIFT^I^I0$

ERROR: code indent should never use tabs
#755: FILE: include/hw/usb/dwc2-regs.h:730:
+#define HAINT^I^I^I^IHSOTG_REG(0x0414)$

ERROR: code indent should never use tabs
#756: FILE: include/hw/usb/dwc2-regs.h:731:
+#define HAINTMSK^I^I^IHSOTG_REG(0x0418)$

ERROR: code indent should never use tabs
#757: FILE: include/hw/usb/dwc2-regs.h:732:
+#define HFLBADDR^I^I^IHSOTG_REG(0x041c)$

ERROR: code indent should never use tabs
#759: FILE: include/hw/usb/dwc2-regs.h:734:
+#define HPRT0^I^I^I^IHSOTG_REG(0x0440)$

ERROR: code indent should never use tabs
#760: FILE: include/hw/usb/dwc2-regs.h:735:
+#define HPRT0_SPD_MASK^I^I^I(0x3 << 17)$

ERROR: code indent should never use tabs
#761: FILE: include/hw/usb/dwc2-regs.h:736:
+#define HPRT0_SPD_SHIFT^I^I^I17$

ERROR: code indent should never use tabs
#762: FILE: include/hw/usb/dwc2-regs.h:737:
+#define HPRT0_SPD_HIGH_SPEED^I^I0$

ERROR: code indent should never use tabs
#763: FILE: include/hw/usb/dwc2-regs.h:738:
+#define HPRT0_SPD_FULL_SPEED^I^I1$

ERROR: code indent should never use tabs
#764: FILE: include/hw/usb/dwc2-regs.h:739:
+#define HPRT0_SPD_LOW_SPEED^I^I2$

ERROR: code indent should never use tabs
#765: FILE: include/hw/usb/dwc2-regs.h:740:
+#define HPRT0_TSTCTL_MASK^I^I(0xf << 13)$

ERROR: code indent should never use tabs
#766: FILE: include/hw/usb/dwc2-regs.h:741:
+#define HPRT0_TSTCTL_SHIFT^I^I13$

ERROR: code indent should never use tabs
#767: FILE: include/hw/usb/dwc2-regs.h:742:
+#define HPRT0_PWR^I^I^IBIT(12)$

ERROR: code indent should never use tabs
#768: FILE: include/hw/usb/dwc2-regs.h:743:
+#define HPRT0_LNSTS_MASK^I^I(0x3 << 10)$

ERROR: code indent should never use tabs
#769: FILE: include/hw/usb/dwc2-regs.h:744:
+#define HPRT0_LNSTS_SHIFT^I^I10$

ERROR: code indent should never use tabs
#770: FILE: include/hw/usb/dwc2-regs.h:745:
+#define HPRT0_RST^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#771: FILE: include/hw/usb/dwc2-regs.h:746:
+#define HPRT0_SUSP^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#772: FILE: include/hw/usb/dwc2-regs.h:747:
+#define HPRT0_RES^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#773: FILE: include/hw/usb/dwc2-regs.h:748:
+#define HPRT0_OVRCURRCHG^I^IBIT(5)$

ERROR: code indent should never use tabs
#774: FILE: include/hw/usb/dwc2-regs.h:749:
+#define HPRT0_OVRCURRACT^I^IBIT(4)$

ERROR: code indent should never use tabs
#775: FILE: include/hw/usb/dwc2-regs.h:750:
+#define HPRT0_ENACHG^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#776: FILE: include/hw/usb/dwc2-regs.h:751:
+#define HPRT0_ENA^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#777: FILE: include/hw/usb/dwc2-regs.h:752:
+#define HPRT0_CONNDET^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#778: FILE: include/hw/usb/dwc2-regs.h:753:
+#define HPRT0_CONNSTS^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#780: FILE: include/hw/usb/dwc2-regs.h:755:
+#define HCCHAR(_ch)^I^I^IHSOTG_REG(0x0500 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#781: FILE: include/hw/usb/dwc2-regs.h:756:
+#define HCCHAR_CHENA^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#782: FILE: include/hw/usb/dwc2-regs.h:757:
+#define HCCHAR_CHDIS^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#783: FILE: include/hw/usb/dwc2-regs.h:758:
+#define HCCHAR_ODDFRM^I^I^IBIT(29)$

ERROR: code indent should never use tabs
#784: FILE: include/hw/usb/dwc2-regs.h:759:
+#define HCCHAR_DEVADDR_MASK^I^I(0x7f << 22)$

ERROR: code indent should never use tabs
#785: FILE: include/hw/usb/dwc2-regs.h:760:
+#define HCCHAR_DEVADDR_SHIFT^I^I22$

ERROR: code indent should never use tabs
#786: FILE: include/hw/usb/dwc2-regs.h:761:
+#define HCCHAR_MULTICNT_MASK^I^I(0x3 << 20)$

ERROR: code indent should never use tabs
#787: FILE: include/hw/usb/dwc2-regs.h:762:
+#define HCCHAR_MULTICNT_SHIFT^I^I20$

ERROR: code indent should never use tabs
#788: FILE: include/hw/usb/dwc2-regs.h:763:
+#define HCCHAR_EPTYPE_MASK^I^I(0x3 << 18)$

ERROR: code indent should never use tabs
#789: FILE: include/hw/usb/dwc2-regs.h:764:
+#define HCCHAR_EPTYPE_SHIFT^I^I18$

ERROR: code indent should never use tabs
#790: FILE: include/hw/usb/dwc2-regs.h:765:
+#define HCCHAR_LSPDDEV^I^I^IBIT(17)$

ERROR: code indent should never use tabs
#791: FILE: include/hw/usb/dwc2-regs.h:766:
+#define HCCHAR_EPDIR^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#792: FILE: include/hw/usb/dwc2-regs.h:767:
+#define HCCHAR_EPNUM_MASK^I^I(0xf << 11)$

ERROR: code indent should never use tabs
#793: FILE: include/hw/usb/dwc2-regs.h:768:
+#define HCCHAR_EPNUM_SHIFT^I^I11$

ERROR: code indent should never use tabs
#794: FILE: include/hw/usb/dwc2-regs.h:769:
+#define HCCHAR_MPS_MASK^I^I^I(0x7ff << 0)$

ERROR: code indent should never use tabs
#795: FILE: include/hw/usb/dwc2-regs.h:770:
+#define HCCHAR_MPS_SHIFT^I^I0$

ERROR: code indent should never use tabs
#797: FILE: include/hw/usb/dwc2-regs.h:772:
+#define HCSPLT(_ch)^I^I^IHSOTG_REG(0x0504 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#798: FILE: include/hw/usb/dwc2-regs.h:773:
+#define HCSPLT_SPLTENA^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#799: FILE: include/hw/usb/dwc2-regs.h:774:
+#define HCSPLT_COMPSPLT^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#800: FILE: include/hw/usb/dwc2-regs.h:775:
+#define HCSPLT_XACTPOS_MASK^I^I(0x3 << 14)$

ERROR: code indent should never use tabs
#801: FILE: include/hw/usb/dwc2-regs.h:776:
+#define HCSPLT_XACTPOS_SHIFT^I^I14$

ERROR: code indent should never use tabs
#802: FILE: include/hw/usb/dwc2-regs.h:777:
+#define HCSPLT_XACTPOS_MID^I^I0$

ERROR: code indent should never use tabs
#803: FILE: include/hw/usb/dwc2-regs.h:778:
+#define HCSPLT_XACTPOS_END^I^I1$

ERROR: code indent should never use tabs
#804: FILE: include/hw/usb/dwc2-regs.h:779:
+#define HCSPLT_XACTPOS_BEGIN^I^I2$

ERROR: code indent should never use tabs
#805: FILE: include/hw/usb/dwc2-regs.h:780:
+#define HCSPLT_XACTPOS_ALL^I^I3$

ERROR: code indent should never use tabs
#806: FILE: include/hw/usb/dwc2-regs.h:781:
+#define HCSPLT_HUBADDR_MASK^I^I(0x7f << 7)$

ERROR: code indent should never use tabs
#807: FILE: include/hw/usb/dwc2-regs.h:782:
+#define HCSPLT_HUBADDR_SHIFT^I^I7$

ERROR: code indent should never use tabs
#808: FILE: include/hw/usb/dwc2-regs.h:783:
+#define HCSPLT_PRTADDR_MASK^I^I(0x7f << 0)$

ERROR: code indent should never use tabs
#809: FILE: include/hw/usb/dwc2-regs.h:784:
+#define HCSPLT_PRTADDR_SHIFT^I^I0$

ERROR: code indent should never use tabs
#811: FILE: include/hw/usb/dwc2-regs.h:786:
+#define HCINT(_ch)^I^I^IHSOTG_REG(0x0508 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#812: FILE: include/hw/usb/dwc2-regs.h:787:
+#define HCINTMSK(_ch)^I^I^IHSOTG_REG(0x050c + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#813: FILE: include/hw/usb/dwc2-regs.h:788:
+#define HCINTMSK_RESERVED14_31^I^I(0x3ffff << 14)$

ERROR: code indent should never use tabs
#814: FILE: include/hw/usb/dwc2-regs.h:789:
+#define HCINTMSK_FRM_LIST_ROLL^I^IBIT(13)$

ERROR: code indent should never use tabs
#815: FILE: include/hw/usb/dwc2-regs.h:790:
+#define HCINTMSK_XCS_XACT^I^IBIT(12)$

ERROR: code indent should never use tabs
#816: FILE: include/hw/usb/dwc2-regs.h:791:
+#define HCINTMSK_BNA^I^I^IBIT(11)$

ERROR: code indent should never use tabs
#817: FILE: include/hw/usb/dwc2-regs.h:792:
+#define HCINTMSK_DATATGLERR^I^IBIT(10)$

ERROR: code indent should never use tabs
#818: FILE: include/hw/usb/dwc2-regs.h:793:
+#define HCINTMSK_FRMOVRUN^I^IBIT(9)$

ERROR: code indent should never use tabs
#819: FILE: include/hw/usb/dwc2-regs.h:794:
+#define HCINTMSK_BBLERR^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#820: FILE: include/hw/usb/dwc2-regs.h:795:
+#define HCINTMSK_XACTERR^I^IBIT(7)$

ERROR: code indent should never use tabs
#821: FILE: include/hw/usb/dwc2-regs.h:796:
+#define HCINTMSK_NYET^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#822: FILE: include/hw/usb/dwc2-regs.h:797:
+#define HCINTMSK_ACK^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#823: FILE: include/hw/usb/dwc2-regs.h:798:
+#define HCINTMSK_NAK^I^I^IBIT(4)$

ERROR: code indent should never use tabs
#824: FILE: include/hw/usb/dwc2-regs.h:799:
+#define HCINTMSK_STALL^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#825: FILE: include/hw/usb/dwc2-regs.h:800:
+#define HCINTMSK_AHBERR^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#826: FILE: include/hw/usb/dwc2-regs.h:801:
+#define HCINTMSK_CHHLTD^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#827: FILE: include/hw/usb/dwc2-regs.h:802:
+#define HCINTMSK_XFERCOMPL^I^IBIT(0)$

ERROR: code indent should never use tabs
#829: FILE: include/hw/usb/dwc2-regs.h:804:
+#define HCTSIZ(_ch)^I^I^IHSOTG_REG(0x0510 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#830: FILE: include/hw/usb/dwc2-regs.h:805:
+#define TSIZ_DOPNG^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#831: FILE: include/hw/usb/dwc2-regs.h:806:
+#define TSIZ_SC_MC_PID_MASK^I^I(0x3 << 29)$

ERROR: code indent should never use tabs
#832: FILE: include/hw/usb/dwc2-regs.h:807:
+#define TSIZ_SC_MC_PID_SHIFT^I^I29$

ERROR: code indent should never use tabs
#833: FILE: include/hw/usb/dwc2-regs.h:808:
+#define TSIZ_SC_MC_PID_DATA0^I^I0$

ERROR: code indent should never use tabs
#834: FILE: include/hw/usb/dwc2-regs.h:809:
+#define TSIZ_SC_MC_PID_DATA2^I^I1$

ERROR: code indent should never use tabs
#835: FILE: include/hw/usb/dwc2-regs.h:810:
+#define TSIZ_SC_MC_PID_DATA1^I^I2$

ERROR: code indent should never use tabs
#836: FILE: include/hw/usb/dwc2-regs.h:811:
+#define TSIZ_SC_MC_PID_MDATA^I^I3$

ERROR: code indent should never use tabs
#837: FILE: include/hw/usb/dwc2-regs.h:812:
+#define TSIZ_SC_MC_PID_SETUP^I^I3$

ERROR: code indent should never use tabs
#838: FILE: include/hw/usb/dwc2-regs.h:813:
+#define TSIZ_PKTCNT_MASK^I^I(0x3ff << 19)$

ERROR: code indent should never use tabs
#839: FILE: include/hw/usb/dwc2-regs.h:814:
+#define TSIZ_PKTCNT_SHIFT^I^I19$

ERROR: code indent should never use tabs
#840: FILE: include/hw/usb/dwc2-regs.h:815:
+#define TSIZ_NTD_MASK^I^I^I(0xff << 8)$

ERROR: code indent should never use tabs
#841: FILE: include/hw/usb/dwc2-regs.h:816:
+#define TSIZ_NTD_SHIFT^I^I^I8$

ERROR: code indent should never use tabs
#842: FILE: include/hw/usb/dwc2-regs.h:817:
+#define TSIZ_SCHINFO_MASK^I^I(0xff << 0)$

ERROR: code indent should never use tabs
#843: FILE: include/hw/usb/dwc2-regs.h:818:
+#define TSIZ_SCHINFO_SHIFT^I^I0$

ERROR: code indent should never use tabs
#844: FILE: include/hw/usb/dwc2-regs.h:819:
+#define TSIZ_XFERSIZE_MASK^I^I(0x7ffff << 0)$

ERROR: code indent should never use tabs
#845: FILE: include/hw/usb/dwc2-regs.h:820:
+#define TSIZ_XFERSIZE_SHIFT^I^I0$

ERROR: code indent should never use tabs
#847: FILE: include/hw/usb/dwc2-regs.h:822:
+#define HCDMA(_ch)^I^I^IHSOTG_REG(0x0514 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#849: FILE: include/hw/usb/dwc2-regs.h:824:
+#define HCDMAB(_ch)^I^I^IHSOTG_REG(0x051c + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#851: FILE: include/hw/usb/dwc2-regs.h:826:
+#define HCFIFO(_ch)^I^I^IHSOTG_REG(0x1000 + 0x1000 * (_ch))$

ERROR: code indent should never use tabs
#864: FILE: include/hw/usb/dwc2-regs.h:839:
+^Iuint32_t status;$

ERROR: code indent should never use tabs
#865: FILE: include/hw/usb/dwc2-regs.h:840:
+^Iuint32_t buf;$

ERROR: code indent should never use tabs
#870: FILE: include/hw/usb/dwc2-regs.h:845:
+#define HOST_DMA_A^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#871: FILE: include/hw/usb/dwc2-regs.h:846:
+#define HOST_DMA_STS_MASK^I^I(0x3 << 28)$

ERROR: code indent should never use tabs
#872: FILE: include/hw/usb/dwc2-regs.h:847:
+#define HOST_DMA_STS_SHIFT^I^I28$

ERROR: code indent should never use tabs
#873: FILE: include/hw/usb/dwc2-regs.h:848:
+#define HOST_DMA_STS_PKTERR^I^IBIT(28)$

ERROR: code indent should never use tabs
#874: FILE: include/hw/usb/dwc2-regs.h:849:
+#define HOST_DMA_EOL^I^I^IBIT(26)$

ERROR: code indent should never use tabs
#875: FILE: include/hw/usb/dwc2-regs.h:850:
+#define HOST_DMA_IOC^I^I^IBIT(25)$

ERROR: code indent should never use tabs
#876: FILE: include/hw/usb/dwc2-regs.h:851:
+#define HOST_DMA_SUP^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#877: FILE: include/hw/usb/dwc2-regs.h:852:
+#define HOST_DMA_ALT_QTD^I^IBIT(23)$

ERROR: code indent should never use tabs
#878: FILE: include/hw/usb/dwc2-regs.h:853:
+#define HOST_DMA_QTD_OFFSET_MASK^I(0x3f << 17)$

ERROR: code indent should never use tabs
#879: FILE: include/hw/usb/dwc2-regs.h:854:
+#define HOST_DMA_QTD_OFFSET_SHIFT^I17$

ERROR: code indent should never use tabs
#880: FILE: include/hw/usb/dwc2-regs.h:855:
+#define HOST_DMA_ISOC_NBYTES_MASK^I(0xfff << 0)$

ERROR: code indent should never use tabs
#881: FILE: include/hw/usb/dwc2-regs.h:856:
+#define HOST_DMA_ISOC_NBYTES_SHIFT^I0$

ERROR: code indent should never use tabs
#882: FILE: include/hw/usb/dwc2-regs.h:857:
+#define HOST_DMA_NBYTES_MASK^I^I(0x1ffff << 0)$

ERROR: code indent should never use tabs
#883: FILE: include/hw/usb/dwc2-regs.h:858:
+#define HOST_DMA_NBYTES_SHIFT^I^I0$

ERROR: code indent should never use tabs
#884: FILE: include/hw/usb/dwc2-regs.h:859:
+#define HOST_DMA_NBYTES_LIMIT^I^I131071$

ERROR: code indent should never use tabs
#888: FILE: include/hw/usb/dwc2-regs.h:863:
+#define DEV_DMA_BUFF_STS_MASK^I^I(0x3 << 30)$

ERROR: code indent should never use tabs
#889: FILE: include/hw/usb/dwc2-regs.h:864:
+#define DEV_DMA_BUFF_STS_SHIFT^I^I30$

ERROR: code indent should never use tabs
#890: FILE: include/hw/usb/dwc2-regs.h:865:
+#define DEV_DMA_BUFF_STS_HREADY^I^I0$

ERROR: code indent should never use tabs
#891: FILE: include/hw/usb/dwc2-regs.h:866:
+#define DEV_DMA_BUFF_STS_DMABUSY^I1$

ERROR: code indent should never use tabs
#892: FILE: include/hw/usb/dwc2-regs.h:867:
+#define DEV_DMA_BUFF_STS_DMADONE^I2$

ERROR: code indent should never use tabs
#893: FILE: include/hw/usb/dwc2-regs.h:868:
+#define DEV_DMA_BUFF_STS_HBUSY^I^I3$

ERROR: code indent should never use tabs
#894: FILE: include/hw/usb/dwc2-regs.h:869:
+#define DEV_DMA_STS_MASK^I^I(0x3 << 28)$

ERROR: code indent should never use tabs
#895: FILE: include/hw/usb/dwc2-regs.h:870:
+#define DEV_DMA_STS_SHIFT^I^I28$

ERROR: code indent should never use tabs
#896: FILE: include/hw/usb/dwc2-regs.h:871:
+#define DEV_DMA_STS_SUCC^I^I0$

ERROR: code indent should never use tabs
#897: FILE: include/hw/usb/dwc2-regs.h:872:
+#define DEV_DMA_STS_BUFF_FLUSH^I^I1$

ERROR: code indent should never use tabs
#898: FILE: include/hw/usb/dwc2-regs.h:873:
+#define DEV_DMA_STS_BUFF_ERR^I^I3$

ERROR: code indent should never use tabs
#899: FILE: include/hw/usb/dwc2-regs.h:874:
+#define DEV_DMA_L^I^I^IBIT(27)$

ERROR: code indent should never use tabs
#900: FILE: include/hw/usb/dwc2-regs.h:875:
+#define DEV_DMA_SHORT^I^I^IBIT(26)$

ERROR: code indent should never use tabs
#901: FILE: include/hw/usb/dwc2-regs.h:876:
+#define DEV_DMA_IOC^I^I^IBIT(25)$

ERROR: code indent should never use tabs
#902: FILE: include/hw/usb/dwc2-regs.h:877:
+#define DEV_DMA_SR^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#903: FILE: include/hw/usb/dwc2-regs.h:878:
+#define DEV_DMA_MTRF^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#904: FILE: include/hw/usb/dwc2-regs.h:879:
+#define DEV_DMA_ISOC_PID_MASK^I^I(0x3 << 23)$

ERROR: code indent should never use tabs
#905: FILE: include/hw/usb/dwc2-regs.h:880:
+#define DEV_DMA_ISOC_PID_SHIFT^I^I23$

ERROR: code indent should never use tabs
#906: FILE: include/hw/usb/dwc2-regs.h:881:
+#define DEV_DMA_ISOC_PID_DATA0^I^I0$

ERROR: code indent should never use tabs
#907: FILE: include/hw/usb/dwc2-regs.h:882:
+#define DEV_DMA_ISOC_PID_DATA2^I^I1$

ERROR: code indent should never use tabs
#908: FILE: include/hw/usb/dwc2-regs.h:883:
+#define DEV_DMA_ISOC_PID_DATA1^I^I2$

ERROR: code indent should never use tabs
#909: FILE: include/hw/usb/dwc2-regs.h:884:
+#define DEV_DMA_ISOC_PID_MDATA^I^I3$

ERROR: code indent should never use tabs
#910: FILE: include/hw/usb/dwc2-regs.h:885:
+#define DEV_DMA_ISOC_FRNUM_MASK^I^I(0x7ff << 12)$

ERROR: code indent should never use tabs
#911: FILE: include/hw/usb/dwc2-regs.h:886:
+#define DEV_DMA_ISOC_FRNUM_SHIFT^I12$

ERROR: code indent should never use tabs
#912: FILE: include/hw/usb/dwc2-regs.h:887:
+#define DEV_DMA_ISOC_TX_NBYTES_MASK^I(0xfff << 0)$

ERROR: code indent should never use tabs
#913: FILE: include/hw/usb/dwc2-regs.h:888:
+#define DEV_DMA_ISOC_TX_NBYTES_LIMIT^I0xfff$

ERROR: code indent should never use tabs
#914: FILE: include/hw/usb/dwc2-regs.h:889:
+#define DEV_DMA_ISOC_RX_NBYTES_MASK^I(0x7ff << 0)$

ERROR: code indent should never use tabs
#915: FILE: include/hw/usb/dwc2-regs.h:890:
+#define DEV_DMA_ISOC_RX_NBYTES_LIMIT^I0x7ff$

ERROR: code indent should never use tabs
#916: FILE: include/hw/usb/dwc2-regs.h:891:
+#define DEV_DMA_ISOC_NBYTES_SHIFT^I0$

ERROR: code indent should never use tabs
#917: FILE: include/hw/usb/dwc2-regs.h:892:
+#define DEV_DMA_NBYTES_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#918: FILE: include/hw/usb/dwc2-regs.h:893:
+#define DEV_DMA_NBYTES_SHIFT^I^I0$

ERROR: code indent should never use tabs
#919: FILE: include/hw/usb/dwc2-regs.h:894:
+#define DEV_DMA_NBYTES_LIMIT^I^I0xffff$

ERROR: code indent should never use tabs
#921: FILE: include/hw/usb/dwc2-regs.h:896:
+#define MAX_DMA_DESC_NUM_GENERIC^I64$

ERROR: code indent should never use tabs
#922: FILE: include/hw/usb/dwc2-regs.h:897:
+#define MAX_DMA_DESC_NUM_HS_ISOC^I256$

total: 753 errors, 3 warnings, 899 lines checked

Patch 15/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

16/29 Checking commit 26ec4138d588 (dwc-hsotg (dwc2) USB host controller state definitions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#17: 
new file mode 100644

total: 0 errors, 1 warnings, 190 lines checked

Patch 16/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/29 Checking commit d6df0bcd83ac (dwc-hsotg (dwc2) USB host controller emulation)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#66: 
new file mode 100644

total: 0 errors, 1 warnings, 1491 lines checked

Patch 17/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
18/29 Checking commit f9720e85e5d3 (usb: add short-packet handling to usb-storage driver)
19/29 Checking commit 2a56c0cabb41 (wire in the dwc-hsotg (dwc2) USB host controller emulation)
20/29 Checking commit 725f9e459f44 (raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host)
21/29 Checking commit 3daf1647a8b3 (target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#57: FILE: target/arm/translate-neon.inc.c:1206:
+static bool do_vector_2sh(DisasContext *s, arg_2reg_shift *a, GVecGen2iFn *fn)
                                                           ^

ERROR: spaces required around that '*' (ctx:WxV)
#87: FILE: target/arm/translate-neon.inc.c:1236:
+    static bool trans_##INSN##_2sh(DisasContext *s, arg_2reg_shift *a)  \
                                                                    ^

total: 2 errors, 0 warnings, 99 lines checked

Patch 21/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

22/29 Checking commit 7e946c583157 (target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#94: FILE: target/arm/translate-neon.inc.c:1262:
+static bool trans_VSHR_S_2sh(DisasContext *s, arg_2reg_shift *a)
                                                              ^

total: 1 errors, 0 warnings, 120 lines checked

Patch 22/29 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

23/29 Checking commit c0457fa632e7 (target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree)
24/29 Checking commit f0efe7163fde (target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree)
25/29 Checking commit 93549e817474 (target/arm: Convert Neon narrowing shifts with op==8 to decodetree)
26/29 Checking commit 0f4297947d88 (target/arm: Convert Neon narrowing shifts with op==9 to decodetree)
27/29 Checking commit 595e77ee5b7f (target/arm: Convert Neon VSHLL, VMOVL to decodetree)
28/29 Checking commit c07ebcb34b60 (target/arm: Convert VCVT fixed-point ops to decodetree)
29/29 Checking commit 8d19bb160420 (target/arm: Convert Neon one-register-and-immediate insns to decodetree)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200605165007.12095-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

^ permalink raw reply	[flat|nested] 36+ messages in thread

* [PULL 00/29] target-arm queue
@ 2020-06-05 16:49 Peter Maydell
  2020-06-05 20:10 ` no-reply
  2020-06-08 10:04 ` Peter Maydell
  0 siblings, 2 replies; 36+ messages in thread
From: Peter Maydell @ 2020-06-05 16:49 UTC (permalink / raw)
  To: qemu-devel

Arm queue; some of the simpler stuff, things other have reviewed (thanks!), etc.

-- PMM

The following changes since commit 5d2f557b47dfbf8f23277a5bdd8473d4607c681a:

  Merge remote-tracking branch 'remotes/kraxel/tags/vga-20200605-pull-request' into staging (2020-06-05 13:53:05 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200605

for you to fetch changes up to 2c35a39eda0b16c2ed85c94cec204bf5efb97812:

  target/arm: Convert Neon one-register-and-immediate insns to decodetree (2020-06-05 17:23:10 +0100)

----------------------------------------------------------------
target-arm queue:
 hw/ssi/imx_spi: Handle tx burst lengths other than 8 correctly
 hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask()
 hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()
 target/arm: Convert crypto insns to gvec
 hw/adc/stm32f2xx_adc: Correct memory region size and access size
 tests/acceptance: Add a boot test for the xlnx-versal-virt machine
 docs/system: Document Aspeed boards
 raspi: Add model of the USB controller
 target/arm: Convert 2-reg-and-shift and 1-reg-imm Neon insns to decodetree

----------------------------------------------------------------
Cédric Le Goater (1):
      docs/system: Document Aspeed boards

Eden Mikitas (2):
      hw/ssi/imx_spi: changed while statement to prevent underflow
      hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave

Paul Zimmerman (7):
      raspi: add BCM2835 SOC MPHI emulation
      dwc-hsotg (dwc2) USB host controller register definitions
      dwc-hsotg (dwc2) USB host controller state definitions
      dwc-hsotg (dwc2) USB host controller emulation
      usb: add short-packet handling to usb-storage driver
      wire in the dwc-hsotg (dwc2) USB host controller emulation
      raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host

Peter Maydell (9):
      target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree
      target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree
      target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to decodetree
      target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree
      target/arm: Convert Neon narrowing shifts with op==8 to decodetree
      target/arm: Convert Neon narrowing shifts with op==9 to decodetree
      target/arm: Convert Neon VSHLL, VMOVL to decodetree
      target/arm: Convert VCVT fixed-point ops to decodetree
      target/arm: Convert Neon one-register-and-immediate insns to decodetree

Philippe Mathieu-Daudé (3):
      hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask()
      hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()
      hw/adc/stm32f2xx_adc: Correct memory region size and access size

Richard Henderson (6):
      target/arm: Convert aes and sm4 to gvec helpers
      target/arm: Convert rax1 to gvec helpers
      target/arm: Convert sha512 and sm3 to gvec helpers
      target/arm: Convert sha1 and sha256 to gvec helpers
      target/arm: Split helper_crypto_sha1_3reg
      target/arm: Split helper_crypto_sm3tt

Thomas Huth (1):
      tests/acceptance: Add a boot test for the xlnx-versal-virt machine

 docs/system/arm/aspeed.rst             |   85 ++
 docs/system/target-arm.rst             |    1 +
 hw/usb/hcd-dwc2.h                      |  190 +++++
 include/hw/arm/bcm2835_peripherals.h   |    5 +-
 include/hw/misc/bcm2835_mphi.h         |   44 +
 include/hw/usb/dwc2-regs.h             |  899 ++++++++++++++++++++
 target/arm/helper.h                    |   45 +-
 target/arm/translate-a64.h             |    3 +
 target/arm/vec_internal.h              |   33 +
 target/arm/neon-dp.decode              |  214 ++++-
 hw/adc/stm32f2xx_adc.c                 |    4 +-
 hw/arm/bcm2835_peripherals.c           |   38 +-
 hw/arm/pxa2xx.c                        |   66 +-
 hw/input/pxa2xx_keypad.c               |   10 +-
 hw/misc/bcm2835_mphi.c                 |  191 +++++
 hw/ssi/imx_spi.c                       |    4 +-
 hw/usb/dev-storage.c                   |   15 +-
 hw/usb/hcd-dwc2.c                      | 1417 ++++++++++++++++++++++++++++++++
 target/arm/crypto_helper.c             |  267 ++++--
 target/arm/translate-a64.c             |  198 ++---
 target/arm/translate-neon.inc.c        |  796 ++++++++++++++----
 target/arm/translate.c                 |  539 +-----------
 target/arm/vec_helper.c                |   12 +-
 hw/misc/Makefile.objs                  |    1 +
 hw/usb/Kconfig                         |    5 +
 hw/usb/Makefile.objs                   |    1 +
 hw/usb/trace-events                    |   50 ++
 tests/acceptance/boot_linux_console.py |   35 +-
 28 files changed, 4258 insertions(+), 910 deletions(-)
 create mode 100644 docs/system/arm/aspeed.rst
 create mode 100644 hw/usb/hcd-dwc2.h
 create mode 100644 include/hw/misc/bcm2835_mphi.h
 create mode 100644 include/hw/usb/dwc2-regs.h
 create mode 100644 target/arm/vec_internal.h
 create mode 100644 hw/misc/bcm2835_mphi.c
 create mode 100644 hw/usb/hcd-dwc2.c


^ permalink raw reply	[flat|nested] 36+ messages in thread

* [PULL 00/29] target-arm queue
@ 2020-05-21 19:15 Peter Maydell
  0 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-05-21 19:15 UTC (permalink / raw)
  To: qemu-devel

target-arm queue: nothing big, just a collection of minor things.

-- PMM

The following changes since commit ae3aa5da96f4ccf0c2a28851449d92db9fcfad71:

  Merge remote-tracking branch 'remotes/berrange/tags/socket-next-pull-request' into staging (2020-05-21 16:47:28 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200521

for you to fetch changes up to 17b5df7b65d0192c5d775b5e1581518580774c77:

  linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 (2020-05-21 20:00:19 +0100)

----------------------------------------------------------------
target-arm queue:
 * tests/acceptance: Add a test for the canon-a1100 machine
 * docs/system: Document some of the Arm development boards
 * linux-user: make BKPT insn cause SIGTRAP, not be a syscall
 * target/arm: Remove unused GEN_NEON_INTEGER_OP macro
 * fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog
 * hw/arm: Use qemu_log_mask() instead of hw_error() in various places
 * ARM: PL061: Introduce N_GPIOS
 * target/arm: Improve clear_vec_high() usage
 * target/arm: Allow user-mode code to write CPSR.E via MSR
 * linux-user/arm: Reset CPSR_E when entering a signal handler
 * linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32

----------------------------------------------------------------
Amanieu d'Antras (1):
      linux-user/arm: Reset CPSR_E when entering a signal handler

Geert Uytterhoeven (1):
      ARM: PL061: Introduce N_GPIOS

Guenter Roeck (8):
      hw: Move i.MX watchdog driver to hw/watchdog
      hw/watchdog: Implement full i.MX watchdog support
      hw/arm/fsl-imx25: Wire up watchdog
      hw/arm/fsl-imx31: Wire up watchdog
      hw/arm/fsl-imx6: Connect watchdog interrupts
      hw/arm/fsl-imx6ul: Connect watchdog interrupts
      hw/arm/fsl-imx7: Instantiate various unimplemented devices
      hw/arm/fsl-imx7: Connect watchdog interrupts

Peter Maydell (12):
      docs/system: Add 'Arm' to the Integrator/CP document title
      docs/system: Sort Arm board index into alphabetical order
      docs/system: Document Arm Versatile Express boards
      docs/system: Document the various MPS2 models
      docs/system: Document Musca boards
      linux-user/arm: BKPT should cause SIGTRAP, not be a syscall
      linux-user/arm: Remove bogus SVC 0xf0002 handling
      linux-user/arm: Handle invalid arm-specific syscalls correctly
      linux-user/arm: Fix identification of syscall numbers
      target/arm: Remove unused GEN_NEON_INTEGER_OP macro
      target/arm: Allow user-mode code to write CPSR.E via MSR
      linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32

Philippe Mathieu-Daudé (4):
      hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
      hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
      hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
      hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()

Richard Henderson (2):
      target/arm: Use tcg_gen_gvec_mov for clear_vec_high
      target/arm: Use clear_vec_high more effectively

Thomas Huth (1):
      tests/acceptance: Add a test for the canon-a1100 machine

 docs/system/arm/integratorcp.rst           |   4 +-
 docs/system/arm/mps2.rst                   |  29 +++
 docs/system/arm/musca.rst                  |  31 +++
 docs/system/arm/vexpress.rst               |  60 ++++++
 docs/system/target-arm.rst                 |  20 +-
 include/hw/arm/fsl-imx25.h                 |   5 +
 include/hw/arm/fsl-imx31.h                 |   4 +
 include/hw/arm/fsl-imx6.h                  |   2 +-
 include/hw/arm/fsl-imx6ul.h                |   2 +-
 include/hw/arm/fsl-imx7.h                  |  23 ++-
 include/hw/misc/imx2_wdt.h                 |  33 ----
 include/hw/watchdog/wdt_imx2.h             |  90 +++++++++
 target/arm/cpu.h                           |   2 +-
 hw/arm/fsl-imx25.c                         |  10 +
 hw/arm/fsl-imx31.c                         |   6 +
 hw/arm/fsl-imx6.c                          |   9 +
 hw/arm/fsl-imx6ul.c                        |  10 +
 hw/arm/fsl-imx7.c                          |  35 ++++
 hw/arm/integratorcp.c                      |  23 ++-
 hw/arm/pxa2xx_gpio.c                       |   7 +-
 hw/char/xilinx_uartlite.c                  |   5 +-
 hw/display/pxa2xx_lcd.c                    |   8 +-
 hw/dma/pxa2xx_dma.c                        |  14 +-
 hw/gpio/pl061.c                            |  12 +-
 hw/misc/imx2_wdt.c                         |  90 ---------
 hw/timer/exynos4210_mct.c                  |  12 +-
 hw/watchdog/wdt_imx2.c                     | 303 +++++++++++++++++++++++++++++
 linux-user/arm/cpu_loop.c                  | 145 ++++++++------
 linux-user/arm/signal.c                    |  15 +-
 target/arm/translate-a64.c                 |  63 +++---
 target/arm/translate.c                     |  23 ---
 MAINTAINERS                                |   6 +
 hw/arm/Kconfig                             |   5 +
 hw/misc/Makefile.objs                      |   1 -
 hw/watchdog/Kconfig                        |   3 +
 hw/watchdog/Makefile.objs                  |   1 +
 tests/acceptance/machine_arm_canona1100.py |  35 ++++
 37 files changed, 854 insertions(+), 292 deletions(-)
 create mode 100644 docs/system/arm/mps2.rst
 create mode 100644 docs/system/arm/musca.rst
 create mode 100644 docs/system/arm/vexpress.rst
 delete mode 100644 include/hw/misc/imx2_wdt.h
 create mode 100644 include/hw/watchdog/wdt_imx2.h
 delete mode 100644 hw/misc/imx2_wdt.c
 create mode 100644 hw/watchdog/wdt_imx2.c
 create mode 100644 tests/acceptance/machine_arm_canona1100.py


^ permalink raw reply	[flat|nested] 36+ messages in thread

end of thread, other threads:[~2023-05-18 14:52 UTC | newest]

Thread overview: 36+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-15 12:49 [PULL 00/29] target-arm queue Peter Maydell
2022-12-15 12:49 ` [PULL 01/29] hw/arm/virt: Introduce virt_set_high_memmap() helper Peter Maydell
2022-12-15 12:49 ` [PULL 02/29] hw/arm/virt: Rename variable size to region_size in virt_set_high_memmap() Peter Maydell
2022-12-15 12:49 ` [PULL 03/29] hw/arm/virt: Introduce variable region_base " Peter Maydell
2022-12-15 12:49 ` [PULL 04/29] hw/arm/virt: Introduce virt_get_high_memmap_enabled() helper Peter Maydell
2022-12-15 12:49 ` [PULL 05/29] hw/arm/virt: Improve high memory region address assignment Peter Maydell
2022-12-15 12:49 ` [PULL 06/29] hw/arm/virt: Add 'compact-highmem' property Peter Maydell
2022-12-15 12:49 ` [PULL 07/29] hw/arm/virt: Add properties to disable high memory regions Peter Maydell
2022-12-15 12:49 ` [PULL 08/29] hw/arm/virt: build SMBIOS 19 table Peter Maydell
2022-12-15 12:49 ` [PULL 09/29] target/arm: Add Cortex-A55 CPU Peter Maydell
2022-12-15 12:49 ` [PULL 10/29] hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement Peter Maydell
2022-12-15 12:49 ` [PULL 11/29] target/arm: Allow relevant HCR bits to be written for FEAT_EVT Peter Maydell
2022-12-15 12:49 ` [PULL 12/29] target/arm: Implement HCR_EL2.TTLBIS traps Peter Maydell
2022-12-15 12:49 ` [PULL 13/29] target/arm: Implement HCR_EL2.TTLBOS traps Peter Maydell
2022-12-15 12:49 ` [PULL 14/29] target/arm: Implement HCR_EL2.TICAB,TOCU traps Peter Maydell
2022-12-15 12:49 ` [PULL 15/29] target/arm: Implement HCR_EL2.TID4 traps Peter Maydell
2022-12-15 12:49 ` [PULL 16/29] target/arm: Report FEAT_EVT for TCG '-cpu max' Peter Maydell
2022-12-15 12:49 ` [PULL 17/29] hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset Peter Maydell
2022-12-15 12:49 ` [PULL 18/29] hw/arm: Convert TYPE_ARM_SMMUV3 " Peter Maydell
2022-12-15 12:49 ` [PULL 19/29] hw/intc: Convert TYPE_ARM_GIC_COMMON " Peter Maydell
2022-12-15 12:50 ` [PULL 20/29] hw/intc: Convert TYPE_ARM_GIC_KVM " Peter Maydell
2022-12-15 12:50 ` [PULL 21/29] hw/intc: Convert TYPE_ARM_GICV3_COMMON " Peter Maydell
2022-12-15 12:50 ` [PULL 22/29] hw/intc: Convert TYPE_KVM_ARM_GICV3 " Peter Maydell
2022-12-15 12:50 ` [PULL 23/29] hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON " Peter Maydell
2022-12-15 12:50 ` [PULL 24/29] hw/intc: Convert TYPE_ARM_GICV3_ITS " Peter Maydell
2022-12-15 12:50 ` [PULL 25/29] hw/intc: Convert TYPE_KVM_ARM_ITS " Peter Maydell
2022-12-15 12:50 ` [PULL 26/29] hw/arm/boot: set initrd with #address-cells type in fdt Peter Maydell
2022-12-15 12:50 ` [PULL 27/29] target/arm: align exposed ID registers with Linux Peter Maydell
2022-12-15 12:50 ` [PULL 28/29] hw/misc: Move some arm-related files from specific_ss into softmmu_ss Peter Maydell
2022-12-15 12:50 ` [PULL 29/29] target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator Peter Maydell
  -- strict thread matches above, loose matches on Subject: below --
2023-05-18 12:50 [PULL 00/29] target-arm queue Peter Maydell
2023-05-18 14:51 ` Richard Henderson
2020-06-05 16:49 Peter Maydell
2020-06-05 20:10 ` no-reply
2020-06-08 10:04 ` Peter Maydell
2020-05-21 19:15 Peter Maydell

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.