From: Abel Vesa <abel.vesa@linaro.org> To: "Andy Gross" <agross@kernel.org>, "Bjorn Andersson" <andersson@kernel.org>, "Konrad Dybcio" <konrad.dybcio@linaro.org>, "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>, "Rob Herring" <robh@kernel.org>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, "Lorenzo Pieralisi" <lpieralisi@kernel.org>, "vkoul@kernel.org" <vkoul@kernel.org>, "Kishon Vijay Abraham I" <kishon@kernel.org>, "Manivannan Sadhasivam" <mani@kernel.org> Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Subject: [PATCH v4 02/12] phy: qcom-qmp: pcs: Add v6 register offsets Date: Thu, 19 Jan 2023 16:04:43 +0200 [thread overview] Message-ID: <20230119140453.3942340-3-abel.vesa@linaro.org> (raw) In-Reply-To: <20230119140453.3942340-1-abel.vesa@linaro.org> The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new PCS offsets in a dedicated header file. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- This patchset relies on the following patchset: https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/ The v3 of this patchset is: https://lore.kernel.org/all/20230118005328.2378792-1-abel.vesa@linaro.org/ Changes since v3: * added Dmitry's R-b tag Changes since v2: * none Changes since v1: * split all the offsets into separate patches, like Vinod suggested drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 16 ++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp.h | 2 ++ 2 files changed, 18 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h new file mode 100644 index 000000000000..18c4a3abe590 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_PCS_V6_H_ +#define QCOM_PHY_QMP_PCS_V6_H_ + +/* Only for QMP V6 PHY - USB/PCIe PCS registers */ +#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc +#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198 +#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 + +#endif diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h index a63a691b8372..80e3b5c860b6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -38,6 +38,8 @@ #include "phy-qcom-qmp-pcs-v5_20.h" +#include "phy-qcom-qmp-pcs-v6.h" + /* Only for QMP V3 & V4 PHY - DP COM registers */ #define QPHY_V3_DP_COM_PHY_MODE_CTRL 0x00 #define QPHY_V3_DP_COM_SW_RESET 0x04 -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@linaro.org> To: "Andy Gross" <agross@kernel.org>, "Bjorn Andersson" <andersson@kernel.org>, "Konrad Dybcio" <konrad.dybcio@linaro.org>, "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>, "Rob Herring" <robh@kernel.org>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, "Lorenzo Pieralisi" <lpieralisi@kernel.org>, "vkoul@kernel.org" <vkoul@kernel.org>, "Kishon Vijay Abraham I" <kishon@kernel.org>, "Manivannan Sadhasivam" <mani@kernel.org> Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Subject: [PATCH v4 02/12] phy: qcom-qmp: pcs: Add v6 register offsets Date: Thu, 19 Jan 2023 16:04:43 +0200 [thread overview] Message-ID: <20230119140453.3942340-3-abel.vesa@linaro.org> (raw) In-Reply-To: <20230119140453.3942340-1-abel.vesa@linaro.org> The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new PCS offsets in a dedicated header file. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- This patchset relies on the following patchset: https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/ The v3 of this patchset is: https://lore.kernel.org/all/20230118005328.2378792-1-abel.vesa@linaro.org/ Changes since v3: * added Dmitry's R-b tag Changes since v2: * none Changes since v1: * split all the offsets into separate patches, like Vinod suggested drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 16 ++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp.h | 2 ++ 2 files changed, 18 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h new file mode 100644 index 000000000000..18c4a3abe590 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_PCS_V6_H_ +#define QCOM_PHY_QMP_PCS_V6_H_ + +/* Only for QMP V6 PHY - USB/PCIe PCS registers */ +#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc +#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198 +#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 + +#endif diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h index a63a691b8372..80e3b5c860b6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -38,6 +38,8 @@ #include "phy-qcom-qmp-pcs-v5_20.h" +#include "phy-qcom-qmp-pcs-v6.h" + /* Only for QMP V3 & V4 PHY - DP COM registers */ #define QPHY_V3_DP_COM_PHY_MODE_CTRL 0x00 #define QPHY_V3_DP_COM_SW_RESET 0x04 -- 2.34.1 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2023-01-19 14:05 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-19 14:04 [PATCH v4 00/12] sm8550: Add PCIe HC and PHY support Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-19 14:04 ` [PATCH v4 01/12] dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550 Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-22 14:09 ` Krzysztof Kozlowski 2023-01-22 14:09 ` Krzysztof Kozlowski 2023-01-19 14:04 ` Abel Vesa [this message] 2023-01-19 14:04 ` [PATCH v4 02/12] phy: qcom-qmp: pcs: Add v6 register offsets Abel Vesa 2023-01-19 14:04 ` [PATCH v4 03/12] phy: qcom-qmp: pcs: Add v6.20 " Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-19 14:04 ` [PATCH v4 04/12] phy: qcom-qmp: pcs-pcie: Add v6 " Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-19 14:04 ` [PATCH v4 05/12] phy: qcom-qmp: pcs-pcie: Add v6.20 " Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-19 14:04 ` [PATCH v4 06/12] phy: qcom-qmp: qserdes-txrx: " Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-19 14:04 ` [PATCH v4 07/12] phy: qcom-qmp: qserdes-lane-shared: Add v6 " Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-19 14:04 ` [PATCH v4 08/12] phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-23 15:03 ` Johan Hovold 2023-01-23 15:03 ` Johan Hovold 2023-01-23 19:42 ` Abel Vesa 2023-01-23 19:42 ` Abel Vesa 2023-01-19 14:04 ` [PATCH v4 09/12] dt-bindings: PCI: qcom: Add SM8550 compatible Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-22 14:10 ` Krzysztof Kozlowski 2023-01-22 14:10 ` Krzysztof Kozlowski 2023-01-23 10:44 ` Abel Vesa 2023-01-23 10:44 ` Abel Vesa 2023-01-23 11:03 ` Krzysztof Kozlowski 2023-01-23 11:03 ` Krzysztof Kozlowski 2023-01-19 14:04 ` [PATCH v4 10/12] PCI: qcom: Add SM8550 PCIe support Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-19 14:21 ` Manivannan Sadhasivam 2023-01-19 14:21 ` Manivannan Sadhasivam 2023-01-19 15:35 ` Abel Vesa 2023-01-19 15:35 ` Abel Vesa 2023-01-23 8:27 ` Johan Hovold 2023-01-23 8:27 ` Johan Hovold 2023-01-19 14:04 ` [PATCH v4 11/12] arm64: dts: qcom: sm8550: Add PCIe PHYs and controllers nodes Abel Vesa 2023-01-19 14:04 ` Abel Vesa 2023-01-23 8:51 ` Johan Hovold 2023-01-23 8:51 ` Johan Hovold 2023-01-23 12:39 ` Abel Vesa 2023-01-23 12:39 ` Abel Vesa 2023-01-23 13:11 ` Abel Vesa 2023-01-23 13:11 ` Abel Vesa 2023-01-23 14:17 ` Johan Hovold 2023-01-23 14:17 ` Johan Hovold 2023-01-23 14:16 ` Johan Hovold 2023-01-23 14:16 ` Johan Hovold 2023-01-23 14:24 ` Johan Hovold 2023-01-23 14:24 ` Johan Hovold 2023-01-19 14:04 ` [PATCH v4 12/12] arm64: dts: qcom: sm8550-mtp: " Abel Vesa 2023-01-19 14:04 ` Abel Vesa
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