From: Jonathan Cameron <Jonathan.Cameron@Huawei.com> To: Sascha Hauer <s.hauer@pengutronix.de> Cc: <linux-rockchip@lists.infradead.org>, <linux-arm-kernel@lists.infradead.org>, Heiko Stuebner <heiko@sntech.de>, Kyungmin Park <kyungmin.park@samsung.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>, <kernel@pengutronix.de>, Michael Riesch <michael.riesch@wolfvision.net> Subject: Re: [PATCH v4 09/21] PM / devfreq: rockchip-dfi: Clean up DDR type register defines Date: Tue, 16 May 2023 17:01:46 +0100 [thread overview] Message-ID: <20230516170146.00000541@Huawei.com> (raw) In-Reply-To: <20230505113856.463650-10-s.hauer@pengutronix.de> On Fri, 5 May 2023 13:38:44 +0200 Sascha Hauer <s.hauer@pengutronix.de> wrote: > Use the HIWORD_UPDATE() define known from other rockchip drivers to > make the defines look less odd to the readers who've seen other > rockchip drivers. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Whilst this might be fine, it's not a noop change. So more text needed to explain why it's fine to write the same 'mask' always when previously only single bits were set in the mask. > --- > drivers/devfreq/event/rockchip-dfi.c | 32 +++++++++++++++++----------- > 1 file changed, 20 insertions(+), 12 deletions(-) > > diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c > index 7896cd8beb143..035984d3c7b01 100644 > --- a/drivers/devfreq/event/rockchip-dfi.c > +++ b/drivers/devfreq/event/rockchip-dfi.c > @@ -26,15 +26,19 @@ > > #define DMC_MAX_CHANNELS 2 > > +#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16) > + > /* DDRMON_CTRL */ > #define DDRMON_CTRL 0x04 > -#define CLR_DDRMON_CTRL (0x1f0000 << 0) > -#define LPDDR4_EN (0x10001 << 4) > -#define HARDWARE_EN (0x10001 << 3) > -#define LPDDR3_EN (0x10001 << 2) > -#define SOFTWARE_EN (0x10001 << 1) > -#define SOFTWARE_DIS (0x10000 << 1) > -#define TIME_CNT_EN (0x10001 << 0) > +#define DDRMON_CTRL_DDR4 BIT(5) > +#define DDRMON_CTRL_LPDDR4 BIT(4) > +#define DDRMON_CTRL_HARDWARE_EN BIT(3) > +#define DDRMON_CTRL_LPDDR23 BIT(2) > +#define DDRMON_CTRL_SOFTWARE_EN BIT(1) > +#define DDRMON_CTRL_TIMER_CNT_EN BIT(0) > +#define DDRMON_CTRL_DDR_TYPE_MASK (DDRMON_CTRL_DDR4 | \ > + DDRMON_CTRL_LPDDR4 | \ > + DDRMON_CTRL_LPDDR23) > > #define DDRMON_CH0_COUNT_NUM 0x28 > #define DDRMON_CH0_DFI_ACCESS_NUM 0x2c > @@ -74,16 +78,19 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) > void __iomem *dfi_regs = dfi->regs; > > /* clear DDRMON_CTRL setting */ > - writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL); > + writel_relaxed(HIWORD_UPDATE(0, 0xffff), dfi_regs + DDRMON_CTRL); > > /* set ddr type to dfi */ > if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3) > - writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL); > + writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23, DDRMON_CTRL_DDR_TYPE_MASK), > + dfi_regs + DDRMON_CTRL); > else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4) > - writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL); Old value written is 0x10001 << 4 == 0x100010 > + writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK), > + dfi_regs + DDRMON_CTRL); New value is (BIT(5) | BIT(4) | BIT(2)) | (BIT(4) << 16) 0x100034 > _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <Jonathan.Cameron@Huawei.com> To: Sascha Hauer <s.hauer@pengutronix.de> Cc: <linux-rockchip@lists.infradead.org>, <linux-arm-kernel@lists.infradead.org>, Heiko Stuebner <heiko@sntech.de>, Kyungmin Park <kyungmin.park@samsung.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>, <kernel@pengutronix.de>, Michael Riesch <michael.riesch@wolfvision.net> Subject: Re: [PATCH v4 09/21] PM / devfreq: rockchip-dfi: Clean up DDR type register defines Date: Tue, 16 May 2023 17:01:46 +0100 [thread overview] Message-ID: <20230516170146.00000541@Huawei.com> (raw) In-Reply-To: <20230505113856.463650-10-s.hauer@pengutronix.de> On Fri, 5 May 2023 13:38:44 +0200 Sascha Hauer <s.hauer@pengutronix.de> wrote: > Use the HIWORD_UPDATE() define known from other rockchip drivers to > make the defines look less odd to the readers who've seen other > rockchip drivers. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Whilst this might be fine, it's not a noop change. So more text needed to explain why it's fine to write the same 'mask' always when previously only single bits were set in the mask. > --- > drivers/devfreq/event/rockchip-dfi.c | 32 +++++++++++++++++----------- > 1 file changed, 20 insertions(+), 12 deletions(-) > > diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c > index 7896cd8beb143..035984d3c7b01 100644 > --- a/drivers/devfreq/event/rockchip-dfi.c > +++ b/drivers/devfreq/event/rockchip-dfi.c > @@ -26,15 +26,19 @@ > > #define DMC_MAX_CHANNELS 2 > > +#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16) > + > /* DDRMON_CTRL */ > #define DDRMON_CTRL 0x04 > -#define CLR_DDRMON_CTRL (0x1f0000 << 0) > -#define LPDDR4_EN (0x10001 << 4) > -#define HARDWARE_EN (0x10001 << 3) > -#define LPDDR3_EN (0x10001 << 2) > -#define SOFTWARE_EN (0x10001 << 1) > -#define SOFTWARE_DIS (0x10000 << 1) > -#define TIME_CNT_EN (0x10001 << 0) > +#define DDRMON_CTRL_DDR4 BIT(5) > +#define DDRMON_CTRL_LPDDR4 BIT(4) > +#define DDRMON_CTRL_HARDWARE_EN BIT(3) > +#define DDRMON_CTRL_LPDDR23 BIT(2) > +#define DDRMON_CTRL_SOFTWARE_EN BIT(1) > +#define DDRMON_CTRL_TIMER_CNT_EN BIT(0) > +#define DDRMON_CTRL_DDR_TYPE_MASK (DDRMON_CTRL_DDR4 | \ > + DDRMON_CTRL_LPDDR4 | \ > + DDRMON_CTRL_LPDDR23) > > #define DDRMON_CH0_COUNT_NUM 0x28 > #define DDRMON_CH0_DFI_ACCESS_NUM 0x2c > @@ -74,16 +78,19 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) > void __iomem *dfi_regs = dfi->regs; > > /* clear DDRMON_CTRL setting */ > - writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL); > + writel_relaxed(HIWORD_UPDATE(0, 0xffff), dfi_regs + DDRMON_CTRL); > > /* set ddr type to dfi */ > if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3) > - writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL); > + writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23, DDRMON_CTRL_DDR_TYPE_MASK), > + dfi_regs + DDRMON_CTRL); > else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4) > - writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL); Old value written is 0x10001 << 4 == 0x100010 > + writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK), > + dfi_regs + DDRMON_CTRL); New value is (BIT(5) | BIT(4) | BIT(2)) | (BIT(4) << 16) 0x100034 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-05-16 16:02 UTC|newest] Thread overview: 121+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-05-05 11:38 [PATCH v4 00/21] Add perf support to the rockchip-dfi driver Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 01/21] PM / devfreq: rockchip-dfi: Embed desc into private data struct Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-07 10:08 ` Heiko Stübner 2023-05-07 10:08 ` Heiko Stübner 2023-05-16 15:12 ` Jonathan Cameron 2023-05-16 15:12 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 02/21] PM / devfreq: rockchip-dfi: use consistent name for " Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-07 10:22 ` Heiko Stübner 2023-05-07 10:22 ` Heiko Stübner 2023-05-16 15:27 ` Jonathan Cameron 2023-05-16 15:27 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 03/21] PM / devfreq: rockchip-dfi: Make pmu regmap mandatory Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:33 ` Jonathan Cameron 2023-05-16 15:33 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 04/21] PM / devfreq: rockchip-dfi: Add SoC specific init function Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:40 ` Jonathan Cameron 2023-05-16 15:40 ` Jonathan Cameron 2023-05-17 9:20 ` Sascha Hauer 2023-05-17 9:20 ` Sascha Hauer 2023-05-17 10:19 ` Jonathan Cameron 2023-05-17 10:19 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 05/21] PM / devfreq: rockchip-dfi: dfi store raw values in counter struct Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:43 ` Jonathan Cameron 2023-05-16 15:43 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 06/21] PM / devfreq: rockchip-dfi: Use free running counter Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:48 ` Jonathan Cameron 2023-05-16 15:48 ` Jonathan Cameron 2023-05-17 9:29 ` Sascha Hauer 2023-05-17 9:29 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 07/21] PM / devfreq: rockchip-dfi: introduce channel mask Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:50 ` Jonathan Cameron 2023-05-16 15:50 ` Jonathan Cameron 2023-05-17 9:33 ` Sascha Hauer 2023-05-17 9:33 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 08/21] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:54 ` Jonathan Cameron 2023-05-16 15:54 ` Jonathan Cameron 2023-05-17 10:51 ` Sascha Hauer 2023-05-17 10:51 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 09/21] PM / devfreq: rockchip-dfi: Clean up DDR type register defines Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:01 ` Jonathan Cameron [this message] 2023-05-16 16:01 ` Jonathan Cameron 2023-05-17 11:11 ` Sascha Hauer 2023-05-17 11:11 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 10/21] PM / devfreq: rockchip-dfi: Add RK3568 support Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:04 ` Jonathan Cameron 2023-05-16 16:04 ` Jonathan Cameron 2023-05-17 11:38 ` Sascha Hauer 2023-05-17 11:38 ` Sascha Hauer 2023-05-17 14:46 ` Jonathan Cameron 2023-05-17 14:46 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 11/21] PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:06 ` Jonathan Cameron 2023-05-16 16:06 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 12/21] PM / devfreq: rockchip-dfi: Handle LPDDR4X Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:09 ` Jonathan Cameron 2023-05-16 16:09 ` Jonathan Cameron 2023-05-19 6:14 ` Sascha Hauer 2023-05-19 6:14 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 13/21] PM / devfreq: rockchip-dfi: Pass private data struct to internal functions Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:10 ` Jonathan Cameron 2023-05-16 16:10 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 14/21] PM / devfreq: rockchip-dfi: Prepare for multiple users Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:16 ` Jonathan Cameron 2023-05-16 16:16 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 15/21] PM / devfreq: rockchip-dfi: Add perf support Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-09 20:04 ` Robin Murphy 2023-05-10 19:56 ` Sascha Hauer 2023-05-16 15:39 ` Sascha Hauer 2023-05-16 15:39 ` Sascha Hauer 2023-05-16 15:27 ` Sascha Hauer 2023-05-16 15:27 ` Sascha Hauer 2023-05-17 10:53 ` Jonathan Cameron 2023-05-17 10:53 ` Jonathan Cameron 2023-05-17 14:26 ` Sascha Hauer 2023-05-17 14:26 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 16/21] PM / devfreq: rockchip-dfi: make register stride SoC specific Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:18 ` Jonathan Cameron 2023-05-16 16:18 ` Jonathan Cameron 2023-05-19 6:45 ` Sascha Hauer 2023-05-19 6:45 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 17/21] PM / devfreq: rockchip-dfi: account for multiple DDRMON_CTRL registers Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-17 10:23 ` Jonathan Cameron 2023-05-17 10:23 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 18/21] PM / devfreq: rockchip-dfi: add support for RK3588 Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-17 10:24 ` Jonathan Cameron 2023-05-17 10:24 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 19/21] arm64: dts: rockchip: rk3399: Enable DFI Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 20/21] arm64: dts: rockchip: rk356x: Add DFI Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 21/21] dt-bindings: devfreq: event: convert Rockchip DFI binding to yaml Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-05 16:29 ` Krzysztof Kozlowski 2023-05-05 16:29 ` Krzysztof Kozlowski 2023-05-05 16:31 ` Krzysztof Kozlowski 2023-05-05 16:31 ` Krzysztof Kozlowski 2023-05-09 9:37 ` Sascha Hauer 2023-05-09 9:40 ` Krzysztof Kozlowski 2023-05-09 10:02 ` Sascha Hauer 2023-05-05 16:38 ` [PATCH v4 00/21] Add perf support to the rockchip-dfi driver Vincent Legoll 2023-05-05 16:38 ` Vincent Legoll
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