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From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Conor Dooley <conor+dt@kernel.org>
Cc: Atish Patra <atishp@atishpatra.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Saravana Kannan <saravanak@google.com>,
	Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v6 04/14] irqchip/sifive-plic: Use platform driver probing for PLIC
Date: Wed, 19 Jul 2023 17:05:32 +0530	[thread overview]
Message-ID: <20230719113542.2293295-5-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230719113542.2293295-1-apatel@ventanamicro.com>

The PLIC driver does not require very early initialization so let us
replace use of IRQCHIP_DECLARE() with IRQCHIP_PLATFORM_DRIVER_xyz()
so that PLIC is probed through platform driver probing.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 drivers/irqchip/irq-sifive-plic.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 56b0544b1f27..dc02f0761ced 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -569,8 +569,10 @@ static int __init plic_init(struct device_node *node,
 	return __plic_init(node, parent, 0);
 }
 
-IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);
-IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */
+IRQCHIP_PLATFORM_DRIVER_BEGIN(sifive_plic)
+IRQCHIP_MATCH("sifive,plic-1.0.0", plic_init)
+IRQCHIP_MATCH("riscv,plic0", plic_init) /* for legacy systems */
+IRQCHIP_PLATFORM_DRIVER_END(sifive_plic)
 
 static int __init plic_edge_init(struct device_node *node,
 				 struct device_node *parent)
@@ -578,5 +580,7 @@ static int __init plic_edge_init(struct device_node *node,
 	return __plic_init(node, parent, BIT(PLIC_QUIRK_EDGE_INTERRUPT));
 }
 
-IRQCHIP_DECLARE(andestech_nceplic100, "andestech,nceplic100", plic_edge_init);
-IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_edge_init);
+IRQCHIP_PLATFORM_DRIVER_BEGIN(edge_plic)
+IRQCHIP_MATCH("andestech,nceplic100", plic_edge_init)
+IRQCHIP_MATCH("thead,c900-plic", plic_edge_init)
+IRQCHIP_PLATFORM_DRIVER_END(edge_plic)
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Conor Dooley <conor+dt@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
	devicetree@vger.kernel.org,
	Saravana Kannan <saravanak@google.com>,
	Anup Patel <anup@brainfault.org>,
	linux-kernel@vger.kernel.org, Atish Patra <atishp@atishpatra.org>,
	linux-riscv@lists.infradead.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH v6 04/14] irqchip/sifive-plic: Use platform driver probing for PLIC
Date: Wed, 19 Jul 2023 17:05:32 +0530	[thread overview]
Message-ID: <20230719113542.2293295-5-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230719113542.2293295-1-apatel@ventanamicro.com>

The PLIC driver does not require very early initialization so let us
replace use of IRQCHIP_DECLARE() with IRQCHIP_PLATFORM_DRIVER_xyz()
so that PLIC is probed through platform driver probing.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 drivers/irqchip/irq-sifive-plic.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 56b0544b1f27..dc02f0761ced 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -569,8 +569,10 @@ static int __init plic_init(struct device_node *node,
 	return __plic_init(node, parent, 0);
 }
 
-IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);
-IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */
+IRQCHIP_PLATFORM_DRIVER_BEGIN(sifive_plic)
+IRQCHIP_MATCH("sifive,plic-1.0.0", plic_init)
+IRQCHIP_MATCH("riscv,plic0", plic_init) /* for legacy systems */
+IRQCHIP_PLATFORM_DRIVER_END(sifive_plic)
 
 static int __init plic_edge_init(struct device_node *node,
 				 struct device_node *parent)
@@ -578,5 +580,7 @@ static int __init plic_edge_init(struct device_node *node,
 	return __plic_init(node, parent, BIT(PLIC_QUIRK_EDGE_INTERRUPT));
 }
 
-IRQCHIP_DECLARE(andestech_nceplic100, "andestech,nceplic100", plic_edge_init);
-IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_edge_init);
+IRQCHIP_PLATFORM_DRIVER_BEGIN(edge_plic)
+IRQCHIP_MATCH("andestech,nceplic100", plic_edge_init)
+IRQCHIP_MATCH("thead,c900-plic", plic_edge_init)
+IRQCHIP_PLATFORM_DRIVER_END(edge_plic)
-- 
2.34.1


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  parent reply	other threads:[~2023-07-19 11:36 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-19 11:35 [PATCH v6 00/14] Linux RISC-V AIA Support Anup Patel
2023-07-19 11:35 ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 01/14] RISC-V: Add riscv_get_intc_hartid() function Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 02/14] of: property: Add fw_devlink support for msi-parent Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 22:25   ` Saravana Kannan
2023-07-19 22:25     ` Saravana Kannan
2023-07-20  5:21     ` Anup Patel
2023-07-20  5:21       ` Anup Patel
2023-07-19 22:37   ` Rob Herring
2023-07-19 22:37     ` Rob Herring
2023-07-20 11:55     ` Anup Patel
2023-07-20 11:55       ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 03/14] drivers: irqchip/riscv-intc: Mark all INTC nodes as initialized Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 22:14   ` Saravana Kannan
2023-07-19 22:14     ` Saravana Kannan
2023-07-20  5:21     ` Anup Patel
2023-07-20  5:21       ` Anup Patel
2023-07-19 11:35 ` Anup Patel [this message]
2023-07-19 11:35   ` [PATCH v6 04/14] irqchip/sifive-plic: Use platform driver probing for PLIC Anup Patel
2023-07-27  8:41   ` Sunil V L
2023-07-27  8:41     ` Sunil V L
2023-08-02 12:25     ` Anup Patel
2023-08-02 12:25       ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 05/14] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 06/14] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 07/14] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 08/14] irqchip/riscv-imsic: Add support for platform MSI irqdomain Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 09/14] irqchip/riscv-imsic: Add support for PCI " Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 10/14] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 11/14] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 12/14] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 13/14] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-07-19 11:35   ` Anup Patel
2023-07-19 11:35 ` [PATCH v6 14/14] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2023-07-19 11:35   ` Anup Patel

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