All of lore.kernel.org
 help / color / mirror / Atom feed
From: Wayne Lin <Wayne.Lin@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Harry.Wentland@amd.com>, <Sunpeng.Li@amd.com>,
	<Rodrigo.Siqueira@amd.com>, <Aurabindo.Pillai@amd.com>,
	<roman.li@amd.com>, <wayne.lin@amd.com>,
	<agustin.gutierrez@amd.com>, <chiahsuan.chung@amd.com>,
	<hersenxs.wu@amd.com>, <jerry.zuo@amd.com>,
	Alex Hung <alex.hung@amd.com>
Subject: [PATCH 05/43] drm/amd/display: Correct indentations and spaces
Date: Tue, 12 Mar 2024 17:19:58 +0800	[thread overview]
Message-ID: <20240312092036.3283319-6-Wayne.Lin@amd.com> (raw)
In-Reply-To: <20240312092036.3283319-1-Wayne.Lin@amd.com>

From: Alex Hung <alex.hung@amd.com>

[Why & How]
This fixes indentations and adjust spaces for better readability and
code styles.

Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
---
 .../gpu/drm/amd/display/dc/bios/bios_parser.c |  1 +
 .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c  | 15 ++++---
 .../display/dc/clk_mgr/dcn314/dcn314_smu.h    | 42 +++++++++----------
 .../gpu/drm/amd/display/dc/core/dc_resource.c |  3 +-
 drivers/gpu/drm/amd/display/dc/core/dc_stat.c |  2 +-
 5 files changed, 32 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index 6450853fea94..645a8991a830 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -1731,6 +1731,7 @@ static uint32_t get_ss_entry_number_from_internal_ss_info_tbl_v2_1(
 
 	return 0;
 }
+
 /**
  * get_ss_entry_number_from_internal_ss_info_tbl_V3_1
  * Get Number of SpreadSpectrum Entry from the ASIC_InternalSS_Info table of
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
index 9f0f25aee426..c1a5908b97c8 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
@@ -329,15 +329,14 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
 	}
 		break;
 	case AMDGPU_FAMILY_GC_11_0_0: {
-	    struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL);
-
-	    if (clk_mgr == NULL) {
-		BREAK_TO_DEBUGGER();
-		return NULL;
-	    }
+		struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL);
 
-	    dcn32_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
-	    return &clk_mgr->base;
+		if (clk_mgr == NULL) {
+			BREAK_TO_DEBUGGER();
+			return NULL;
+		}
+		dcn32_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
+		return &clk_mgr->base;
 	}
 
 	case AMDGPU_FAMILY_GC_11_0_1: {
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h
index 047d19ea919c..78ca1e5c5e9e 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h
@@ -37,34 +37,34 @@ typedef enum {
 } WCK_RATIO_e;
 
 typedef struct {
-  uint32_t FClk;
-  uint32_t MemClk;
-  uint32_t Voltage;
-  uint8_t  WckRatio;
-  uint8_t  Spare[3];
+	uint32_t FClk;
+	uint32_t MemClk;
+	uint32_t Voltage;
+	uint8_t  WckRatio;
+	uint8_t  Spare[3];
 } DfPstateTable314_t;
 
 //Freq in MHz
 //Voltage in milli volts with 2 fractional bits
 typedef struct {
-  uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
-  uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
-  uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
-  uint32_t SocClocks[NUM_SOCCLK_DPM_LEVELS];
-  uint32_t VClocks[NUM_VCN_DPM_LEVELS];
-  uint32_t DClocks[NUM_VCN_DPM_LEVELS];
-  uint32_t SocVoltage[NUM_SOC_VOLTAGE_LEVELS];
-  DfPstateTable314_t DfPstateTable[NUM_DF_PSTATE_LEVELS];
+	uint32_t DcfClocks[NUM_DCFCLK_DPM_LEVELS];
+	uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
+	uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
+	uint32_t SocClocks[NUM_SOCCLK_DPM_LEVELS];
+	uint32_t VClocks[NUM_VCN_DPM_LEVELS];
+	uint32_t DClocks[NUM_VCN_DPM_LEVELS];
+	uint32_t SocVoltage[NUM_SOC_VOLTAGE_LEVELS];
+	DfPstateTable314_t DfPstateTable[NUM_DF_PSTATE_LEVELS];
 
-  uint8_t  NumDcfClkLevelsEnabled;
-  uint8_t  NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk
-  uint8_t  NumSocClkLevelsEnabled;
-  uint8_t  VcnClkLevelsEnabled;     //Applies to both Vclk and Dclk
-  uint8_t  NumDfPstatesEnabled;
-  uint8_t  spare[3];
+	uint8_t  NumDcfClkLevelsEnabled;
+	uint8_t  NumDispClkLevelsEnabled; //Applies to both Dispclk and Dppclk
+	uint8_t  NumSocClkLevelsEnabled;
+	uint8_t  VcnClkLevelsEnabled;     //Applies to both Vclk and Dclk
+	uint8_t  NumDfPstatesEnabled;
+	uint8_t  spare[3];
 
-  uint32_t MinGfxClk;
-  uint32_t MaxGfxClk;
+	uint32_t MinGfxClk;
+	uint32_t MaxGfxClk;
 } DpmClocks314_t;
 
 struct dcn314_watermarks {
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 798e6f7fa4e3..945ee57f1721 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -340,7 +340,7 @@ struct resource_pool *dc_create_resource_pool(struct dc  *dc,
 	return res_pool;
 }
 
-void dc_destroy_resource_pool(struct dc  *dc)
+void dc_destroy_resource_pool(struct dc *dc)
 {
 	if (dc) {
 		if (dc->res_pool)
@@ -1522,6 +1522,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
 	struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;
 	const struct rect odm_slice_rec = calculate_odm_slice_in_timing_active(pipe_ctx);
 	bool res = false;
+
 	DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
 
 	/* Invalid input */
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stat.c b/drivers/gpu/drm/amd/display/dc/core/dc_stat.c
index 5f6392ae31a6..cd6570a1e20e 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stat.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stat.c
@@ -61,7 +61,7 @@ void dc_stat_get_dmub_notification(const struct dc *dc, struct dmub_notification
 	/* For HPD/HPD RX, convert dpia port index into link index */
 	if (notify->type == DMUB_NOTIFICATION_HPD ||
 	    notify->type == DMUB_NOTIFICATION_HPD_IRQ ||
-		notify->type == DMUB_NOTIFICATION_DPIA_NOTIFICATION ||
+	    notify->type == DMUB_NOTIFICATION_DPIA_NOTIFICATION ||
 	    notify->type == DMUB_NOTIFICATION_SET_CONFIG_REPLY) {
 		notify->link_index =
 			get_link_index_from_dpia_port_index(dc, notify->link_index);
-- 
2.37.3


  parent reply	other threads:[~2024-03-12  9:21 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-12  9:19 [PATCH 00/43] DC Patches March 18, 2024 Wayne Lin
2024-03-12  9:19 ` [PATCH 01/43] drm/amd/display: Remove code duplication Wayne Lin
2024-03-12  9:19 ` [PATCH 02/43] drm/amd/display: Remove wrong signal from vrr calculation Wayne Lin
2024-03-12  9:19 ` [PATCH 03/43] drm/amd/display: Enable 2to1 ODM policy for DCN35 Wayne Lin
2024-03-12 10:20   ` Christian König
2024-03-13  6:35     ` Lin, Wayne
2024-03-12  9:19 ` [PATCH 04/43] drm/amd/display: Delete duplicated function prototypes Wayne Lin
2024-03-12  9:19 ` Wayne Lin [this message]
2024-03-12  9:19 ` [PATCH 06/43] drm/amd/display: Add the MALL size in the fallback function Wayne Lin
2024-03-12  9:20 ` [PATCH 07/43] drm/amd/display: Move define to the proper header Wayne Lin
2024-03-12  9:20 ` [PATCH 08/43] drm/amd/display: Enable fast update for DCN314 Wayne Lin
2024-03-12  9:20 ` [PATCH 09/43] drm/amd/display: Remove legacy code Wayne Lin
2024-03-12  9:20 ` [PATCH 10/43] drm/amd/display: correct hostvm flag Wayne Lin
2024-03-12  9:20 ` [PATCH 11/43] drm/amd/display: Comments adjustments Wayne Lin
2024-03-12  9:20 ` [PATCH 12/43] drm/amd/display: Add missing registers and offset Wayne Lin
2024-03-12  9:20 ` [PATCH 13/43] drm/amd/display: Fix noise issue on HDMI AV mute Wayne Lin
2024-03-12  9:20 ` [PATCH 14/43] drm/amd/display: skip forcing odm in minimal transition Wayne Lin
2024-03-12  9:20 ` [PATCH 15/43] drm/amd/display: revert Exit idle optimizations before HDCP execution Wayne Lin
2024-03-12  9:20 ` [PATCH 16/43] drm/amd/display: Add debug option for idle reg checks Wayne Lin
2024-03-12  9:20 ` [PATCH 17/43] drm/amd/display: Revert Add left edge pixel + ODM pipe split Wayne Lin
2024-03-12  9:20 ` [PATCH 18/43] drm/amd/display: To adjust dprefclk by down spread percentage Wayne Lin
2024-03-12  9:20 ` [PATCH 19/43] drm/amd/display: Enabling urgent latency adjustment for DCN35 Wayne Lin
2024-03-12  9:20 ` [PATCH 20/43] drm/amd/display: Revert "Set the power_down_on_boot function pointer to null" Wayne Lin
2024-03-12  9:20 ` [PATCH 21/43] drm/amd/display: add stream clock source to DP DTO params Wayne Lin
2024-03-12  9:20 ` [PATCH 22/43] drm/amd/display: Program pixclk according to dcn revision Wayne Lin
2024-03-12  9:20 ` [PATCH 23/43] drm/amd/display: clear mpc_tree in init_pipes Wayne Lin
2024-03-12  9:20 ` [PATCH 24/43] drm/amd/display: [FW Promotion] Release 0.0.208.0 Wayne Lin
2024-03-12  9:20 ` [PATCH 25/43] drm/amd/display: 3.2.276 Wayne Lin
2024-03-12  9:20 ` [PATCH 26/43] drm/amd/display: Workaround register access in idle race with cursor Wayne Lin
2024-03-12  9:20 ` [PATCH 27/43] drm/amd/display: Revert Remove pixle rate limit for subvp Wayne Lin
2024-03-12  9:20 ` [PATCH 28/43] drm/amd/display: fix debug key not working on dml2 Wayne Lin
2024-03-12  9:20 ` [PATCH 29/43] drm/amd/display: Power on VPG memory unconditionally if off Wayne Lin
2024-03-12  9:20 ` [PATCH 30/43] drm/amd/display: Added debug prints for zstate_support and StutterPeriod Wayne Lin
2024-03-12  9:20 ` [PATCH 31/43] drm/amd/display: change aux_init to apu version Wayne Lin
2024-03-12  9:20 ` [PATCH 32/43] drm/amd/display: Increase Z8 watermark times Wayne Lin
2024-03-12  9:20 ` [PATCH 33/43] drm/amd/display: Prevent crash on bring-up Wayne Lin
2024-03-13 14:40   ` Pillai, Aurabindo
2024-03-12  9:20 ` [PATCH 34/43] drm/amd/display: increase bb clock for DCN351 Wayne Lin
2024-03-12  9:20 ` [PATCH 35/43] drm/amd/display: Detect and disallow idle reallow during reentrancy Wayne Lin
2024-03-12  9:20 ` [PATCH 36/43] drm/amd/display: Add optional optimization for IPS handshake Wayne Lin
2024-03-12  9:20 ` [PATCH 37/43] drm/amd/display: Enable optimized handshake for DCN35 Wayne Lin
2024-03-12  9:20 ` [PATCH 38/43] drm/amd/display: Remove unnecessary hard coded DPM states Wayne Lin
2024-03-12  9:20 ` [PATCH 39/43] drm/amd/display: Enable new interface design for alternate scrambling Wayne Lin
2024-03-12  9:20 ` [PATCH 40/43] drm/amd/display: Enable reallow for idle on DCN35 Wayne Lin
2024-03-12  9:20 ` [PATCH 41/43] drm/amd/display: fix a bug to dereference already freed old current state memory Wayne Lin
2024-03-12  9:20 ` [PATCH 42/43] drm/amd/display: Add TB_BORROWED_MAX definition Wayne Lin
2024-03-12  9:20 ` [PATCH 43/43] drm/amd/display: 3.2.277 Wayne Lin
2024-03-18 13:54 ` [PATCH 00/43] DC Patches March 18, 2024 Wheeler, Daniel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240312092036.3283319-6-Wayne.Lin@amd.com \
    --to=wayne.lin@amd.com \
    --cc=Aurabindo.Pillai@amd.com \
    --cc=Harry.Wentland@amd.com \
    --cc=Rodrigo.Siqueira@amd.com \
    --cc=Sunpeng.Li@amd.com \
    --cc=agustin.gutierrez@amd.com \
    --cc=alex.hung@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=chiahsuan.chung@amd.com \
    --cc=hersenxs.wu@amd.com \
    --cc=jerry.zuo@amd.com \
    --cc=roman.li@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.