* [U-Boot] [PATCH] arm: zynq: Label whole PL part as fpga_full region
@ 2017-06-29 10:14 Michal Simek
2017-06-29 17:38 ` Moritz Fischer
0 siblings, 1 reply; 3+ messages in thread
From: Michal Simek @ 2017-06-29 10:14 UTC (permalink / raw)
To: u-boot
This will simplify dt overlay structure for the whole PL.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/dts/zynq-7000.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 34fc6e5f8936..f993e19ef280 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -38,6 +38,14 @@
};
};
+ fpga_full: fpga-full {
+ compatible = "fpga-region";
+ fpga-mgr = <&devcfg>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+
pmu at f8891000 {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 5 4>, <0 6 4>;
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* [U-Boot] [PATCH] arm: zynq: Label whole PL part as fpga_full region
2017-06-29 10:14 [U-Boot] [PATCH] arm: zynq: Label whole PL part as fpga_full region Michal Simek
@ 2017-06-29 17:38 ` Moritz Fischer
2017-07-10 7:33 ` Michal Simek
0 siblings, 1 reply; 3+ messages in thread
From: Moritz Fischer @ 2017-06-29 17:38 UTC (permalink / raw)
To: u-boot
Hi Michal,
can you / did you send this to the kernel ML, too?
On Thu, Jun 29, 2017 at 3:14 AM, Michal Simek <michal.simek@xilinx.com> wrote:
> This will simplify dt overlay structure for the whole PL.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
> ---
>
> arch/arm/dts/zynq-7000.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
> index 34fc6e5f8936..f993e19ef280 100644
> --- a/arch/arm/dts/zynq-7000.dtsi
> +++ b/arch/arm/dts/zynq-7000.dtsi
> @@ -38,6 +38,14 @@
> };
> };
>
> + fpga_full: fpga-full {
> + compatible = "fpga-region";
> + fpga-mgr = <&devcfg>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + };
> +
> pmu at f8891000 {
> compatible = "arm,cortex-a9-pmu";
> interrupts = <0 5 4>, <0 6 4>;
> --
> 1.9.1
>
Thanks,
Moritz
^ permalink raw reply [flat|nested] 3+ messages in thread* [U-Boot] [PATCH] arm: zynq: Label whole PL part as fpga_full region
2017-06-29 17:38 ` Moritz Fischer
@ 2017-07-10 7:33 ` Michal Simek
0 siblings, 0 replies; 3+ messages in thread
From: Michal Simek @ 2017-07-10 7:33 UTC (permalink / raw)
To: u-boot
On 29.6.2017 19:38, Moritz Fischer wrote:
> Hi Michal,
>
> can you / did you send this to the kernel ML, too?
We need to send fpga manager driver first but yes we will do it.
>
> On Thu, Jun 29, 2017 at 3:14 AM, Michal Simek <michal.simek@xilinx.com> wrote:
>> This will simplify dt overlay structure for the whole PL.
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Thanks,
Michal
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2017-07-10 7:33 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2017-06-29 10:14 [U-Boot] [PATCH] arm: zynq: Label whole PL part as fpga_full region Michal Simek
2017-06-29 17:38 ` Moritz Fischer
2017-07-10 7:33 ` Michal Simek
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