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From: Jan Beulich <jbeulich@suse.com>
To: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Gianluca Guida <gianluca@rivosinc.com>,
	Bob Eshleman <bobbyeshleman@gmail.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Connor Davis <connojdavis@gmail.com>,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 2/3] xen/riscv: initialize .bss section
Date: Thu, 2 Mar 2023 15:22:21 +0100	[thread overview]
Message-ID: <270118d9-0a7c-82c5-aaa8-437644017af4@suse.com> (raw)
In-Reply-To: <495bd1d7fc2becdd48bd00253c079971e2231e99.1677762812.git.oleksii.kurochko@gmail.com>

On 02.03.2023 14:23, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/riscv64/head.S
> +++ b/xen/arch/riscv/riscv64/head.S
> @@ -13,6 +13,15 @@ ENTRY(start)
>          lla     a6, _dtb_base
>          REG_S   a1, (a6)
>  
> +        la      a3, __bss_start
> +        la      a4, __bss_end
> +        ble     a4, a3, clear_bss_done

While it may be that .bss is indeed empty right now, even short term
it won't be, and never will. I'd drop this conditional (and in
particular the label), inserting a transient item into .bss for the
time being. As soon as your patch introducing page tables has landed,
there will be multiple pages worth of .bss.

Also are this and ...

> +clear_bss:
> +        REG_S   zero, (a3)
> +        add     a3, a3, RISCV_SZPTR
> +        blt     a3, a4, clear_bss

... this branch actually the correct ones? I'd expect the unsigned
flavors to be used when comparing addresses. It may not matter here
and/or right now, but it'll set a bad precedent unless you expect
to only ever work on addresses which have the sign bit clear.

Jan

> +clear_bss_done:
> +
>          la      sp, cpu0_boot_stack
>          li      t0, STACK_SIZE
>          add     sp, sp, t0



  parent reply	other threads:[~2023-03-02 14:22 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-02 13:23 [PATCH v2 0/3] Do basic initialization things Oleksii Kurochko
2023-03-02 13:23 ` [PATCH v2 1/3] xen/riscv: read/save hart_id and dtb_base passed by bootloader Oleksii Kurochko
2023-03-02 14:02   ` Andrew Cooper
2023-03-02 14:53     ` Oleksii
2023-03-02 18:58       ` Andrew Cooper
2023-03-03  8:48         ` Oleksii
2023-03-02 13:23 ` [PATCH v2 2/3] xen/riscv: initialize .bss section Oleksii Kurochko
2023-03-02 14:12   ` Andrew Cooper
2023-03-02 14:55     ` Oleksii
2023-03-02 14:22   ` Jan Beulich [this message]
2023-03-02 15:55     ` Oleksii
2023-03-02 16:01       ` Jan Beulich
2023-03-02 20:34       ` Andrew Cooper
2023-03-02 13:23 ` [PATCH v2 3/3] xen/riscv: disable fpu Oleksii Kurochko
2023-03-02 14:20   ` Andrew Cooper
2023-03-02 17:11     ` Oleksii

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