From: Suman Anna <s-anna@ti.com>
To: Tony Lindgren <tony@atomide.com>, <linux-omap@vger.kernel.org>
Cc: Dave Gerlach <d-gerlach@ti.com>, Faiz Abbas <faiz_abbas@ti.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Keerthy <j-keerthy@ti.com>, Nishanth Menon <nm@ti.com>,
Peter Ujfalusi <peter.ujfalusi@ti.com>,
Roger Quadros <rogerq@ti.com>, Tero Kristo <t-kristo@ti.com>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 5/8] ARM: dts: Drop bogus ahclkr clocks for dra7 mcasp 3 to 8
Date: Tue, 23 Jul 2019 16:01:42 -0500 [thread overview]
Message-ID: <2c750847-700e-c835-ee53-a656b363c36c@ti.com> (raw)
In-Reply-To: <20190723112811.44381-6-tony@atomide.com>
Hi Tony,
On 7/23/19 6:28 AM, Tony Lindgren wrote:
> The ahclkr clkctrl clock bit 28 only exists for mcasp 1 and 2 on dra7.
> Otherwise we get the following warning on beagle-x15:
>
> ti-sysc 48468000.target-module: could not add child clock ahclkr: -19
>
> Fixes: 5241ccbf2819 ("ARM: dts: Add missing ranges for dra7 mcasp l3 ports")
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
> arch/arm/boot/dts/dra7-l4.dtsi | 25 ++++++++++---------------
> 1 file changed, 10 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
> --- a/arch/arm/boot/dts/dra7-l4.dtsi
> +++ b/arch/arm/boot/dts/dra7-l4.dtsi
> @@ -2818,9 +2818,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x68000 0x2000>,
> @@ -2854,9 +2853,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x6c000 0x2000>,
> @@ -2890,9 +2888,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x70000 0x2000>,
> @@ -2926,9 +2923,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x74000 0x2000>,
> @@ -2962,9 +2958,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
The equivalent change to MCASP8 is missing.
regards
Suman
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x78000 0x2000>,
>
WARNING: multiple messages have this Message-ID (diff)
From: Suman Anna <s-anna@ti.com>
To: Tony Lindgren <tony@atomide.com>, linux-omap@vger.kernel.org
Cc: Dave Gerlach <d-gerlach@ti.com>, Faiz Abbas <faiz_abbas@ti.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Keerthy <j-keerthy@ti.com>, Nishanth Menon <nm@ti.com>,
Peter Ujfalusi <peter.ujfalusi@ti.com>,
Roger Quadros <rogerq@ti.com>, Tero Kristo <t-kristo@ti.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 5/8] ARM: dts: Drop bogus ahclkr clocks for dra7 mcasp 3 to 8
Date: Tue, 23 Jul 2019 16:01:42 -0500 [thread overview]
Message-ID: <2c750847-700e-c835-ee53-a656b363c36c@ti.com> (raw)
In-Reply-To: <20190723112811.44381-6-tony@atomide.com>
Hi Tony,
On 7/23/19 6:28 AM, Tony Lindgren wrote:
> The ahclkr clkctrl clock bit 28 only exists for mcasp 1 and 2 on dra7.
> Otherwise we get the following warning on beagle-x15:
>
> ti-sysc 48468000.target-module: could not add child clock ahclkr: -19
>
> Fixes: 5241ccbf2819 ("ARM: dts: Add missing ranges for dra7 mcasp l3 ports")
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
> arch/arm/boot/dts/dra7-l4.dtsi | 25 ++++++++++---------------
> 1 file changed, 10 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
> --- a/arch/arm/boot/dts/dra7-l4.dtsi
> +++ b/arch/arm/boot/dts/dra7-l4.dtsi
> @@ -2818,9 +2818,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x68000 0x2000>,
> @@ -2854,9 +2853,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x6c000 0x2000>,
> @@ -2890,9 +2888,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x70000 0x2000>,
> @@ -2926,9 +2923,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x74000 0x2000>,
> @@ -2962,9 +2958,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
The equivalent change to MCASP8 is missing.
regards
Suman
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x78000 0x2000>,
>
WARNING: multiple messages have this Message-ID (diff)
From: Suman Anna <s-anna@ti.com>
To: Tony Lindgren <tony@atomide.com>, <linux-omap@vger.kernel.org>
Cc: Nishanth Menon <nm@ti.com>, Tero Kristo <t-kristo@ti.com>,
Dave Gerlach <d-gerlach@ti.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org,
Peter Ujfalusi <peter.ujfalusi@ti.com>,
Faiz Abbas <faiz_abbas@ti.com>, Keerthy <j-keerthy@ti.com>,
linux-arm-kernel@lists.infradead.org,
Roger Quadros <rogerq@ti.com>
Subject: Re: [PATCH 5/8] ARM: dts: Drop bogus ahclkr clocks for dra7 mcasp 3 to 8
Date: Tue, 23 Jul 2019 16:01:42 -0500 [thread overview]
Message-ID: <2c750847-700e-c835-ee53-a656b363c36c@ti.com> (raw)
In-Reply-To: <20190723112811.44381-6-tony@atomide.com>
Hi Tony,
On 7/23/19 6:28 AM, Tony Lindgren wrote:
> The ahclkr clkctrl clock bit 28 only exists for mcasp 1 and 2 on dra7.
> Otherwise we get the following warning on beagle-x15:
>
> ti-sysc 48468000.target-module: could not add child clock ahclkr: -19
>
> Fixes: 5241ccbf2819 ("ARM: dts: Add missing ranges for dra7 mcasp l3 ports")
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
> arch/arm/boot/dts/dra7-l4.dtsi | 25 ++++++++++---------------
> 1 file changed, 10 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
> --- a/arch/arm/boot/dts/dra7-l4.dtsi
> +++ b/arch/arm/boot/dts/dra7-l4.dtsi
> @@ -2818,9 +2818,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x68000 0x2000>,
> @@ -2854,9 +2853,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x6c000 0x2000>,
> @@ -2890,9 +2888,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x70000 0x2000>,
> @@ -2926,9 +2923,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x74000 0x2000>,
> @@ -2962,9 +2958,8 @@
> <SYSC_IDLE_SMART>;
> /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */
> clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 0>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>,
> - <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 28>;
> - clock-names = "fck", "ahclkx", "ahclkr";
> + <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>;
> + clock-names = "fck", "ahclkx";
The equivalent change to MCASP8 is missing.
regards
Suman
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x78000 0x2000>,
>
_______________________________________________
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next prev parent reply other threads:[~2019-07-23 21:01 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-23 11:28 [PATCH 0/8] ti-sysc related warning fixes for v5.3-rc cycle Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-23 11:28 ` [PATCH 1/8] ARM: OMAP2+: Fix missing SYSC_HAS_RESET_STATUS for dra7 epwmss Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-23 18:16 ` Suman Anna
2019-07-23 18:16 ` Suman Anna
2019-07-23 18:16 ` Suman Anna
2019-07-23 11:28 ` [PATCH 2/8] ARM: OMAP2+: Remove unconfigured midlemode for am3 lcdc Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-23 19:03 ` Suman Anna
2019-07-23 19:03 ` Suman Anna
2019-07-23 19:03 ` Suman Anna
2019-07-24 5:50 ` Keerthy
2019-07-24 5:50 ` Keerthy
2019-07-24 5:50 ` Keerthy
2019-07-24 6:31 ` Tony Lindgren
2019-07-24 6:31 ` Tony Lindgren
2019-07-24 18:28 ` Suman Anna
2019-07-24 18:28 ` Suman Anna
2019-07-24 18:28 ` Suman Anna
2019-08-13 10:47 ` Tony Lindgren
2019-08-13 10:47 ` Tony Lindgren
2019-08-13 10:47 ` Tony Lindgren
2019-08-13 11:04 ` Jyri Sarha
2019-08-13 11:04 ` Jyri Sarha
2019-08-13 11:04 ` Jyri Sarha
2019-08-13 11:29 ` Tony Lindgren
2019-08-13 11:29 ` Tony Lindgren
2019-07-23 11:28 ` [PATCH 3/8] bus: ti-sysc: Fix handling of forced idle Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-23 18:31 ` Suman Anna
2019-07-23 18:31 ` Suman Anna
2019-07-23 18:31 ` Suman Anna
2019-07-23 11:28 ` [PATCH 4/8] bus: ti-sysc: Fix using configured sysc mask value Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-23 11:28 ` [PATCH 5/8] ARM: dts: Drop bogus ahclkr clocks for dra7 mcasp 3 to 8 Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-23 21:01 ` Suman Anna [this message]
2019-07-23 21:01 ` Suman Anna
2019-07-23 21:01 ` Suman Anna
2019-07-24 6:47 ` Tony Lindgren
2019-07-24 6:47 ` Tony Lindgren
2019-09-17 7:21 ` Tero Kristo
2019-09-17 7:21 ` Tero Kristo
2019-09-17 7:21 ` Tero Kristo
2019-09-18 15:51 ` Tony Lindgren
2019-09-18 15:51 ` Tony Lindgren
2019-07-23 11:28 ` [PATCH 6/8] ARM: dts: Fix flags for gpio7 Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-23 21:58 ` Suman Anna
2019-07-23 21:58 ` Suman Anna
2019-07-23 21:58 ` Suman Anna
2019-07-23 11:28 ` [PATCH 7/8] ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7 Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-23 11:28 ` [PATCH 8/8] ARM: dts: Fix lcdc sysc flags for am3 Tony Lindgren
2019-07-23 11:28 ` Tony Lindgren
2019-07-24 5:52 ` [PATCH 0/8] ti-sysc related warning fixes for v5.3-rc cycle Keerthy
2019-07-24 5:52 ` Keerthy
2019-07-24 5:52 ` Keerthy
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