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From: Matthew Auld <matthew.auld@intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@intel.com>,
	dri-devel@lists.freedesktop.org,
	Chris P Wilson <chris.p.wilson@intel.com>,
	Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [Intel-gfx] [PATCH 12/19] drm/i915/lmem: Bypass aperture when lmem is available
Date: Fri, 16 Apr 2021 15:25:29 +0100	[thread overview]
Message-ID: <30d80560-f4ab-b20b-b80c-ca1e22128d26@intel.com> (raw)
In-Reply-To: <f2b2b40a-309c-a86b-7ddb-0761f7ee6dc0@linux.intel.com>

On 14/04/2021 16:33, Tvrtko Ursulin wrote:
> 
> On 12/04/2021 10:05, Matthew Auld wrote:
>> From: Anusha Srivatsa <anusha.srivatsa@intel.com>
>>
>> In the scenario where local memory is available, we have
>> rely on CPU access via lmem directly instead of aperture.
>>
>> v2:
>> gmch is only relevant for much older hw, therefore we can drop the
>> has_aperture check since it should always be present on such platforms.
>> (Chris)
>>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> Cc: Chris P Wilson <chris.p.wilson@intel.com>
>> Cc: Daniel Vetter <daniel.vetter@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Cc: CQ Tang <cq.tang@intel.com>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_fbdev.c | 22 +++++++++++++++-------
>>   drivers/gpu/drm/i915/gem/i915_gem_lmem.c   | 15 +++++++++++++++
>>   drivers/gpu/drm/i915/gem/i915_gem_lmem.h   |  5 +++++
>>   drivers/gpu/drm/i915/i915_vma.c            | 19 +++++++++++++------
>>   4 files changed, 48 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c 
>> b/drivers/gpu/drm/i915/display/intel_fbdev.c
>> index 2b37959da747..4af40229f5ec 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
>> @@ -139,14 +139,22 @@ static int intelfb_alloc(struct drm_fb_helper 
>> *helper,
>>       size = mode_cmd.pitches[0] * mode_cmd.height;
>>       size = PAGE_ALIGN(size);
>> -    /* If the FB is too big, just don't use it since fbdev is not very
>> -     * important and we should probably use that space with FBC or other
>> -     * features. */
>>       obj = ERR_PTR(-ENODEV);
>> -    if (size * 2 < dev_priv->stolen_usable_size)
>> -        obj = i915_gem_object_create_stolen(dev_priv, size);
>> -    if (IS_ERR(obj))
>> -        obj = i915_gem_object_create_shmem(dev_priv, size);
>> +    if (HAS_LMEM(dev_priv)) {
>> +        obj = i915_gem_object_create_lmem(dev_priv, size,
>> +                          I915_BO_ALLOC_CONTIGUOUS);
> 
> Has to be contiguous? Question for display experts I guess.
> 
> [Comes back later.] Ah for iomap? Put a comment to that effect perhaps?

I don't think it has to be, since we could in theory just use pin_map() 
underneath, which can already deal with non-contiguous chunks of lmem, 
although that might bring in ww locking. I think for now just add a 
comment and mark this as XXX, and potentially revisit as follow up?

> 
>> +    } else {
>> +        /*
>> +         * If the FB is too big, just don't use it since fbdev is not 
>> very
>> +         * important and we should probably use that space with FBC 
>> or other
>> +         * features.
>> +         */
>> +        if (size * 2 < dev_priv->stolen_usable_size)
>> +            obj = i915_gem_object_create_stolen(dev_priv, size);
>> +        if (IS_ERR(obj))
>> +            obj = i915_gem_object_create_shmem(dev_priv, size);
>> +    }
> 
> Could we keep the IS_ERR ordered allocation order to save having to 
> re-indent? Bike shed so optional..
> 
>> +
>>       if (IS_ERR(obj)) {
>>           drm_err(&dev_priv->drm, "failed to allocate framebuffer\n");
>>           return PTR_ERR(obj);
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c 
>> b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
>> index 017db8f71130..f44bdd08f7cb 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
>> @@ -17,6 +17,21 @@ const struct drm_i915_gem_object_ops 
>> i915_gem_lmem_obj_ops = {
>>       .release = i915_gem_object_release_memory_region,
>>   };
>> +void __iomem *
>> +i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
>> +                unsigned long n,
>> +                unsigned long size)
>> +{
>> +    resource_size_t offset;
>> +
>> +    GEM_BUG_ON(!i915_gem_object_is_contiguous(obj));
>> +
>> +    offset = i915_gem_object_get_dma_address(obj, n);
>> +    offset -= obj->mm.region->region.start;
>> +
>> +    return io_mapping_map_wc(&obj->mm.region->iomap, offset, size);
>> +}
>> +
>>   bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
>>   {
>>       struct intel_memory_region *mr = obj->mm.region;
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h 
>> b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
>> index 036d53c01de9..fac6bc5a5ebb 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
>> @@ -14,6 +14,11 @@ struct intel_memory_region;
>>   extern const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops;
>> +void __iomem *
>> +i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
>> +                unsigned long n,
>> +                unsigned long size);
>> +
>>   bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj);
>>   struct drm_i915_gem_object *
>> diff --git a/drivers/gpu/drm/i915/i915_vma.c 
>> b/drivers/gpu/drm/i915/i915_vma.c
>> index 07490db51cdc..e24d33aecac4 100644
>> --- a/drivers/gpu/drm/i915/i915_vma.c
>> +++ b/drivers/gpu/drm/i915/i915_vma.c
>> @@ -27,6 +27,7 @@
>>   #include "display/intel_frontbuffer.h"
>> +#include "gem/i915_gem_lmem.h"
>>   #include "gt/intel_engine.h"
>>   #include "gt/intel_engine_heartbeat.h"
>>   #include "gt/intel_gt.h"
>> @@ -448,9 +449,11 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma 
>> *vma)
>>       void __iomem *ptr;
>>       int err;
>> -    if (GEM_WARN_ON(!i915_vma_is_map_and_fenceable(vma))) {
>> -        err = -ENODEV;
>> -        goto err;
>> +    if (!i915_gem_object_is_lmem(vma->obj)) {
>> +        if (GEM_WARN_ON(!i915_vma_is_map_and_fenceable(vma))) {
>> +            err = -ENODEV;
>> +            goto err;
>> +        }
>>       }
>>       GEM_BUG_ON(!i915_vma_is_ggtt(vma));
>> @@ -458,9 +461,13 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma 
>> *vma)
>>       ptr = READ_ONCE(vma->iomap);
>>       if (ptr == NULL) {
>> -        ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
>> -                    vma->node.start,
>> -                    vma->node.size);
>> +        if (i915_gem_object_is_lmem(vma->obj))
>> +            ptr = i915_gem_object_lmem_io_map(vma->obj, 0,
>> +                              vma->obj->base.size);
> 
> Can the vma size be bigger than the object here? Given how below works 
> of vma->node.size.

I don't know tbh. But in general node.size can definitely be larger than 
vma->size/obj->base.size.

For the iomap version below, it's using the mappable aperture, which 
requires reserving a vma node into the mappable part of the GGTT first, 
so using node.size here make sense, since the node reflects the window 
into the mappable aperture.

For the lmem case though that might be bogus, since the vma has no 
relationship with LMEM_BAR, since really it's the object, hence why we 
use the obj->base.size instead. Although really it might make more sense 
to use pin_map() instead for the lmem case, if it's possible.

> 
>> +        else
>> +            ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
>> +                        vma->node.start,
>> +                        vma->node.size);
> 
> Looks a bit odd that this calls the same io_mapping_map_wc as 
> i915_gem_object_lmem_io_map ends up doing. Perhaps that suggests there 
> should be a single helper here but I am not sure what would be elegant.
> 
> Regards,
> 
> Tvrtko
> 
>>           if (ptr == NULL) {
>>               err = -ENOMEM;
>>               goto err;
>>
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https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.auld@intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@intel.com>,
	dri-devel@lists.freedesktop.org,
	Chris P Wilson <chris.p.wilson@intel.com>,
	Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [Intel-gfx] [PATCH 12/19] drm/i915/lmem: Bypass aperture when lmem is available
Date: Fri, 16 Apr 2021 15:25:29 +0100	[thread overview]
Message-ID: <30d80560-f4ab-b20b-b80c-ca1e22128d26@intel.com> (raw)
In-Reply-To: <f2b2b40a-309c-a86b-7ddb-0761f7ee6dc0@linux.intel.com>

On 14/04/2021 16:33, Tvrtko Ursulin wrote:
> 
> On 12/04/2021 10:05, Matthew Auld wrote:
>> From: Anusha Srivatsa <anusha.srivatsa@intel.com>
>>
>> In the scenario where local memory is available, we have
>> rely on CPU access via lmem directly instead of aperture.
>>
>> v2:
>> gmch is only relevant for much older hw, therefore we can drop the
>> has_aperture check since it should always be present on such platforms.
>> (Chris)
>>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> Cc: Chris P Wilson <chris.p.wilson@intel.com>
>> Cc: Daniel Vetter <daniel.vetter@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Cc: CQ Tang <cq.tang@intel.com>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_fbdev.c | 22 +++++++++++++++-------
>>   drivers/gpu/drm/i915/gem/i915_gem_lmem.c   | 15 +++++++++++++++
>>   drivers/gpu/drm/i915/gem/i915_gem_lmem.h   |  5 +++++
>>   drivers/gpu/drm/i915/i915_vma.c            | 19 +++++++++++++------
>>   4 files changed, 48 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c 
>> b/drivers/gpu/drm/i915/display/intel_fbdev.c
>> index 2b37959da747..4af40229f5ec 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
>> @@ -139,14 +139,22 @@ static int intelfb_alloc(struct drm_fb_helper 
>> *helper,
>>       size = mode_cmd.pitches[0] * mode_cmd.height;
>>       size = PAGE_ALIGN(size);
>> -    /* If the FB is too big, just don't use it since fbdev is not very
>> -     * important and we should probably use that space with FBC or other
>> -     * features. */
>>       obj = ERR_PTR(-ENODEV);
>> -    if (size * 2 < dev_priv->stolen_usable_size)
>> -        obj = i915_gem_object_create_stolen(dev_priv, size);
>> -    if (IS_ERR(obj))
>> -        obj = i915_gem_object_create_shmem(dev_priv, size);
>> +    if (HAS_LMEM(dev_priv)) {
>> +        obj = i915_gem_object_create_lmem(dev_priv, size,
>> +                          I915_BO_ALLOC_CONTIGUOUS);
> 
> Has to be contiguous? Question for display experts I guess.
> 
> [Comes back later.] Ah for iomap? Put a comment to that effect perhaps?

I don't think it has to be, since we could in theory just use pin_map() 
underneath, which can already deal with non-contiguous chunks of lmem, 
although that might bring in ww locking. I think for now just add a 
comment and mark this as XXX, and potentially revisit as follow up?

> 
>> +    } else {
>> +        /*
>> +         * If the FB is too big, just don't use it since fbdev is not 
>> very
>> +         * important and we should probably use that space with FBC 
>> or other
>> +         * features.
>> +         */
>> +        if (size * 2 < dev_priv->stolen_usable_size)
>> +            obj = i915_gem_object_create_stolen(dev_priv, size);
>> +        if (IS_ERR(obj))
>> +            obj = i915_gem_object_create_shmem(dev_priv, size);
>> +    }
> 
> Could we keep the IS_ERR ordered allocation order to save having to 
> re-indent? Bike shed so optional..
> 
>> +
>>       if (IS_ERR(obj)) {
>>           drm_err(&dev_priv->drm, "failed to allocate framebuffer\n");
>>           return PTR_ERR(obj);
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c 
>> b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
>> index 017db8f71130..f44bdd08f7cb 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
>> @@ -17,6 +17,21 @@ const struct drm_i915_gem_object_ops 
>> i915_gem_lmem_obj_ops = {
>>       .release = i915_gem_object_release_memory_region,
>>   };
>> +void __iomem *
>> +i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
>> +                unsigned long n,
>> +                unsigned long size)
>> +{
>> +    resource_size_t offset;
>> +
>> +    GEM_BUG_ON(!i915_gem_object_is_contiguous(obj));
>> +
>> +    offset = i915_gem_object_get_dma_address(obj, n);
>> +    offset -= obj->mm.region->region.start;
>> +
>> +    return io_mapping_map_wc(&obj->mm.region->iomap, offset, size);
>> +}
>> +
>>   bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
>>   {
>>       struct intel_memory_region *mr = obj->mm.region;
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h 
>> b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
>> index 036d53c01de9..fac6bc5a5ebb 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
>> @@ -14,6 +14,11 @@ struct intel_memory_region;
>>   extern const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops;
>> +void __iomem *
>> +i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
>> +                unsigned long n,
>> +                unsigned long size);
>> +
>>   bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj);
>>   struct drm_i915_gem_object *
>> diff --git a/drivers/gpu/drm/i915/i915_vma.c 
>> b/drivers/gpu/drm/i915/i915_vma.c
>> index 07490db51cdc..e24d33aecac4 100644
>> --- a/drivers/gpu/drm/i915/i915_vma.c
>> +++ b/drivers/gpu/drm/i915/i915_vma.c
>> @@ -27,6 +27,7 @@
>>   #include "display/intel_frontbuffer.h"
>> +#include "gem/i915_gem_lmem.h"
>>   #include "gt/intel_engine.h"
>>   #include "gt/intel_engine_heartbeat.h"
>>   #include "gt/intel_gt.h"
>> @@ -448,9 +449,11 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma 
>> *vma)
>>       void __iomem *ptr;
>>       int err;
>> -    if (GEM_WARN_ON(!i915_vma_is_map_and_fenceable(vma))) {
>> -        err = -ENODEV;
>> -        goto err;
>> +    if (!i915_gem_object_is_lmem(vma->obj)) {
>> +        if (GEM_WARN_ON(!i915_vma_is_map_and_fenceable(vma))) {
>> +            err = -ENODEV;
>> +            goto err;
>> +        }
>>       }
>>       GEM_BUG_ON(!i915_vma_is_ggtt(vma));
>> @@ -458,9 +461,13 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma 
>> *vma)
>>       ptr = READ_ONCE(vma->iomap);
>>       if (ptr == NULL) {
>> -        ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
>> -                    vma->node.start,
>> -                    vma->node.size);
>> +        if (i915_gem_object_is_lmem(vma->obj))
>> +            ptr = i915_gem_object_lmem_io_map(vma->obj, 0,
>> +                              vma->obj->base.size);
> 
> Can the vma size be bigger than the object here? Given how below works 
> of vma->node.size.

I don't know tbh. But in general node.size can definitely be larger than 
vma->size/obj->base.size.

For the iomap version below, it's using the mappable aperture, which 
requires reserving a vma node into the mappable part of the GGTT first, 
so using node.size here make sense, since the node reflects the window 
into the mappable aperture.

For the lmem case though that might be bogus, since the vma has no 
relationship with LMEM_BAR, since really it's the object, hence why we 
use the obj->base.size instead. Although really it might make more sense 
to use pin_map() instead for the lmem case, if it's possible.

> 
>> +        else
>> +            ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
>> +                        vma->node.start,
>> +                        vma->node.size);
> 
> Looks a bit odd that this calls the same io_mapping_map_wc as 
> i915_gem_object_lmem_io_map ends up doing. Perhaps that suggests there 
> should be a single helper here but I am not sure what would be elegant.
> 
> Regards,
> 
> Tvrtko
> 
>>           if (ptr == NULL) {
>>               err = -ENOMEM;
>>               goto err;
>>
_______________________________________________
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  reply	other threads:[~2021-04-16 14:25 UTC|newest]

Thread overview: 132+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-12  9:05 [PATCH 00/19] More DG1 enabling Matthew Auld
2021-04-12  9:05 ` [Intel-gfx] " Matthew Auld
2021-04-12  9:05 ` [PATCH 01/19] drm/i915/gt: Skip aperture remapping selftest where there is no aperture Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12 14:48   ` Daniel Vetter
2021-04-12 14:48     ` Daniel Vetter
2021-04-12  9:05 ` [PATCH 02/19] drm/i915/selftests: Only query RAPL for integrated power measurements Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12  9:05 ` [PATCH 03/19] drm/i915: Create stolen memory region from local memory Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-14 15:01   ` Tvrtko Ursulin
2021-04-14 15:01     ` Tvrtko Ursulin
2021-04-16 15:04     ` Matthew Auld
2021-04-16 15:04       ` Matthew Auld
2021-04-19 14:15       ` Tvrtko Ursulin
2021-04-19 14:15         ` Tvrtko Ursulin
2021-04-12  9:05 ` [PATCH 04/19] drm/i915/stolen: treat stolen local as normal " Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-14 15:06   ` Tvrtko Ursulin
2021-04-14 15:06     ` Tvrtko Ursulin
2021-04-12  9:05 ` [PATCH 05/19] drm/i915/stolen: enforce the min_page_size contract Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-14 15:07   ` Tvrtko Ursulin
2021-04-14 15:07     ` Tvrtko Ursulin
2021-04-12  9:05 ` [PATCH 06/19] drm/i915/stolen: pass the allocation flags Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-14 15:09   ` Tvrtko Ursulin
2021-04-14 15:09     ` Tvrtko Ursulin
2021-04-16 13:53     ` Matthew Auld
2021-04-16 13:53       ` Matthew Auld
2021-04-12  9:05 ` [PATCH 07/19] drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on discrete Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12 15:00   ` Daniel Vetter
2021-04-12 15:00     ` [Intel-gfx] " Daniel Vetter
2021-04-12  9:05 ` [PATCH 08/19] drm/i915: Return error value when bo not in LMEM for discrete Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-14 15:16   ` Tvrtko Ursulin
2021-04-14 15:16     ` Tvrtko Ursulin
2021-04-12  9:05 ` [PATCH 09/19] drm/i915/lmem: Fail driver init if LMEM training failed Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12  9:05 ` [PATCH 10/19] drm/i915/dg1: Fix mapping type for default state object Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12  9:05 ` [PATCH 11/19] drm/i915: Update the helper to set correct mapping Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-14 15:22   ` Tvrtko Ursulin
2021-04-14 15:22     ` Tvrtko Ursulin
2021-04-14 16:20     ` Matthew Auld
2021-04-14 16:20       ` Matthew Auld
2021-04-15  8:20       ` Tvrtko Ursulin
2021-04-15  8:20         ` Tvrtko Ursulin
2021-04-15  9:23         ` Matthew Auld
2021-04-15  9:23           ` Matthew Auld
2021-04-15 11:05           ` Tvrtko Ursulin
2021-04-15 11:05             ` Tvrtko Ursulin
2021-04-19 11:30             ` Matthew Auld
2021-04-19 11:30               ` Matthew Auld
2021-04-19 14:07               ` Tvrtko Ursulin
2021-04-19 14:07                 ` Tvrtko Ursulin
2021-04-19 14:37                 ` Matthew Auld
2021-04-19 14:37                   ` Matthew Auld
2021-04-19 15:01                   ` Tvrtko Ursulin
2021-04-19 15:01                     ` Tvrtko Ursulin
2021-04-21 11:42                     ` Matthew Auld
2021-04-21 11:42                       ` Matthew Auld
2021-04-21 15:41                       ` Tvrtko Ursulin
2021-04-21 15:41                         ` Tvrtko Ursulin
2021-04-21 19:13                         ` Matthew Auld
2021-04-21 19:13                           ` Matthew Auld
2021-04-26  8:57                           ` Matthew Auld
2021-04-26  8:57                             ` Matthew Auld
2021-04-26  9:21                             ` Tvrtko Ursulin
2021-04-26  9:21                               ` Tvrtko Ursulin
2021-04-12  9:05 ` [PATCH 12/19] drm/i915/lmem: Bypass aperture when lmem is available Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-14 15:33   ` Tvrtko Ursulin
2021-04-14 15:33     ` Tvrtko Ursulin
2021-04-16 14:25     ` Matthew Auld [this message]
2021-04-16 14:25       ` Matthew Auld
2021-04-19 14:16       ` Tvrtko Ursulin
2021-04-19 14:16         ` Tvrtko Ursulin
2021-04-12  9:05 ` [PATCH 13/19] drm/i915/dg1: Read OPROM via SPI controller Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-09-17 23:29   ` Lucas De Marchi
2021-04-12  9:05 ` [PATCH 14/19] drm/i915/oprom: Basic sanitization Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12 22:36   ` kernel test robot
2021-04-12 22:36     ` kernel test robot
2021-04-12 22:36     ` kernel test robot
2021-04-12 22:36   ` [PATCH] drm/i915/oprom: fix memdup.cocci warnings kernel test robot
2021-04-12 22:36     ` kernel test robot
2021-04-12 22:36     ` [Intel-gfx] " kernel test robot
2021-05-17 11:57   ` [Intel-gfx] [PATCH 14/19] drm/i915/oprom: Basic sanitization Jani Nikula
2021-05-17 11:57     ` Jani Nikula
2021-09-18  4:30     ` Lucas De Marchi
2021-09-20  7:41       ` Jani Nikula
2021-09-20  8:04         ` Gupta, Anshuman
2021-09-20  8:04           ` Gupta, Anshuman
2021-09-20  8:43           ` Jani Nikula
2021-09-20  8:43             ` Jani Nikula
2021-09-22 21:53           ` Lucas De Marchi
2021-04-12  9:05 ` [PATCH 15/19] drm/i915: WA for zero memory channel Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12 16:57   ` Souza, Jose
2021-04-12 16:57     ` [Intel-gfx] " Souza, Jose
2021-04-12  9:05 ` [PATCH 16/19] drm/i915/dg1: Compute MEM Bandwidth using MCHBAR Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12  9:05 ` [PATCH 17/19] drm/i915/dg1: Double memory bandwidth available Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12  9:05 ` [PATCH 18/19] drm/i915/gtt: map the PD up front Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-12 15:17   ` Daniel Vetter
2021-04-12 15:17     ` Daniel Vetter
2021-04-12 16:01     ` Jani Nikula
2021-04-12 16:01       ` Jani Nikula
2021-04-12 16:36       ` Daniel Vetter
2021-04-12 16:36         ` Daniel Vetter
2021-04-12 16:08     ` Matthew Auld
2021-04-12 16:08       ` Matthew Auld
2021-04-12 17:00       ` Daniel Vetter
2021-04-12 17:00         ` Daniel Vetter
2021-04-13  9:28         ` Matthew Auld
2021-04-13  9:28           ` Matthew Auld
2021-04-13 10:18           ` Daniel Vetter
2021-04-13 10:18             ` Daniel Vetter
2021-04-12  9:05 ` [PATCH 19/19] drm/i915/gtt/dgfx: place the PD in LMEM Matthew Auld
2021-04-12  9:05   ` [Intel-gfx] " Matthew Auld
2021-04-14 15:37   ` Tvrtko Ursulin
2021-04-14 15:37     ` Tvrtko Ursulin
2021-04-12 11:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DG1 enabling Patchwork
2021-04-12 11:12 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-04-12 11:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-04-12 13:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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