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* [PATCH v3 00/14] Make atmel serial driver aware of GCLK
@ 2022-09-13 14:21 ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

This series of patches introduces the GCLK as a potential clock source for
the baudrate generator of UART on sama5d2 SoCs. Unlike the serial mode of
the USART offered by FLEXCOM, the UART does not provide a fractional part
that can be added to the clock divisor to obtain a more accurate result,
which greatly decreases the flexibility available for producing a higher
variety of baudrates. Now, with the last patch of the series, the driver
will check for a GCLK in the DT. If provided, whenever `atmel_set_termios`
is called, unless there is a fractional part, the driver will compare the
error rate between the desired baudrate and the actual baudrate obtained
through each of the available clock sources and will choose the clock source
with the lowest error rate. While at it, convert the DT binding
for UART/USART to json-schema, update the FLEXCOM binding to reference the
new UART/USART binding (while differentiating between the SPI of USART and the
SPI of FLEXCOM) and do some small DT related fixups.

The DT bindings related patches of this patch series depend on this patch
series converting atmel-flexcom bindings to json-schema:
https://lore.kernel.org/all/20220708115619.254073-1-kavyasree.kotagiri@microchip.com/

v1 -> v2:
- [PATCH 3] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref
    binding:
	- use full schema paths

- [PATCH 5] dt-bindings: serial: atmel,at91-usart: convert to json-schema
	- only do what the commit says, split the addition of other compatibles
	(PATCH 6) and properties (PATCH 13) in other patches
	- remove unnecessary "|"'s
	- mention header in `atmel,usart-mode`'s description
	- place `if:` under `allOf:`
	- respect order of spi0's DT properties: compatible, then reg then the
	reset of properties

- two new baudrate clock source related patches:
  [PATCH 9] tty: serial: atmel: Add definition for GCLK as baudrate source clock
			+
  [PATCH 10] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode
    Register:
	- v1's bitfield definition of GCLK was wrong, so add two more patches:
		- one for the definition of GCLK of USART IP's
		- one for the definition of BRSRCCK bitmask and its bitfields
		for UART IP's

- a new cleanup related patch that introduces a new struct atmel_uart_port field:
  [PATCH 11] tty: serial: atmel: Only divide Clock Divisor if the IP is USART:
  	- this ensures a division by 8 which is unnecessary and unappliable to
	UART IP's is only done for USART IP's

- four new patches regarding DT fixes and a SPI binding update that I came
upon:
  [PATCH 1] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
  [PATCH 2] ARM: dts: at91: sama7g5: Swap rx and tx for spi11
  [PATCH 4] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
  [PATCH 6] dt-bindings: serial: atmel,at91-usart: Highlight SAM9X60 incremental

- [PATCH 12] tty: serial: atmel: Make the driver aware of the existence of GCLK
	- take into account the different placement of the baudrate clock source
	into the IP's Mode Register (USART vs UART)
	- don't check for atmel_port->gclk != NULL
	- use clk_round_rate instead of clk_set_rate + clk_get_rate
	- remove clk_disable_unprepare from the end of the probe method

v2 -> v3:
- Re-order the patches as suggested by Krzysztof Kozlowski:
1. DTS changes needed for aligning to schema.
2. all bindings
3. rest

- New DT consistency related patch:
  [PATCH 3] ARM: dts: at91: Add `atmel,usart-mode` required property to serial
    nodes

- [PATCH 6] dt-bindings: serial: atmel,at91-usart: convert to json-schema:
  - Check value of `atmel,usart-mode` instead of the node regex
  - Define all properties top level and disallow them explicitly for other type,
  since additionalProperties:false conflicts with referencing other schemas
  - Remove useless else if: after else:

- [PATCH 7] dt-bindings: serial: atmel,at91-usart: add SAM9260 compatibles to
  SAM9X60:
  - Use the commit message suggested by Krzysztof Kozlowski

- [PATCH 8] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref
  binding
  - Compare devices based on the compatible instead of the clock

- [PATCH 12] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
  - Use ATMEL_US_CD instead of 65535

- [PATCH 14] tty: serial: atmel: Make the driver aware of the existence of GCLK
  - add `gclk_fail` goto
  - replace `goto err` with `goto err_clk_disable_unprepare;`


Sergiu Moga (14):
  ARM: dts: at91: sama7g5: Swap rx and tx for spi11
  ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
  ARM: dts: at91: Add `atmel,usart-mode` required property to serial
    nodes
  spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
  dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref
    binding
  dt-bindings: serial: atmel,at91-usart: convert to json-schema
  dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to
    SAM9X60
  dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref
    binding
  dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART
    clock
  tty: serial: atmel: Define GCLK as USART baudrate source clock
  tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register
  tty: serial: atmel: Only divide Clock Divisor if the IP is USART
  clk: at91: sama5d2: Add Generic Clocks for UART/USART
  tty: serial: atmel: Make the driver aware of the existence of GCLK

 .../bindings/mfd/atmel,sama5d2-flexcom.yaml   |  19 +-
 .../devicetree/bindings/mfd/atmel-usart.txt   |  98 ---------
 .../bindings/serial/atmel,at91-usart.yaml     | 190 ++++++++++++++++++
 .../bindings/spi/atmel,at91rm9200-spi.yaml    |  10 +
 arch/arm/boot/dts/at91-sam9x60ek.dts          |   3 +-
 arch/arm/boot/dts/at91rm9200.dtsi             |   6 +
 arch/arm/boot/dts/at91sam9260.dtsi            |   8 +
 arch/arm/boot/dts/at91sam9261.dtsi            |   5 +
 arch/arm/boot/dts/at91sam9263.dtsi            |   5 +
 arch/arm/boot/dts/at91sam9g45.dtsi            |   6 +
 arch/arm/boot/dts/at91sam9n12.dtsi            |   6 +
 arch/arm/boot/dts/at91sam9rl.dtsi             |   6 +
 arch/arm/boot/dts/at91sam9x5.dtsi             |   7 +
 arch/arm/boot/dts/at91sam9x5_usart3.dtsi      |   2 +
 arch/arm/boot/dts/sam9x60.dtsi                |   2 +
 arch/arm/boot/dts/sama5d2.dtsi                |  11 +
 arch/arm/boot/dts/sama5d3.dtsi                |   7 +
 arch/arm/boot/dts/sama5d3_uart.dtsi           |   3 +
 arch/arm/boot/dts/sama5d4.dtsi                |   9 +
 arch/arm/boot/dts/sama7g5.dtsi                |  11 +-
 drivers/clk/at91/sama5d2.c                    |  10 +
 drivers/tty/serial/atmel_serial.c             |  76 ++++++-
 drivers/tty/serial/atmel_serial.h             |   4 +
 23 files changed, 394 insertions(+), 110 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-usart.txt
 create mode 100644 Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml

-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* [PATCH v3 00/14] Make atmel serial driver aware of GCLK
@ 2022-09-13 14:21 ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

This series of patches introduces the GCLK as a potential clock source for
the baudrate generator of UART on sama5d2 SoCs. Unlike the serial mode of
the USART offered by FLEXCOM, the UART does not provide a fractional part
that can be added to the clock divisor to obtain a more accurate result,
which greatly decreases the flexibility available for producing a higher
variety of baudrates. Now, with the last patch of the series, the driver
will check for a GCLK in the DT. If provided, whenever `atmel_set_termios`
is called, unless there is a fractional part, the driver will compare the
error rate between the desired baudrate and the actual baudrate obtained
through each of the available clock sources and will choose the clock source
with the lowest error rate. While at it, convert the DT binding
for UART/USART to json-schema, update the FLEXCOM binding to reference the
new UART/USART binding (while differentiating between the SPI of USART and the
SPI of FLEXCOM) and do some small DT related fixups.

The DT bindings related patches of this patch series depend on this patch
series converting atmel-flexcom bindings to json-schema:
https://lore.kernel.org/all/20220708115619.254073-1-kavyasree.kotagiri@microchip.com/

v1 -> v2:
- [PATCH 3] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref
    binding:
	- use full schema paths

- [PATCH 5] dt-bindings: serial: atmel,at91-usart: convert to json-schema
	- only do what the commit says, split the addition of other compatibles
	(PATCH 6) and properties (PATCH 13) in other patches
	- remove unnecessary "|"'s
	- mention header in `atmel,usart-mode`'s description
	- place `if:` under `allOf:`
	- respect order of spi0's DT properties: compatible, then reg then the
	reset of properties

- two new baudrate clock source related patches:
  [PATCH 9] tty: serial: atmel: Add definition for GCLK as baudrate source clock
			+
  [PATCH 10] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode
    Register:
	- v1's bitfield definition of GCLK was wrong, so add two more patches:
		- one for the definition of GCLK of USART IP's
		- one for the definition of BRSRCCK bitmask and its bitfields
		for UART IP's

- a new cleanup related patch that introduces a new struct atmel_uart_port field:
  [PATCH 11] tty: serial: atmel: Only divide Clock Divisor if the IP is USART:
  	- this ensures a division by 8 which is unnecessary and unappliable to
	UART IP's is only done for USART IP's

- four new patches regarding DT fixes and a SPI binding update that I came
upon:
  [PATCH 1] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
  [PATCH 2] ARM: dts: at91: sama7g5: Swap rx and tx for spi11
  [PATCH 4] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
  [PATCH 6] dt-bindings: serial: atmel,at91-usart: Highlight SAM9X60 incremental

- [PATCH 12] tty: serial: atmel: Make the driver aware of the existence of GCLK
	- take into account the different placement of the baudrate clock source
	into the IP's Mode Register (USART vs UART)
	- don't check for atmel_port->gclk != NULL
	- use clk_round_rate instead of clk_set_rate + clk_get_rate
	- remove clk_disable_unprepare from the end of the probe method

v2 -> v3:
- Re-order the patches as suggested by Krzysztof Kozlowski:
1. DTS changes needed for aligning to schema.
2. all bindings
3. rest

- New DT consistency related patch:
  [PATCH 3] ARM: dts: at91: Add `atmel,usart-mode` required property to serial
    nodes

- [PATCH 6] dt-bindings: serial: atmel,at91-usart: convert to json-schema:
  - Check value of `atmel,usart-mode` instead of the node regex
  - Define all properties top level and disallow them explicitly for other type,
  since additionalProperties:false conflicts with referencing other schemas
  - Remove useless else if: after else:

- [PATCH 7] dt-bindings: serial: atmel,at91-usart: add SAM9260 compatibles to
  SAM9X60:
  - Use the commit message suggested by Krzysztof Kozlowski

- [PATCH 8] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref
  binding
  - Compare devices based on the compatible instead of the clock

- [PATCH 12] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
  - Use ATMEL_US_CD instead of 65535

- [PATCH 14] tty: serial: atmel: Make the driver aware of the existence of GCLK
  - add `gclk_fail` goto
  - replace `goto err` with `goto err_clk_disable_unprepare;`


Sergiu Moga (14):
  ARM: dts: at91: sama7g5: Swap rx and tx for spi11
  ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
  ARM: dts: at91: Add `atmel,usart-mode` required property to serial
    nodes
  spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
  dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref
    binding
  dt-bindings: serial: atmel,at91-usart: convert to json-schema
  dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to
    SAM9X60
  dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref
    binding
  dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART
    clock
  tty: serial: atmel: Define GCLK as USART baudrate source clock
  tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register
  tty: serial: atmel: Only divide Clock Divisor if the IP is USART
  clk: at91: sama5d2: Add Generic Clocks for UART/USART
  tty: serial: atmel: Make the driver aware of the existence of GCLK

 .../bindings/mfd/atmel,sama5d2-flexcom.yaml   |  19 +-
 .../devicetree/bindings/mfd/atmel-usart.txt   |  98 ---------
 .../bindings/serial/atmel,at91-usart.yaml     | 190 ++++++++++++++++++
 .../bindings/spi/atmel,at91rm9200-spi.yaml    |  10 +
 arch/arm/boot/dts/at91-sam9x60ek.dts          |   3 +-
 arch/arm/boot/dts/at91rm9200.dtsi             |   6 +
 arch/arm/boot/dts/at91sam9260.dtsi            |   8 +
 arch/arm/boot/dts/at91sam9261.dtsi            |   5 +
 arch/arm/boot/dts/at91sam9263.dtsi            |   5 +
 arch/arm/boot/dts/at91sam9g45.dtsi            |   6 +
 arch/arm/boot/dts/at91sam9n12.dtsi            |   6 +
 arch/arm/boot/dts/at91sam9rl.dtsi             |   6 +
 arch/arm/boot/dts/at91sam9x5.dtsi             |   7 +
 arch/arm/boot/dts/at91sam9x5_usart3.dtsi      |   2 +
 arch/arm/boot/dts/sam9x60.dtsi                |   2 +
 arch/arm/boot/dts/sama5d2.dtsi                |  11 +
 arch/arm/boot/dts/sama5d3.dtsi                |   7 +
 arch/arm/boot/dts/sama5d3_uart.dtsi           |   3 +
 arch/arm/boot/dts/sama5d4.dtsi                |   9 +
 arch/arm/boot/dts/sama7g5.dtsi                |  11 +-
 drivers/clk/at91/sama5d2.c                    |  10 +
 drivers/tty/serial/atmel_serial.c             |  76 ++++++-
 drivers/tty/serial/atmel_serial.h             |   4 +
 23 files changed, 394 insertions(+), 110 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-usart.txt
 create mode 100644 Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml

-- 
2.34.1


^ permalink raw reply	[flat|nested] 52+ messages in thread

* [PATCH v3 01/14] ARM: dts: at91: sama7g5: Swap rx and tx for spi11
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:21   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Swap the rx and tx of the DMA related DT properties of the spi11 node
in order to maintain consistency across Microchip/Atmel SoC files.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Nothing, this was previously [PATCH 2]



 arch/arm/boot/dts/sama7g5.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index bb6d71e6dfeb..249f9c640b6c 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -866,9 +866,9 @@ spi11: spi@400 {
 				#address-cells = <1>;
 				#size-cells = <0>;
 				atmel,fifo-size = <32>;
-				dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>,
-					    <&dma0 AT91_XDMAC_DT_PERID(28)>;
-				dma-names = "rx", "tx";
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(28)>,
+					    <&dma0 AT91_XDMAC_DT_PERID(27)>;
+				dma-names = "tx", "rx";
 				status = "disabled";
 			};
 		};
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 01/14] ARM: dts: at91: sama7g5: Swap rx and tx for spi11
@ 2022-09-13 14:21   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Swap the rx and tx of the DMA related DT properties of the spi11 node
in order to maintain consistency across Microchip/Atmel SoC files.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Nothing, this was previously [PATCH 2]



 arch/arm/boot/dts/sama7g5.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index bb6d71e6dfeb..249f9c640b6c 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -866,9 +866,9 @@ spi11: spi@400 {
 				#address-cells = <1>;
 				#size-cells = <0>;
 				atmel,fifo-size = <32>;
-				dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>,
-					    <&dma0 AT91_XDMAC_DT_PERID(28)>;
-				dma-names = "rx", "tx";
+				dmas = <&dma0 AT91_XDMAC_DT_PERID(28)>,
+					    <&dma0 AT91_XDMAC_DT_PERID(27)>;
+				dma-names = "tx", "rx";
 				status = "disabled";
 			};
 		};
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 02/14] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:21   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Maintain consistency among the compatibles of the serial nodes of
sam9x60ek and highlight the incremental characteristic of its serial
IP's by making sure that all serial nodes contain both the sam9x60
and sam9260 usart/dbgu compatibles.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Nothing, previously this was [PATCH 4]



 arch/arm/boot/dts/at91-sam9x60ek.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
index 7ade9979e1c6..67bce8d60908 100644
--- a/arch/arm/boot/dts/at91-sam9x60ek.dts
+++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
@@ -258,7 +258,7 @@ &flx5 {
 	status = "okay";
 
 	uart1: serial@200 {
-		compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
+		compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 		reg = <0x200 0x200>;
 		interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
 		dmas = <&dma0
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 02/14] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
@ 2022-09-13 14:21   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Maintain consistency among the compatibles of the serial nodes of
sam9x60ek and highlight the incremental characteristic of its serial
IP's by making sure that all serial nodes contain both the sam9x60
and sam9260 usart/dbgu compatibles.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Nothing, previously this was [PATCH 4]



 arch/arm/boot/dts/at91-sam9x60ek.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
index 7ade9979e1c6..67bce8d60908 100644
--- a/arch/arm/boot/dts/at91-sam9x60ek.dts
+++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
@@ -258,7 +258,7 @@ &flx5 {
 	status = "okay";
 
 	uart1: serial@200 {
-		compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
+		compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 		reg = <0x200 0x200>;
 		interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
 		dmas = <&dma0
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 03/14] ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:21   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Add the missing required DT property `atmel,usart-mode` to the serial
nodes of Atmel/Microchip DT files.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v3:
- Nothing, this patch was not here before



 arch/arm/boot/dts/at91-sam9x60ek.dts     |  1 +
 arch/arm/boot/dts/at91rm9200.dtsi        |  6 ++++++
 arch/arm/boot/dts/at91sam9260.dtsi       |  8 ++++++++
 arch/arm/boot/dts/at91sam9261.dtsi       |  5 +++++
 arch/arm/boot/dts/at91sam9263.dtsi       |  5 +++++
 arch/arm/boot/dts/at91sam9g45.dtsi       |  6 ++++++
 arch/arm/boot/dts/at91sam9n12.dtsi       |  6 ++++++
 arch/arm/boot/dts/at91sam9rl.dtsi        |  6 ++++++
 arch/arm/boot/dts/at91sam9x5.dtsi        |  7 +++++++
 arch/arm/boot/dts/at91sam9x5_usart3.dtsi |  2 ++
 arch/arm/boot/dts/sam9x60.dtsi           |  2 ++
 arch/arm/boot/dts/sama5d2.dtsi           | 11 +++++++++++
 arch/arm/boot/dts/sama5d3.dtsi           |  7 +++++++
 arch/arm/boot/dts/sama5d3_uart.dtsi      |  3 +++
 arch/arm/boot/dts/sama5d4.dtsi           |  9 +++++++++
 arch/arm/boot/dts/sama7g5.dtsi           |  5 +++++
 16 files changed, 89 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
index 67bce8d60908..4ba52ba11dc6 100644
--- a/arch/arm/boot/dts/at91-sam9x60ek.dts
+++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
@@ -260,6 +260,7 @@ &flx5 {
 	uart1: serial@200 {
 		compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 		reg = <0x200 0x200>;
+		atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 		interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
 		dmas = <&dma0
 			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index d1181ead18e5..7a113325abb9 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -596,6 +597,7 @@ pioD: gpio@fffffa00 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -607,6 +609,7 @@ dbgu: serial@fffff200 {
 			usart0: serial@fffc0000 {
 				compatible = "atmel,at91rm9200-usart";
 				reg = <0xfffc0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -620,6 +623,7 @@ usart0: serial@fffc0000 {
 			usart1: serial@fffc4000 {
 				compatible = "atmel,at91rm9200-usart";
 				reg = <0xfffc4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -633,6 +637,7 @@ usart1: serial@fffc4000 {
 			usart2: serial@fffc8000 {
 				compatible = "atmel,at91rm9200-usart";
 				reg = <0xfffc8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -646,6 +651,7 @@ usart2: serial@fffc8000 {
 			usart3: serial@fffcc000 {
 				compatible = "atmel,at91rm9200-usart";
 				reg = <0xfffcc000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 9d9820db9482..789fe356dbf6 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -532,6 +533,7 @@ pioC: gpio@fffff800 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -543,6 +545,7 @@ dbgu: serial@fffff200 {
 			usart0: serial@fffb0000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -556,6 +559,7 @@ usart0: serial@fffb0000 {
 			usart1: serial@fffb4000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -569,6 +573,7 @@ usart1: serial@fffb4000 {
 			usart2: serial@fffb8000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -582,6 +587,7 @@ usart2: serial@fffb8000 {
 			usart3: serial@fffd0000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffd0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -595,6 +601,7 @@ usart3: serial@fffd0000 {
 			uart0: serial@fffd4000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffd4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -608,6 +615,7 @@ uart0: serial@fffd4000 {
 			uart1: serial@fffd8000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffd8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 259aca565305..ee0bd1aceb3f 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -179,6 +180,7 @@ i2c0: i2c@fffac000 {
 			usart0: serial@fffb0000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -192,6 +194,7 @@ usart0: serial@fffb0000 {
 			usart1: serial@fffb4000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -205,6 +208,7 @@ usart1: serial@fffb4000 {
 			usart2: serial@fffb8000{
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -301,6 +305,7 @@ aic: interrupt-controller@fffff000 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index c080df8c2312..3ce9ea987312 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -540,6 +541,7 @@ pioE: gpio@fffffa00 {
 			dbgu: serial@ffffee00 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xffffee00 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -551,6 +553,7 @@ dbgu: serial@ffffee00 {
 			usart0: serial@fff8c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff8c000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -564,6 +567,7 @@ usart0: serial@fff8c000 {
 			usart1: serial@fff90000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff90000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -577,6 +581,7 @@ usart1: serial@fff90000 {
 			usart2: serial@fff94000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff94000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 09794561c7ce..95f5d76234db 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -675,6 +676,7 @@ pioE: gpio@fffffa00 {
 
 			dbgu: serial@ffffee00 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				reg = <0xffffee00 0x200>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
@@ -687,6 +689,7 @@ dbgu: serial@ffffee00 {
 			usart0: serial@fff8c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff8c000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -700,6 +703,7 @@ usart0: serial@fff8c000 {
 			usart1: serial@fff90000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff90000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -713,6 +717,7 @@ usart1: serial@fff90000 {
 			usart2: serial@fff94000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff94000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -726,6 +731,7 @@ usart2: serial@fff94000 {
 			usart3: serial@fff98000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff98000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 556f35ce49e3..83114d26f10d 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -593,6 +594,7 @@ pioD: gpio@fffffa00 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -618,6 +620,7 @@ ssc0: ssc@f0010000 {
 			usart0: serial@f801c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf801c000 0x4000>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart0>;
@@ -629,6 +632,7 @@ usart0: serial@f801c000 {
 			usart1: serial@f8020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8020000 0x4000>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart1>;
@@ -640,6 +644,7 @@ usart1: serial@f8020000 {
 			usart2: serial@f8024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8024000 0x4000>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart2>;
@@ -651,6 +656,7 @@ usart2: serial@f8024000 {
 			usart3: serial@f8028000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8028000 0x4000>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart3>;
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 12c634811820..364a2ff0a763 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -175,6 +176,7 @@ i2c1: i2c@fffac000 {
 			usart0: serial@fffb0000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -188,6 +190,7 @@ usart0: serial@fffb0000 {
 			usart1: serial@fffb4000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -201,6 +204,7 @@ usart1: serial@fffb4000 {
 			usart2: serial@fffb8000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -214,6 +218,7 @@ usart2: serial@fffb8000 {
 			usart3: serial@fffbc000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffbc000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -322,6 +327,7 @@ aic: interrupt-controller@fffff000 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index ea3b11336c79..0c26c925761b 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -674,6 +675,7 @@ mmc1: mmc@f000c000 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -688,6 +690,7 @@ dbgu: serial@fffff200 {
 			usart0: serial@f801c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf801c000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart0>;
@@ -702,6 +705,7 @@ usart0: serial@f801c000 {
 			usart1: serial@f8020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8020000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart1>;
@@ -716,6 +720,7 @@ usart1: serial@f8020000 {
 			usart2: serial@f8024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8024000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart2>;
@@ -775,6 +780,7 @@ i2c2: i2c@f8018000 {
 			uart0: serial@f8040000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8040000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart0>;
@@ -786,6 +792,7 @@ uart0: serial@f8040000 {
 			uart1: serial@f8044000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8044000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart1>;
diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
index 098d3fef5c37..a47c765e1b20 100644
--- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
@@ -8,6 +8,7 @@
 
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	aliases {
@@ -44,6 +45,7 @@ pinctrl_usart3_sck: usart3_sck-0 {
 			usart3: serial@f8028000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8028000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart3>;
diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
index d3f60f6a456d..8f5477e307dd 100644
--- a/arch/arm/boot/dts/sam9x60.dtsi
+++ b/arch/arm/boot/dts/sam9x60.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/mfd/atmel-flexcom.h>
 
 / {
@@ -583,6 +584,7 @@ aic: interrupt-controller@fffff100 {
 			dbgu: serial@fffff200 {
 				compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <47 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 2c50a021aa76..14c35c12a115 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
 
 / {
@@ -441,6 +442,7 @@ pdmic: pdmic@f8018000 {
 			uart0: serial@f801c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf801c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
@@ -457,6 +459,7 @@ AT91_XDMAC_DT_PERID(35))>,
 			uart1: serial@f8020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8020000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
@@ -473,6 +476,7 @@ AT91_XDMAC_DT_PERID(37))>,
 			uart2: serial@f8024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8024000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
@@ -530,6 +534,7 @@ flx0: flexcom@f8034000 {
 				uart5: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
 					clock-names = "usart";
@@ -600,6 +605,7 @@ flx1: flexcom@f8038000 {
 				uart6: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
 					clock-names = "usart";
@@ -769,6 +775,7 @@ AT91_XDMAC_DT_PERID(8))>,
 			uart3: serial@fc008000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc008000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
@@ -785,6 +792,7 @@ AT91_XDMAC_DT_PERID(41))>,
 			uart4: serial@fc00c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc00c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 					 AT91_XDMAC_DT_PERID(43))>,
@@ -810,6 +818,7 @@ flx2: flexcom@fc010000 {
 				uart7: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
 					clock-names = "usart";
@@ -880,6 +889,7 @@ flx3: flexcom@fc014000 {
 				uart8: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 					clock-names = "usart";
@@ -951,6 +961,7 @@ flx4: flexcom@fc018000 {
 				uart9: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 					clock-names = "usart";
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 2d0935ad2225..bde8e92d60bb 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -194,6 +195,7 @@ i2c1: i2c@f0018000 {
 			usart0: serial@f001c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf001c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
 				       <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
@@ -208,6 +210,7 @@ usart0: serial@f001c000 {
 			usart1: serial@f0020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf0020000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
 				       <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
@@ -222,6 +225,7 @@ usart1: serial@f0020000 {
 			uart0: serial@f0024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf0024000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart0>;
@@ -356,6 +360,7 @@ i2c2: i2c@f801c000 {
 			usart2: serial@f8020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8020000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
 				       <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
@@ -370,6 +375,7 @@ usart2: serial@f8020000 {
 			usart3: serial@f8024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8024000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
 				       <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
@@ -464,6 +470,7 @@ ramc0: ramc@ffffea00 {
 			dbgu: serial@ffffee00 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xffffee00 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
 				       <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
index a3eaba995cf4..44d1173f2ffb 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	aliases {
@@ -39,6 +40,7 @@ pinctrl_uart1: uart1-0 {
 			uart0: serial@f0024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf0024000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart0>;
@@ -50,6 +52,7 @@ uart0: serial@f0024000 {
 			uart1: serial@f8028000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8028000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart1>;
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 1e5c01898ccf..af62157ae214 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -8,6 +8,7 @@
 
 #include <dt-bindings/clock/at91.h>
 #include <dt-bindings/dma/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
@@ -278,6 +279,7 @@ mmc0: mmc@f8000000 {
 			uart0: serial@f8004000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8004000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -437,6 +439,7 @@ sfr: sfr@f8028000 {
 			usart0: serial@f802c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf802c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -455,6 +458,7 @@ usart0: serial@f802c000 {
 			usart1: serial@f8030000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8030000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -490,6 +494,7 @@ mmc1: mmc@fc000000 {
 			uart1: serial@fc004000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc004000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -508,6 +513,7 @@ uart1: serial@fc004000 {
 			usart2: serial@fc008000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc008000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -526,6 +532,7 @@ usart2: serial@fc008000 {
 			usart3: serial@fc00c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc00c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -544,6 +551,7 @@ usart3: serial@fc00c000 {
 			usart4: serial@fc010000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc010000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -770,6 +778,7 @@ rtc@fc0686b0 {
 			dbgu: serial@fc069000 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfc069000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index 249f9c640b6c..7bd8ae8e8d38 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -14,6 +14,7 @@
 #include <dt-bindings/clock/at91.h>
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	model = "Microchip SAMA7G5 family SoC";
@@ -603,6 +604,7 @@ flx0: flexcom@e1818000 {
 			uart0: serial@200 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0x200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 				clock-names = "usart";
@@ -651,6 +653,7 @@ flx3: flexcom@e1824000 {
 			uart3: serial@200 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0x200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
 				clock-names = "usart";
@@ -694,6 +697,7 @@ flx4: flexcom@e2018000 {
 			uart4: serial@200 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0x200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
 				clock-names = "usart";
@@ -719,6 +723,7 @@ flx7: flexcom@e2024000 {
 			uart7: serial@200 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0x200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
 				clock-names = "usart";
-- 
2.34.1


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^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 03/14] ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes
@ 2022-09-13 14:21   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Add the missing required DT property `atmel,usart-mode` to the serial
nodes of Atmel/Microchip DT files.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v3:
- Nothing, this patch was not here before



 arch/arm/boot/dts/at91-sam9x60ek.dts     |  1 +
 arch/arm/boot/dts/at91rm9200.dtsi        |  6 ++++++
 arch/arm/boot/dts/at91sam9260.dtsi       |  8 ++++++++
 arch/arm/boot/dts/at91sam9261.dtsi       |  5 +++++
 arch/arm/boot/dts/at91sam9263.dtsi       |  5 +++++
 arch/arm/boot/dts/at91sam9g45.dtsi       |  6 ++++++
 arch/arm/boot/dts/at91sam9n12.dtsi       |  6 ++++++
 arch/arm/boot/dts/at91sam9rl.dtsi        |  6 ++++++
 arch/arm/boot/dts/at91sam9x5.dtsi        |  7 +++++++
 arch/arm/boot/dts/at91sam9x5_usart3.dtsi |  2 ++
 arch/arm/boot/dts/sam9x60.dtsi           |  2 ++
 arch/arm/boot/dts/sama5d2.dtsi           | 11 +++++++++++
 arch/arm/boot/dts/sama5d3.dtsi           |  7 +++++++
 arch/arm/boot/dts/sama5d3_uart.dtsi      |  3 +++
 arch/arm/boot/dts/sama5d4.dtsi           |  9 +++++++++
 arch/arm/boot/dts/sama7g5.dtsi           |  5 +++++
 16 files changed, 89 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
index 67bce8d60908..4ba52ba11dc6 100644
--- a/arch/arm/boot/dts/at91-sam9x60ek.dts
+++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
@@ -260,6 +260,7 @@ &flx5 {
 	uart1: serial@200 {
 		compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 		reg = <0x200 0x200>;
+		atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 		interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
 		dmas = <&dma0
 			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index d1181ead18e5..7a113325abb9 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -596,6 +597,7 @@ pioD: gpio@fffffa00 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -607,6 +609,7 @@ dbgu: serial@fffff200 {
 			usart0: serial@fffc0000 {
 				compatible = "atmel,at91rm9200-usart";
 				reg = <0xfffc0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -620,6 +623,7 @@ usart0: serial@fffc0000 {
 			usart1: serial@fffc4000 {
 				compatible = "atmel,at91rm9200-usart";
 				reg = <0xfffc4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -633,6 +637,7 @@ usart1: serial@fffc4000 {
 			usart2: serial@fffc8000 {
 				compatible = "atmel,at91rm9200-usart";
 				reg = <0xfffc8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -646,6 +651,7 @@ usart2: serial@fffc8000 {
 			usart3: serial@fffcc000 {
 				compatible = "atmel,at91rm9200-usart";
 				reg = <0xfffcc000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 9d9820db9482..789fe356dbf6 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -532,6 +533,7 @@ pioC: gpio@fffff800 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -543,6 +545,7 @@ dbgu: serial@fffff200 {
 			usart0: serial@fffb0000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -556,6 +559,7 @@ usart0: serial@fffb0000 {
 			usart1: serial@fffb4000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -569,6 +573,7 @@ usart1: serial@fffb4000 {
 			usart2: serial@fffb8000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -582,6 +587,7 @@ usart2: serial@fffb8000 {
 			usart3: serial@fffd0000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffd0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -595,6 +601,7 @@ usart3: serial@fffd0000 {
 			uart0: serial@fffd4000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffd4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -608,6 +615,7 @@ uart0: serial@fffd4000 {
 			uart1: serial@fffd8000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffd8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 259aca565305..ee0bd1aceb3f 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -179,6 +180,7 @@ i2c0: i2c@fffac000 {
 			usart0: serial@fffb0000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -192,6 +194,7 @@ usart0: serial@fffb0000 {
 			usart1: serial@fffb4000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -205,6 +208,7 @@ usart1: serial@fffb4000 {
 			usart2: serial@fffb8000{
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -301,6 +305,7 @@ aic: interrupt-controller@fffff000 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index c080df8c2312..3ce9ea987312 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -540,6 +541,7 @@ pioE: gpio@fffffa00 {
 			dbgu: serial@ffffee00 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xffffee00 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -551,6 +553,7 @@ dbgu: serial@ffffee00 {
 			usart0: serial@fff8c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff8c000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -564,6 +567,7 @@ usart0: serial@fff8c000 {
 			usart1: serial@fff90000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff90000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -577,6 +581,7 @@ usart1: serial@fff90000 {
 			usart2: serial@fff94000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff94000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 09794561c7ce..95f5d76234db 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -675,6 +676,7 @@ pioE: gpio@fffffa00 {
 
 			dbgu: serial@ffffee00 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				reg = <0xffffee00 0x200>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
@@ -687,6 +689,7 @@ dbgu: serial@ffffee00 {
 			usart0: serial@fff8c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff8c000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -700,6 +703,7 @@ usart0: serial@fff8c000 {
 			usart1: serial@fff90000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff90000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -713,6 +717,7 @@ usart1: serial@fff90000 {
 			usart2: serial@fff94000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff94000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -726,6 +731,7 @@ usart2: serial@fff94000 {
 			usart3: serial@fff98000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfff98000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 556f35ce49e3..83114d26f10d 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -593,6 +594,7 @@ pioD: gpio@fffffa00 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -618,6 +620,7 @@ ssc0: ssc@f0010000 {
 			usart0: serial@f801c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf801c000 0x4000>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart0>;
@@ -629,6 +632,7 @@ usart0: serial@f801c000 {
 			usart1: serial@f8020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8020000 0x4000>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart1>;
@@ -640,6 +644,7 @@ usart1: serial@f8020000 {
 			usart2: serial@f8024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8024000 0x4000>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart2>;
@@ -651,6 +656,7 @@ usart2: serial@f8024000 {
 			usart3: serial@f8028000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8028000 0x4000>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart3>;
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 12c634811820..364a2ff0a763 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -175,6 +176,7 @@ i2c1: i2c@fffac000 {
 			usart0: serial@fffb0000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb0000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -188,6 +190,7 @@ usart0: serial@fffb0000 {
 			usart1: serial@fffb4000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb4000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -201,6 +204,7 @@ usart1: serial@fffb4000 {
 			usart2: serial@fffb8000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffb8000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -214,6 +218,7 @@ usart2: serial@fffb8000 {
 			usart3: serial@fffbc000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfffbc000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 				atmel,use-dma-rx;
 				atmel,use-dma-tx;
@@ -322,6 +327,7 @@ aic: interrupt-controller@fffff000 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index ea3b11336c79..0c26c925761b 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -674,6 +675,7 @@ mmc1: mmc@f000c000 {
 			dbgu: serial@fffff200 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
@@ -688,6 +690,7 @@ dbgu: serial@fffff200 {
 			usart0: serial@f801c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf801c000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart0>;
@@ -702,6 +705,7 @@ usart0: serial@f801c000 {
 			usart1: serial@f8020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8020000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart1>;
@@ -716,6 +720,7 @@ usart1: serial@f8020000 {
 			usart2: serial@f8024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8024000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart2>;
@@ -775,6 +780,7 @@ i2c2: i2c@f8018000 {
 			uart0: serial@f8040000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8040000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart0>;
@@ -786,6 +792,7 @@ uart0: serial@f8040000 {
 			uart1: serial@f8044000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8044000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart1>;
diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
index 098d3fef5c37..a47c765e1b20 100644
--- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
@@ -8,6 +8,7 @@
 
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	aliases {
@@ -44,6 +45,7 @@ pinctrl_usart3_sck: usart3_sck-0 {
 			usart3: serial@f8028000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8028000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_usart3>;
diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
index d3f60f6a456d..8f5477e307dd 100644
--- a/arch/arm/boot/dts/sam9x60.dtsi
+++ b/arch/arm/boot/dts/sam9x60.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/mfd/atmel-flexcom.h>
 
 / {
@@ -583,6 +584,7 @@ aic: interrupt-controller@fffff100 {
 			dbgu: serial@fffff200 {
 				compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfffff200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <47 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 2c50a021aa76..14c35c12a115 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
 
 / {
@@ -441,6 +442,7 @@ pdmic: pdmic@f8018000 {
 			uart0: serial@f801c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf801c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
@@ -457,6 +459,7 @@ AT91_XDMAC_DT_PERID(35))>,
 			uart1: serial@f8020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8020000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
@@ -473,6 +476,7 @@ AT91_XDMAC_DT_PERID(37))>,
 			uart2: serial@f8024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8024000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
@@ -530,6 +534,7 @@ flx0: flexcom@f8034000 {
 				uart5: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
 					clock-names = "usart";
@@ -600,6 +605,7 @@ flx1: flexcom@f8038000 {
 				uart6: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
 					clock-names = "usart";
@@ -769,6 +775,7 @@ AT91_XDMAC_DT_PERID(8))>,
 			uart3: serial@fc008000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc008000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
@@ -785,6 +792,7 @@ AT91_XDMAC_DT_PERID(41))>,
 			uart4: serial@fc00c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc00c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 					 AT91_XDMAC_DT_PERID(43))>,
@@ -810,6 +818,7 @@ flx2: flexcom@fc010000 {
 				uart7: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
 					clock-names = "usart";
@@ -880,6 +889,7 @@ flx3: flexcom@fc014000 {
 				uart8: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 					clock-names = "usart";
@@ -951,6 +961,7 @@ flx4: flexcom@fc018000 {
 				uart9: serial@200 {
 					compatible = "atmel,at91sam9260-usart";
 					reg = <0x200 0x200>;
+					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
 					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 					clock-names = "usart";
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 2d0935ad2225..bde8e92d60bb 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	#address-cells = <1>;
@@ -194,6 +195,7 @@ i2c1: i2c@f0018000 {
 			usart0: serial@f001c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf001c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
 				       <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
@@ -208,6 +210,7 @@ usart0: serial@f001c000 {
 			usart1: serial@f0020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf0020000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
 				       <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
@@ -222,6 +225,7 @@ usart1: serial@f0020000 {
 			uart0: serial@f0024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf0024000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart0>;
@@ -356,6 +360,7 @@ i2c2: i2c@f801c000 {
 			usart2: serial@f8020000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8020000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
 				       <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
@@ -370,6 +375,7 @@ usart2: serial@f8020000 {
 			usart3: serial@f8024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8024000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
 				       <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
@@ -464,6 +470,7 @@ ramc0: ramc@ffffea00 {
 			dbgu: serial@ffffee00 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xffffee00 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
 				       <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
index a3eaba995cf4..44d1173f2ffb 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	aliases {
@@ -39,6 +40,7 @@ pinctrl_uart1: uart1-0 {
 			uart0: serial@f0024000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf0024000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart0>;
@@ -50,6 +52,7 @@ uart0: serial@f0024000 {
 			uart1: serial@f8028000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8028000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_uart1>;
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 1e5c01898ccf..af62157ae214 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -8,6 +8,7 @@
 
 #include <dt-bindings/clock/at91.h>
 #include <dt-bindings/dma/at91.h>
+#include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
@@ -278,6 +279,7 @@ mmc0: mmc@f8000000 {
 			uart0: serial@f8004000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8004000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -437,6 +439,7 @@ sfr: sfr@f8028000 {
 			usart0: serial@f802c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf802c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -455,6 +458,7 @@ usart0: serial@f802c000 {
 			usart1: serial@f8030000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xf8030000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -490,6 +494,7 @@ mmc1: mmc@fc000000 {
 			uart1: serial@fc004000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc004000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma0
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -508,6 +513,7 @@ uart1: serial@fc004000 {
 			usart2: serial@fc008000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc008000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -526,6 +532,7 @@ usart2: serial@fc008000 {
 			usart3: serial@fc00c000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc00c000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -544,6 +551,7 @@ usart3: serial@fc00c000 {
 			usart4: serial@fc010000 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0xfc010000 0x100>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
 				dmas = <&dma1
 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
@@ -770,6 +778,7 @@ rtc@fc0686b0 {
 			dbgu: serial@fc069000 {
 				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 				reg = <0xfc069000 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_dbgu>;
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index 249f9c640b6c..7bd8ae8e8d38 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -14,6 +14,7 @@
 #include <dt-bindings/clock/at91.h>
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
 	model = "Microchip SAMA7G5 family SoC";
@@ -603,6 +604,7 @@ flx0: flexcom@e1818000 {
 			uart0: serial@200 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0x200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 				clock-names = "usart";
@@ -651,6 +653,7 @@ flx3: flexcom@e1824000 {
 			uart3: serial@200 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0x200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
 				clock-names = "usart";
@@ -694,6 +697,7 @@ flx4: flexcom@e2018000 {
 			uart4: serial@200 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0x200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
 				clock-names = "usart";
@@ -719,6 +723,7 @@ flx7: flexcom@e2024000 {
 			uart7: serial@200 {
 				compatible = "atmel,at91sam9260-usart";
 				reg = <0x200 0x200>;
+				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 				interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
 				clock-names = "usart";
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 04/14] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:21   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk, Krzysztof Kozlowski

The DT nodes of the SPI IP's may contain DMA related properties so
make sure that the binding is able to properly validate those as
well by making it aware of these optional properties.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- added Acked-by tags





 .../devicetree/bindings/spi/atmel,at91rm9200-spi.yaml  | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
index d85d54024b2e..4dd973e341e6 100644
--- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
@@ -34,6 +34,16 @@ properties:
   clocks:
     maxItems: 1
 
+  dmas:
+    items:
+      - description: TX DMA Channel
+      - description: RX DMA Channel
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
   atmel,fifo-size:
     $ref: /schemas/types.yaml#/definitions/uint32
     description: |
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 04/14] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
@ 2022-09-13 14:21   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk, Krzysztof Kozlowski

The DT nodes of the SPI IP's may contain DMA related properties so
make sure that the binding is able to properly validate those as
well by making it aware of these optional properties.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- added Acked-by tags





 .../devicetree/bindings/spi/atmel,at91rm9200-spi.yaml  | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
index d85d54024b2e..4dd973e341e6 100644
--- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
@@ -34,6 +34,16 @@ properties:
   clocks:
     maxItems: 1
 
+  dmas:
+    items:
+      - description: TX DMA Channel
+      - description: RX DMA Channel
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
   atmel,fifo-size:
     $ref: /schemas/types.yaml#/definitions/uint32
     description: |
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 05/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:21   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk, Krzysztof Kozlowski

Another functionality of FLEXCOM is that of SPI. In order for
the proper validation of the SPI children nodes through the binding
to occur, the proper binding for SPI must be referenced.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---


v1 -> v2:
- use full schema paths


v2 -> v3:
- Added Reviewed-by tag, previously this was [PATCH 3]


 .../devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml       | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
index 568da7cb630c..0db0f2728b65 100644
--- a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
+++ b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
@@ -78,10 +78,9 @@ patternProperties:
       of USART bindings.
 
   "^spi@[0-9a-f]+$":
-    type: object
+    $ref: /schemas/spi/atmel,at91rm9200-spi.yaml
     description:
-      Child node describing SPI. See ../spi/spi_atmel.txt for details
-      of SPI bindings.
+      Child node describing SPI.
 
   "^i2c@[0-9a-f]+$":
     $ref: ../i2c/atmel,at91sam-i2c.yaml
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 05/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding
@ 2022-09-13 14:21   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk, Krzysztof Kozlowski

Another functionality of FLEXCOM is that of SPI. In order for
the proper validation of the SPI children nodes through the binding
to occur, the proper binding for SPI must be referenced.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---


v1 -> v2:
- use full schema paths


v2 -> v3:
- Added Reviewed-by tag, previously this was [PATCH 3]


 .../devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml       | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
index 568da7cb630c..0db0f2728b65 100644
--- a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
+++ b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
@@ -78,10 +78,9 @@ patternProperties:
       of USART bindings.
 
   "^spi@[0-9a-f]+$":
-    type: object
+    $ref: /schemas/spi/atmel,at91rm9200-spi.yaml
     description:
-      Child node describing SPI. See ../spi/spi_atmel.txt for details
-      of SPI bindings.
+      Child node describing SPI.
 
   "^i2c@[0-9a-f]+$":
     $ref: ../i2c/atmel,at91sam-i2c.yaml
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 06/14] dt-bindings: serial: atmel,at91-usart: convert to json-schema
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:21   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Convert at91 USART DT Binding for Atmel/Microchip SoCs to
json-schema format. Furthermore, move this binding to the
serial directory, since binding directories match hardware,
unlike the driver subsystems which match Linux convention.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- only do what the commit says, split the addition of other compatibles and
properties in other patches
- remove unnecessary "|"'s
- mention header in `atmel,usart-mode`'s description
- place `if:` under `allOf:`
- respect order of spi0's DT properties: compatible, then reg then the reset of properties

v2 -> v3:
- Previously [PATCH 5]
- Check value of `atmel,usart-mode` instead of the node regex
- Define all properties top level and disallow them explicitly for other type,
since additionalProperties:false conflicts with referencing other schemas
- Remove useless else if: after else:




 .../devicetree/bindings/mfd/atmel-usart.txt   |  98 ----------
 .../bindings/serial/atmel,at91-usart.yaml     | 182 ++++++++++++++++++
 2 files changed, 182 insertions(+), 98 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-usart.txt
 create mode 100644 Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml

diff --git a/Documentation/devicetree/bindings/mfd/atmel-usart.txt b/Documentation/devicetree/bindings/mfd/atmel-usart.txt
deleted file mode 100644
index a09133066aff..000000000000
--- a/Documentation/devicetree/bindings/mfd/atmel-usart.txt
+++ /dev/null
@@ -1,98 +0,0 @@
-* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
-
-Required properties for USART:
-- compatible: Should be one of the following:
-	- "atmel,at91rm9200-usart"
-	- "atmel,at91sam9260-usart"
-	- "microchip,sam9x60-usart"
-	- "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"
-	- "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"
-	- "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt
-- clock-names: tuple listing input clock names.
-	Required elements: "usart"
-- clocks: phandles to input clocks.
-
-Required properties for USART in SPI mode:
-- #size-cells      : Must be <0>
-- #address-cells   : Must be <1>
-- cs-gpios: chipselects (internal cs not supported)
-- atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h)
-
-Optional properties in serial and SPI mode:
-- dma bindings for dma transfer:
-	- dmas: DMA specifier, consisting of a phandle to DMA controller node,
-		memory peripheral interface and USART DMA channel ID, FIFO configuration.
-		The order of DMA channels is fixed. The first DMA channel must be TX
-		associated channel and the second one must be RX associated channel.
-		Refer to dma.txt and atmel-dma.txt for details.
-	- dma-names: "tx" for TX channel.
-		     "rx" for RX channel.
-		     The order of dma-names is also fixed. The first name must be "tx"
-		     and the second one must be "rx" as in the examples below.
-
-Optional properties in serial mode:
-- atmel,use-dma-rx: use of PDC or DMA for receiving data
-- atmel,use-dma-tx: use of PDC or DMA for transmitting data
-- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.
-  It will use specified PIO instead of the peripheral function pin for the USART feature.
-  If unsure, don't specify this property.
-- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
-  capable USARTs.
-- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
-
-<chip> compatible description:
-- at91rm9200:  legacy USART support
-- at91sam9260: generic USART implementation for SAM9 SoCs
-
-Example:
-- use PDC:
-	usart0: serial@fff8c000 {
-		compatible = "atmel,at91sam9260-usart";
-		reg = <0xfff8c000 0x4000>;
-		interrupts = <7>;
-		clocks = <&usart0_clk>;
-		clock-names = "usart";
-		atmel,use-dma-rx;
-		atmel,use-dma-tx;
-		rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
-		cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
-		dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
-		dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
-		dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
-		rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
-	};
-
-- use DMA:
-	usart0: serial@f001c000 {
-		compatible = "atmel,at91sam9260-usart";
-		reg = <0xf001c000 0x100>;
-		interrupts = <12 4 5>;
-		clocks = <&usart0_clk>;
-		clock-names = "usart";
-		atmel,use-dma-rx;
-		atmel,use-dma-tx;
-		dmas = <&dma0 2 0x3>,
-		       <&dma0 2 0x204>;
-		dma-names = "tx", "rx";
-		atmel,fifo-size = <32>;
-	};
-
-- SPI mode:
-	#include <dt-bindings/mfd/at91-usart.h>
-
-	spi0: spi@f001c000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "atmel,at91rm9200-usart", "atmel,at91sam9260-usart";
-		atmel,usart-mode = <AT91_USART_MODE_SPI>;
-		reg = <0xf001c000 0x100>;
-		interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
-		clocks = <&usart0_clk>;
-		clock-names = "usart";
-		dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
-		       <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
-		dma-names = "tx", "rx";
-		cs-gpios = <&pioB 3 0>;
-	};
diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
new file mode 100644
index 000000000000..bb1b5ed431f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
@@ -0,0 +1,182 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
+
+maintainers:
+  - Richard Genoud <richard.genoud@gmail.com>
+
+properties:
+  compatible:
+    oneOf:
+      - enum:
+          - atmel,at91rm9200-usart
+          - atmel,at91sam9260-usart
+          - microchip,sam9x60-usart
+      - items:
+          - const: atmel,at91rm9200-dbgu
+          - const: atmel,at91rm9200-usart
+      - items:
+          - const: atmel,at91sam9260-dbgu
+          - const: atmel,at91sam9260-usart
+      - items:
+          - const: microchip,sam9x60-dbgu
+          - const: microchip,sam9x60-usart
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clock-names:
+    const: usart
+
+  clocks:
+    maxItems: 1
+
+  dmas:
+    items:
+      - description: TX DMA Channel
+      - description: RX DMA Channel
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
+  atmel,usart-mode:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Must be either <AT91_USART_MODE_SPI> for SPI or
+      <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h).
+    enum: [ 0, 1 ]
+
+  atmel,use-dma-rx:
+    type: boolean
+    description: use of PDC or DMA for receiving data
+
+  atmel,use-dma-tx:
+    type: boolean
+    description: use of PDC or DMA for transmitting data
+
+  atmel,fifo-size:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Maximum number of data the RX and TX FIFOs can store for FIFO
+      capable USARTS.
+    enum: [ 16, 32 ]
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clock-names
+  - clocks
+  - atmel,usart-mode
+
+allOf:
+  - if:
+      properties:
+        atmel,usart-mode:
+          const: 1
+    then:
+      allOf:
+        - $ref: /schemas/spi/spi-controller.yaml#
+
+      properties:
+        atmel,use-dma-rx: false
+
+        atmel,use-dma-tx: false
+
+        atmel,fifo-size: false
+
+        "#size-cells":
+          const: 0
+
+        "#address-cells":
+          const: 1
+
+      required:
+        - "#size-cells"
+        - "#address-cells"
+
+    else:
+      allOf:
+        - $ref: /schemas/serial/serial.yaml#
+        - $ref: /schemas/serial/rs485.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/mfd/at91-usart.h>
+    #include <dt-bindings/dma/at91.h>
+
+    /* use PDC */
+    usart0: serial@fff8c000 {
+        compatible = "atmel,at91sam9260-usart";
+        reg = <0xfff8c000 0x4000>;
+        atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+        interrupts = <7>;
+        clocks = <&usart0_clk>;
+        clock-names = "usart";
+        atmel,use-dma-rx;
+        atmel,use-dma-tx;
+        rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
+        cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
+        dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
+        dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
+        dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
+        rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
+    };
+
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/mfd/at91-usart.h>
+    #include <dt-bindings/dma/at91.h>
+
+    /* use DMA */
+    usart1: serial@f001c000 {
+        compatible = "atmel,at91sam9260-usart";
+        reg = <0xf001c000 0x100>;
+        atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+        interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
+        clocks = <&usart0_clk>;
+        clock-names = "usart";
+        atmel,use-dma-rx;
+        atmel,use-dma-tx;
+        dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
+               <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+        dma-names = "tx", "rx";
+        atmel,fifo-size = <32>;
+    };
+
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/mfd/at91-usart.h>
+    #include <dt-bindings/dma/at91.h>
+
+    /* SPI mode */
+    spi0: spi@f001c000 {
+        compatible = "atmel,at91sam9260-usart";
+        reg = <0xf001c000 0x100>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        atmel,usart-mode = <AT91_USART_MODE_SPI>;
+        interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
+        clocks = <&usart0_clk>;
+        clock-names = "usart";
+        dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
+               <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+        dma-names = "tx", "rx";
+        cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;
+    };
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 06/14] dt-bindings: serial: atmel,at91-usart: convert to json-schema
@ 2022-09-13 14:21   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Convert at91 USART DT Binding for Atmel/Microchip SoCs to
json-schema format. Furthermore, move this binding to the
serial directory, since binding directories match hardware,
unlike the driver subsystems which match Linux convention.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- only do what the commit says, split the addition of other compatibles and
properties in other patches
- remove unnecessary "|"'s
- mention header in `atmel,usart-mode`'s description
- place `if:` under `allOf:`
- respect order of spi0's DT properties: compatible, then reg then the reset of properties

v2 -> v3:
- Previously [PATCH 5]
- Check value of `atmel,usart-mode` instead of the node regex
- Define all properties top level and disallow them explicitly for other type,
since additionalProperties:false conflicts with referencing other schemas
- Remove useless else if: after else:




 .../devicetree/bindings/mfd/atmel-usart.txt   |  98 ----------
 .../bindings/serial/atmel,at91-usart.yaml     | 182 ++++++++++++++++++
 2 files changed, 182 insertions(+), 98 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-usart.txt
 create mode 100644 Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml

diff --git a/Documentation/devicetree/bindings/mfd/atmel-usart.txt b/Documentation/devicetree/bindings/mfd/atmel-usart.txt
deleted file mode 100644
index a09133066aff..000000000000
--- a/Documentation/devicetree/bindings/mfd/atmel-usart.txt
+++ /dev/null
@@ -1,98 +0,0 @@
-* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
-
-Required properties for USART:
-- compatible: Should be one of the following:
-	- "atmel,at91rm9200-usart"
-	- "atmel,at91sam9260-usart"
-	- "microchip,sam9x60-usart"
-	- "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"
-	- "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"
-	- "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt
-- clock-names: tuple listing input clock names.
-	Required elements: "usart"
-- clocks: phandles to input clocks.
-
-Required properties for USART in SPI mode:
-- #size-cells      : Must be <0>
-- #address-cells   : Must be <1>
-- cs-gpios: chipselects (internal cs not supported)
-- atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h)
-
-Optional properties in serial and SPI mode:
-- dma bindings for dma transfer:
-	- dmas: DMA specifier, consisting of a phandle to DMA controller node,
-		memory peripheral interface and USART DMA channel ID, FIFO configuration.
-		The order of DMA channels is fixed. The first DMA channel must be TX
-		associated channel and the second one must be RX associated channel.
-		Refer to dma.txt and atmel-dma.txt for details.
-	- dma-names: "tx" for TX channel.
-		     "rx" for RX channel.
-		     The order of dma-names is also fixed. The first name must be "tx"
-		     and the second one must be "rx" as in the examples below.
-
-Optional properties in serial mode:
-- atmel,use-dma-rx: use of PDC or DMA for receiving data
-- atmel,use-dma-tx: use of PDC or DMA for transmitting data
-- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.
-  It will use specified PIO instead of the peripheral function pin for the USART feature.
-  If unsure, don't specify this property.
-- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
-  capable USARTs.
-- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
-
-<chip> compatible description:
-- at91rm9200:  legacy USART support
-- at91sam9260: generic USART implementation for SAM9 SoCs
-
-Example:
-- use PDC:
-	usart0: serial@fff8c000 {
-		compatible = "atmel,at91sam9260-usart";
-		reg = <0xfff8c000 0x4000>;
-		interrupts = <7>;
-		clocks = <&usart0_clk>;
-		clock-names = "usart";
-		atmel,use-dma-rx;
-		atmel,use-dma-tx;
-		rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
-		cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
-		dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
-		dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
-		dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
-		rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
-	};
-
-- use DMA:
-	usart0: serial@f001c000 {
-		compatible = "atmel,at91sam9260-usart";
-		reg = <0xf001c000 0x100>;
-		interrupts = <12 4 5>;
-		clocks = <&usart0_clk>;
-		clock-names = "usart";
-		atmel,use-dma-rx;
-		atmel,use-dma-tx;
-		dmas = <&dma0 2 0x3>,
-		       <&dma0 2 0x204>;
-		dma-names = "tx", "rx";
-		atmel,fifo-size = <32>;
-	};
-
-- SPI mode:
-	#include <dt-bindings/mfd/at91-usart.h>
-
-	spi0: spi@f001c000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "atmel,at91rm9200-usart", "atmel,at91sam9260-usart";
-		atmel,usart-mode = <AT91_USART_MODE_SPI>;
-		reg = <0xf001c000 0x100>;
-		interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
-		clocks = <&usart0_clk>;
-		clock-names = "usart";
-		dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
-		       <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
-		dma-names = "tx", "rx";
-		cs-gpios = <&pioB 3 0>;
-	};
diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
new file mode 100644
index 000000000000..bb1b5ed431f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
@@ -0,0 +1,182 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
+
+maintainers:
+  - Richard Genoud <richard.genoud@gmail.com>
+
+properties:
+  compatible:
+    oneOf:
+      - enum:
+          - atmel,at91rm9200-usart
+          - atmel,at91sam9260-usart
+          - microchip,sam9x60-usart
+      - items:
+          - const: atmel,at91rm9200-dbgu
+          - const: atmel,at91rm9200-usart
+      - items:
+          - const: atmel,at91sam9260-dbgu
+          - const: atmel,at91sam9260-usart
+      - items:
+          - const: microchip,sam9x60-dbgu
+          - const: microchip,sam9x60-usart
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clock-names:
+    const: usart
+
+  clocks:
+    maxItems: 1
+
+  dmas:
+    items:
+      - description: TX DMA Channel
+      - description: RX DMA Channel
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
+  atmel,usart-mode:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Must be either <AT91_USART_MODE_SPI> for SPI or
+      <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h).
+    enum: [ 0, 1 ]
+
+  atmel,use-dma-rx:
+    type: boolean
+    description: use of PDC or DMA for receiving data
+
+  atmel,use-dma-tx:
+    type: boolean
+    description: use of PDC or DMA for transmitting data
+
+  atmel,fifo-size:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Maximum number of data the RX and TX FIFOs can store for FIFO
+      capable USARTS.
+    enum: [ 16, 32 ]
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clock-names
+  - clocks
+  - atmel,usart-mode
+
+allOf:
+  - if:
+      properties:
+        atmel,usart-mode:
+          const: 1
+    then:
+      allOf:
+        - $ref: /schemas/spi/spi-controller.yaml#
+
+      properties:
+        atmel,use-dma-rx: false
+
+        atmel,use-dma-tx: false
+
+        atmel,fifo-size: false
+
+        "#size-cells":
+          const: 0
+
+        "#address-cells":
+          const: 1
+
+      required:
+        - "#size-cells"
+        - "#address-cells"
+
+    else:
+      allOf:
+        - $ref: /schemas/serial/serial.yaml#
+        - $ref: /schemas/serial/rs485.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/mfd/at91-usart.h>
+    #include <dt-bindings/dma/at91.h>
+
+    /* use PDC */
+    usart0: serial@fff8c000 {
+        compatible = "atmel,at91sam9260-usart";
+        reg = <0xfff8c000 0x4000>;
+        atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+        interrupts = <7>;
+        clocks = <&usart0_clk>;
+        clock-names = "usart";
+        atmel,use-dma-rx;
+        atmel,use-dma-tx;
+        rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
+        cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
+        dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
+        dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
+        dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
+        rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
+    };
+
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/mfd/at91-usart.h>
+    #include <dt-bindings/dma/at91.h>
+
+    /* use DMA */
+    usart1: serial@f001c000 {
+        compatible = "atmel,at91sam9260-usart";
+        reg = <0xf001c000 0x100>;
+        atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+        interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
+        clocks = <&usart0_clk>;
+        clock-names = "usart";
+        atmel,use-dma-rx;
+        atmel,use-dma-tx;
+        dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
+               <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+        dma-names = "tx", "rx";
+        atmel,fifo-size = <32>;
+    };
+
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/mfd/at91-usart.h>
+    #include <dt-bindings/dma/at91.h>
+
+    /* SPI mode */
+    spi0: spi@f001c000 {
+        compatible = "atmel,at91sam9260-usart";
+        reg = <0xf001c000 0x100>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        atmel,usart-mode = <AT91_USART_MODE_SPI>;
+        interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
+        clocks = <&usart0_clk>;
+        clock-names = "usart";
+        dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
+               <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
+        dma-names = "tx", "rx";
+        cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;
+    };
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 07/14] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:21   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Require SAM9260 fallback compatible for SAM9X60, because SAM9X60 is
fully compatible with SAM9260 and Linux driver requires the latter.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Use the commit message suggested by Krzysztof Kozlowski




 Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
index bb1b5ed431f7..4da642763bef 100644
--- a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
+++ b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
@@ -26,6 +26,8 @@ properties:
       - items:
           - const: microchip,sam9x60-dbgu
           - const: microchip,sam9x60-usart
+          - const: atmel,at91sam9260-dbgu
+          - const: atmel,at91sam9260-usart
 
   reg:
     maxItems: 1
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 07/14] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60
@ 2022-09-13 14:21   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:21 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Require SAM9260 fallback compatible for SAM9X60, because SAM9X60 is
fully compatible with SAM9260 and Linux driver requires the latter.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Use the commit message suggested by Krzysztof Kozlowski




 Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
index bb1b5ed431f7..4da642763bef 100644
--- a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
+++ b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
@@ -26,6 +26,8 @@ properties:
       - items:
           - const: microchip,sam9x60-dbgu
           - const: microchip,sam9x60-usart
+          - const: atmel,at91sam9260-dbgu
+          - const: atmel,at91sam9260-usart
 
   reg:
     maxItems: 1
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 08/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:22   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

FLEXCOM, among other functionalities, has the ability to offer the USART
serial communication protocol. To have the FLEXCOM binding properly
validate its USART children nodes, we must reference the correct binding.
To differentiate between the SPI of FLEXCOM and the SPI of USART in SPI
mode, use the compatible string.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing


v2 -> v3:
- Previously [PATCH 7]
- Compare devices based on the compatible instead of the clock



 .../bindings/mfd/atmel,sama5d2-flexcom.yaml      | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
index 0db0f2728b65..0467dfcf7db5 100644
--- a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
+++ b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
@@ -72,13 +72,21 @@ properties:
 
 patternProperties:
   "^serial@[0-9a-f]+$":
-    type: object
+    $ref: /schemas/serial/atmel,at91-usart.yaml
     description:
-      Child node describing USART. See atmel-usart.txt for details
-      of USART bindings.
+      Child node describing USART.
 
   "^spi@[0-9a-f]+$":
-    $ref: /schemas/spi/atmel,at91rm9200-spi.yaml
+    allOf:
+      - if:
+          properties:
+            compatible:
+              contains:
+                const: atmel,at91sam9260-usart
+        then:
+          $ref: /schemas/serial/atmel,at91-usart.yaml
+        else:
+          $ref: /schemas/spi/atmel,at91rm9200-spi.yaml
     description:
       Child node describing SPI.
 
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 08/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding
@ 2022-09-13 14:22   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

FLEXCOM, among other functionalities, has the ability to offer the USART
serial communication protocol. To have the FLEXCOM binding properly
validate its USART children nodes, we must reference the correct binding.
To differentiate between the SPI of FLEXCOM and the SPI of USART in SPI
mode, use the compatible string.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing


v2 -> v3:
- Previously [PATCH 7]
- Compare devices based on the compatible instead of the clock



 .../bindings/mfd/atmel,sama5d2-flexcom.yaml      | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
index 0db0f2728b65..0467dfcf7db5 100644
--- a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
+++ b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
@@ -72,13 +72,21 @@ properties:
 
 patternProperties:
   "^serial@[0-9a-f]+$":
-    type: object
+    $ref: /schemas/serial/atmel,at91-usart.yaml
     description:
-      Child node describing USART. See atmel-usart.txt for details
-      of USART bindings.
+      Child node describing USART.
 
   "^spi@[0-9a-f]+$":
-    $ref: /schemas/spi/atmel,at91rm9200-spi.yaml
+    allOf:
+      - if:
+          properties:
+            compatible:
+              contains:
+                const: atmel,at91sam9260-usart
+        then:
+          $ref: /schemas/serial/atmel,at91-usart.yaml
+        else:
+          $ref: /schemas/spi/atmel,at91rm9200-spi.yaml
     description:
       Child node describing SPI.
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 09/14] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:22   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

The Devicetree nodes for FLEXCOM's USART can also have an alternative
clock source for the baudrate generator (other than the peripheral
clock), namely the Generick Clock. Thus make the binding aware of
this clock that someone may place in the clock related
properties of the USART node.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Previously this was [PATCH 13]



 .../devicetree/bindings/serial/atmel,at91-usart.yaml   | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
index 4da642763bef..30b2131b5860 100644
--- a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
+++ b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
@@ -36,10 +36,16 @@ properties:
     maxItems: 1
 
   clock-names:
-    const: usart
+    minItems: 1
+    items:
+      - const: usart
+      - const: gclk
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    items:
+      - description: USART Peripheral Clock
+      - description: USART Generic Clock
 
   dmas:
     items:
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 09/14] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock
@ 2022-09-13 14:22   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

The Devicetree nodes for FLEXCOM's USART can also have an alternative
clock source for the baudrate generator (other than the peripheral
clock), namely the Generick Clock. Thus make the binding aware of
this clock that someone may place in the clock related
properties of the USART node.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Previously this was [PATCH 13]



 .../devicetree/bindings/serial/atmel,at91-usart.yaml   | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
index 4da642763bef..30b2131b5860 100644
--- a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
+++ b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
@@ -36,10 +36,16 @@ properties:
     maxItems: 1
 
   clock-names:
-    const: usart
+    minItems: 1
+    items:
+      - const: usart
+      - const: gclk
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    items:
+      - description: USART Peripheral Clock
+      - description: USART Generic Clock
 
   dmas:
     items:
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 10/14] tty: serial: atmel: Define GCLK as USART baudrate source clock
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:22   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Define the bit that represents the choice of having GCLK as a baudrate
source clock inside the USCLKS bitmask of the Mode Register of
USART IP's.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Nothing



 drivers/tty/serial/atmel_serial.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
index 0d8a0f9cc5c3..70d0611e56fd 100644
--- a/drivers/tty/serial/atmel_serial.h
+++ b/drivers/tty/serial/atmel_serial.h
@@ -49,6 +49,7 @@
 #define	ATMEL_US_USCLKS		GENMASK(5, 4)	/* Clock Selection */
 #define		ATMEL_US_USCLKS_MCK		(0 <<  4)
 #define		ATMEL_US_USCLKS_MCK_DIV8	(1 <<  4)
+#define		ATMEL_US_USCLKS_GCLK		(2 <<  4)
 #define		ATMEL_US_USCLKS_SCK		(3 <<  4)
 #define	ATMEL_US_CHRL		GENMASK(7, 6)	/* Character Length */
 #define		ATMEL_US_CHRL_5			(0 <<  6)
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 10/14] tty: serial: atmel: Define GCLK as USART baudrate source clock
@ 2022-09-13 14:22   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Define the bit that represents the choice of having GCLK as a baudrate
source clock inside the USCLKS bitmask of the Mode Register of
USART IP's.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before


v2 -> v3:
- Nothing



 drivers/tty/serial/atmel_serial.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
index 0d8a0f9cc5c3..70d0611e56fd 100644
--- a/drivers/tty/serial/atmel_serial.h
+++ b/drivers/tty/serial/atmel_serial.h
@@ -49,6 +49,7 @@
 #define	ATMEL_US_USCLKS		GENMASK(5, 4)	/* Clock Selection */
 #define		ATMEL_US_USCLKS_MCK		(0 <<  4)
 #define		ATMEL_US_USCLKS_MCK_DIV8	(1 <<  4)
+#define		ATMEL_US_USCLKS_GCLK		(2 <<  4)
 #define		ATMEL_US_USCLKS_SCK		(3 <<  4)
 #define	ATMEL_US_CHRL		GENMASK(7, 6)	/* Character Length */
 #define		ATMEL_US_CHRL_5			(0 <<  6)
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 11/14] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:22   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Add definitions for the Baud Rate Source Clock bitmask of the
Mode Register of UART IP's and its bitfields.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before



v2 -> v3:
- Previously this was [PATCH 11]


 drivers/tty/serial/atmel_serial.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
index 70d0611e56fd..ed64035ba6c3 100644
--- a/drivers/tty/serial/atmel_serial.h
+++ b/drivers/tty/serial/atmel_serial.h
@@ -68,6 +68,9 @@
 #define		ATMEL_US_NBSTOP_1		(0 << 12)
 #define		ATMEL_US_NBSTOP_1_5		(1 << 12)
 #define		ATMEL_US_NBSTOP_2		(2 << 12)
+#define	ATMEL_UA_BRSRCCK	GENMASK(13, 12)	/* Clock Selection for UART */
+#define		ATMEL_UA_BRSRCCK_PERIPH_CLK	(0 << 12)
+#define		ATMEL_UA_BRSRCCK_GCLK		(1 << 12)
 #define	ATMEL_US_CHMODE		GENMASK(15, 14)	/* Channel Mode */
 #define		ATMEL_US_CHMODE_NORMAL		(0 << 14)
 #define		ATMEL_US_CHMODE_ECHO		(1 << 14)
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 11/14] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register
@ 2022-09-13 14:22   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Add definitions for the Baud Rate Source Clock bitmask of the
Mode Register of UART IP's and its bitfields.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before



v2 -> v3:
- Previously this was [PATCH 11]


 drivers/tty/serial/atmel_serial.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
index 70d0611e56fd..ed64035ba6c3 100644
--- a/drivers/tty/serial/atmel_serial.h
+++ b/drivers/tty/serial/atmel_serial.h
@@ -68,6 +68,9 @@
 #define		ATMEL_US_NBSTOP_1		(0 << 12)
 #define		ATMEL_US_NBSTOP_1_5		(1 << 12)
 #define		ATMEL_US_NBSTOP_2		(2 << 12)
+#define	ATMEL_UA_BRSRCCK	GENMASK(13, 12)	/* Clock Selection for UART */
+#define		ATMEL_UA_BRSRCCK_PERIPH_CLK	(0 << 12)
+#define		ATMEL_UA_BRSRCCK_GCLK		(1 << 12)
 #define	ATMEL_US_CHMODE		GENMASK(15, 14)	/* Channel Mode */
 #define		ATMEL_US_CHMODE_NORMAL		(0 << 14)
 #define		ATMEL_US_CHMODE_ECHO		(1 << 14)
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:22   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Make sure that the driver only divides the clock divisor if the
IP handled at that point is USART, since UART IP's do not support
implicit peripheral clock division. Instead, in the case of UART,
go with the highest possible clock divisor.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before and is mainly meant as both cleanup
and as a way to introduce a new field into struct atmel_uart_port that will be
used by the last patch to diferentiate between USART and UART regarding the
location of the Baudrate Clock Source bitmask.



v2 -> v3:
- Use ATMEL_US_CD instead of 65535
- Previously [PATCH 10]




 drivers/tty/serial/atmel_serial.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index ab4a9dfae07d..ad7483230090 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -150,6 +150,7 @@ struct atmel_uart_port {
 	u32			rts_low;
 	bool			ms_irq_enabled;
 	u32			rtor;	/* address of receiver timeout register if it exists */
+	bool			is_usart;
 	bool			has_frac_baudrate;
 	bool			has_hw_timer;
 	struct timer_list	uart_timer;
@@ -1825,6 +1826,7 @@ static void atmel_get_ip_name(struct uart_port *port)
 	 */
 	atmel_port->has_frac_baudrate = false;
 	atmel_port->has_hw_timer = false;
+	atmel_port->is_usart = false;
 
 	if (name == new_uart) {
 		dev_dbg(port->dev, "Uart with hw timer");
@@ -1834,6 +1836,7 @@ static void atmel_get_ip_name(struct uart_port *port)
 		dev_dbg(port->dev, "Usart\n");
 		atmel_port->has_frac_baudrate = true;
 		atmel_port->has_hw_timer = true;
+		atmel_port->is_usart = true;
 		atmel_port->rtor = ATMEL_US_RTOR;
 		version = atmel_uart_readl(port, ATMEL_US_VERSION);
 		switch (version) {
@@ -1863,6 +1866,7 @@ static void atmel_get_ip_name(struct uart_port *port)
 			dev_dbg(port->dev, "This version is usart\n");
 			atmel_port->has_frac_baudrate = true;
 			atmel_port->has_hw_timer = true;
+			atmel_port->is_usart = true;
 			atmel_port->rtor = ATMEL_US_RTOR;
 			break;
 		case 0x203:
@@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port,
 		cd = uart_get_divisor(port, baud);
 	}
 
-	if (cd > 65535) {	/* BRGR is 16-bit, so switch to slower clock */
+	/*
+	 * If the current value of the Clock Divisor surpasses the 16 bit
+	 * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral
+	 * Clock implicitly divided by 8.
+	 * If the IP is UART however, keep the highest possible value for
+	 * the CD and avoid needless division of CD, since UART IP's do not
+	 * support implicit division of the Peripheral Clock.
+	 */
+	if (atmel_port->is_usart && cd > ATMEL_US_CD) {
 		cd /= 8;
 		mode |= ATMEL_US_USCLKS_MCK_DIV8;
+	} else {
+		cd &= ATMEL_US_CD;
 	}
+
 	quot = cd | fp << ATMEL_US_FP_OFFSET;
 
 	if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
@ 2022-09-13 14:22   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Make sure that the driver only divides the clock divisor if the
IP handled at that point is USART, since UART IP's do not support
implicit peripheral clock division. Instead, in the case of UART,
go with the highest possible clock divisor.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before and is mainly meant as both cleanup
and as a way to introduce a new field into struct atmel_uart_port that will be
used by the last patch to diferentiate between USART and UART regarding the
location of the Baudrate Clock Source bitmask.



v2 -> v3:
- Use ATMEL_US_CD instead of 65535
- Previously [PATCH 10]




 drivers/tty/serial/atmel_serial.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index ab4a9dfae07d..ad7483230090 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -150,6 +150,7 @@ struct atmel_uart_port {
 	u32			rts_low;
 	bool			ms_irq_enabled;
 	u32			rtor;	/* address of receiver timeout register if it exists */
+	bool			is_usart;
 	bool			has_frac_baudrate;
 	bool			has_hw_timer;
 	struct timer_list	uart_timer;
@@ -1825,6 +1826,7 @@ static void atmel_get_ip_name(struct uart_port *port)
 	 */
 	atmel_port->has_frac_baudrate = false;
 	atmel_port->has_hw_timer = false;
+	atmel_port->is_usart = false;
 
 	if (name == new_uart) {
 		dev_dbg(port->dev, "Uart with hw timer");
@@ -1834,6 +1836,7 @@ static void atmel_get_ip_name(struct uart_port *port)
 		dev_dbg(port->dev, "Usart\n");
 		atmel_port->has_frac_baudrate = true;
 		atmel_port->has_hw_timer = true;
+		atmel_port->is_usart = true;
 		atmel_port->rtor = ATMEL_US_RTOR;
 		version = atmel_uart_readl(port, ATMEL_US_VERSION);
 		switch (version) {
@@ -1863,6 +1866,7 @@ static void atmel_get_ip_name(struct uart_port *port)
 			dev_dbg(port->dev, "This version is usart\n");
 			atmel_port->has_frac_baudrate = true;
 			atmel_port->has_hw_timer = true;
+			atmel_port->is_usart = true;
 			atmel_port->rtor = ATMEL_US_RTOR;
 			break;
 		case 0x203:
@@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port,
 		cd = uart_get_divisor(port, baud);
 	}
 
-	if (cd > 65535) {	/* BRGR is 16-bit, so switch to slower clock */
+	/*
+	 * If the current value of the Clock Divisor surpasses the 16 bit
+	 * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral
+	 * Clock implicitly divided by 8.
+	 * If the IP is UART however, keep the highest possible value for
+	 * the CD and avoid needless division of CD, since UART IP's do not
+	 * support implicit division of the Peripheral Clock.
+	 */
+	if (atmel_port->is_usart && cd > ATMEL_US_CD) {
 		cd /= 8;
 		mode |= ATMEL_US_USCLKS_MCK_DIV8;
+	} else {
+		cd &= ATMEL_US_CD;
 	}
+
 	quot = cd | fp << ATMEL_US_FP_OFFSET;
 
 	if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 13/14] clk: at91: sama5d2: Add Generic Clocks for UART/USART
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:22   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Add the generic clocks for UART/USART in the sama5d2 driver to allow them
to be registered in the Common Clock Framework.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---


v1 -> v2:
- Added R-b tag


v2 -> v3:
- Nothing


 drivers/clk/at91/sama5d2.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index cfd0f5e23b99..84156dc52bff 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -120,6 +120,16 @@ static const struct {
 	struct clk_range r;
 	int chg_pid;
 } sama5d2_gck[] = {
+	{ .n = "flx0_gclk",   .id = 19, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "flx1_gclk",   .id = 20, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "flx2_gclk",   .id = 21, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "flx3_gclk",   .id = 22, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "flx4_gclk",   .id = 23, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart0_gclk",  .id = 24, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart1_gclk",  .id = 25, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart2_gclk",  .id = 26, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart3_gclk",  .id = 27, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart4_gclk",  .id = 28, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
 	{ .n = "sdmmc0_gclk", .id = 31, .chg_pid = INT_MIN, },
 	{ .n = "sdmmc1_gclk", .id = 32, .chg_pid = INT_MIN, },
 	{ .n = "tcb0_gclk",   .id = 35, .chg_pid = INT_MIN, .r = { .min = 0, .max = 83000000 }, },
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 13/14] clk: at91: sama5d2: Add Generic Clocks for UART/USART
@ 2022-09-13 14:22   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Add the generic clocks for UART/USART in the sama5d2 driver to allow them
to be registered in the Common Clock Framework.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---


v1 -> v2:
- Added R-b tag


v2 -> v3:
- Nothing


 drivers/clk/at91/sama5d2.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index cfd0f5e23b99..84156dc52bff 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -120,6 +120,16 @@ static const struct {
 	struct clk_range r;
 	int chg_pid;
 } sama5d2_gck[] = {
+	{ .n = "flx0_gclk",   .id = 19, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "flx1_gclk",   .id = 20, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "flx2_gclk",   .id = 21, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "flx3_gclk",   .id = 22, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "flx4_gclk",   .id = 23, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart0_gclk",  .id = 24, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart1_gclk",  .id = 25, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart2_gclk",  .id = 26, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart3_gclk",  .id = 27, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+	{ .n = "uart4_gclk",  .id = 28, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
 	{ .n = "sdmmc0_gclk", .id = 31, .chg_pid = INT_MIN, },
 	{ .n = "sdmmc1_gclk", .id = 32, .chg_pid = INT_MIN, },
 	{ .n = "tcb0_gclk",   .id = 35, .chg_pid = INT_MIN, .r = { .min = 0, .max = 83000000 }, },
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 14/14] tty: serial: atmel: Make the driver aware of the existence of GCLK
  2022-09-13 14:21 ` Sergiu Moga
@ 2022-09-13 14:22   ` Sergiu Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Previously, the atmel serial driver did not take into account the
possibility of using the more customizable generic clock as its
baudrate generator. Unless there is a Fractional Part available to
increase accuracy, there is a high chance that we may be able to
generate a baudrate closer to the desired one by using the GCLK as the
clock source. Now, depending on the error rate between
the desired baudrate and the actual baudrate, the serial driver will
fallback on the generic clock. The generic clock must be provided
in the DT node of the serial that may need a more flexible clock source.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- take into account the different placement of the baudrate clock source
into the IP's Mode Register (USART vs UART)
- don't check for atmel_port->gclk != NULL
- use clk_round_rate instead of clk_set_rate + clk_get_rate
- remove clk_disable_unprepare from the end of the probe method



v2 -> v3:
- add `gclk_fail` goto
- replace `goto err` with `goto err_clk_disable_unprepare;`



 drivers/tty/serial/atmel_serial.c | 59 ++++++++++++++++++++++++++++++-
 1 file changed, 58 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index ad7483230090..920548c55c25 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/clk.h>
+#include <linux/clk-provider.h>
 #include <linux/console.h>
 #include <linux/sysrq.h>
 #include <linux/tty_flip.h>
@@ -110,6 +111,7 @@ struct atmel_uart_char {
 struct atmel_uart_port {
 	struct uart_port	uart;		/* uart */
 	struct clk		*clk;		/* uart clock */
+	struct clk		*gclk;		/* uart generic clock */
 	int			may_wakeup;	/* cached value of device_may_wakeup for times we need to disable it */
 	u32			backup_imr;	/* IMR saved during suspend */
 	int			break_active;	/* break being received */
@@ -229,6 +231,11 @@ static inline int atmel_uart_is_half_duplex(struct uart_port *port)
 		(port->iso7816.flags & SER_ISO7816_ENABLED);
 }
 
+static inline int atmel_error_rate(int desired_value, int actual_value)
+{
+	return 100 - (desired_value * 100) / actual_value;
+}
+
 #ifdef CONFIG_SERIAL_ATMEL_PDC
 static bool atmel_use_pdc_rx(struct uart_port *port)
 {
@@ -2117,6 +2124,8 @@ static void atmel_serial_pm(struct uart_port *port, unsigned int state,
 		 * This is called on uart_close() or a suspend event.
 		 */
 		clk_disable_unprepare(atmel_port->clk);
+		if (__clk_is_enabled(atmel_port->gclk))
+			clk_disable_unprepare(atmel_port->gclk);
 		break;
 	default:
 		dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
@@ -2132,7 +2141,9 @@ static void atmel_set_termios(struct uart_port *port,
 {
 	struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
 	unsigned long flags;
-	unsigned int old_mode, mode, imr, quot, baud, div, cd, fp = 0;
+	unsigned int old_mode, mode, imr, quot, div, cd, fp = 0;
+	unsigned int baud, actual_baud, gclk_rate;
+	int ret;
 
 	/* save the current mode register */
 	mode = old_mode = atmel_uart_readl(port, ATMEL_US_MR);
@@ -2302,6 +2313,46 @@ static void atmel_set_termios(struct uart_port *port,
 		cd &= ATMEL_US_CD;
 	}
 
+	/*
+	 * If there is no Fractional Part, there is a high chance that
+	 * we may be able to generate a baudrate closer to the desired one
+	 * if we use the GCLK as the clock source driving the baudrate
+	 * generator.
+	 */
+	if (!atmel_port->has_frac_baudrate) {
+		if (__clk_is_enabled(atmel_port->gclk))
+			clk_disable_unprepare(atmel_port->gclk);
+		gclk_rate = clk_round_rate(atmel_port->gclk, 16 * baud);
+		actual_baud = clk_get_rate(atmel_port->clk) / (16 * cd);
+		if (gclk_rate && abs(atmel_error_rate(baud, actual_baud)) >
+		    abs(atmel_error_rate(baud, gclk_rate / 16))) {
+			clk_set_rate(atmel_port->gclk, 16 * baud);
+			ret = clk_prepare_enable(atmel_port->gclk);
+			if (ret)
+				goto gclk_fail;
+
+			if (atmel_port->is_usart) {
+				mode &= ~ATMEL_US_USCLKS;
+				mode |= ATMEL_US_USCLKS_GCLK;
+			} else {
+				mode &= ~ATMEL_UA_BRSRCCK;
+				mode |= ATMEL_UA_BRSRCCK_GCLK;
+			}
+
+			/*
+			 * Set the Clock Divisor for GCLK to 1.
+			 * Since we were able to generate the smallest
+			 * multiple of the desired baudrate times 16,
+			 * then we surely can generate a bigger multiple
+			 * with the exact error rate for an equally increased
+			 * CD. Thus no need to take into account
+			 * a higher value for CD.
+			 */
+			cd = 1;
+		}
+	}
+
+gclk_fail:
 	quot = cd | fp << ATMEL_US_FP_OFFSET;
 
 	if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
@@ -2897,6 +2948,12 @@ static int atmel_serial_probe(struct platform_device *pdev)
 	if (ret)
 		goto err;
 
+	atmel_port->gclk = devm_clk_get_optional(&pdev->dev, "gclk");
+	if (IS_ERR(atmel_port->gclk)) {
+		ret = PTR_ERR(atmel_port->gclk);
+		goto err_clk_disable_unprepare;
+	}
+
 	ret = atmel_init_port(atmel_port, pdev);
 	if (ret)
 		goto err_clk_disable_unprepare;
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 52+ messages in thread

* [PATCH v3 14/14] tty: serial: atmel: Make the driver aware of the existence of GCLK
@ 2022-09-13 14:22   ` Sergiu Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu Moga @ 2022-09-13 14:22 UTC (permalink / raw)
  To: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	sergiu.moga, admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

Previously, the atmel serial driver did not take into account the
possibility of using the more customizable generic clock as its
baudrate generator. Unless there is a Fractional Part available to
increase accuracy, there is a high chance that we may be able to
generate a baudrate closer to the desired one by using the GCLK as the
clock source. Now, depending on the error rate between
the desired baudrate and the actual baudrate, the serial driver will
fallback on the generic clock. The generic clock must be provided
in the DT node of the serial that may need a more flexible clock source.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- take into account the different placement of the baudrate clock source
into the IP's Mode Register (USART vs UART)
- don't check for atmel_port->gclk != NULL
- use clk_round_rate instead of clk_set_rate + clk_get_rate
- remove clk_disable_unprepare from the end of the probe method



v2 -> v3:
- add `gclk_fail` goto
- replace `goto err` with `goto err_clk_disable_unprepare;`



 drivers/tty/serial/atmel_serial.c | 59 ++++++++++++++++++++++++++++++-
 1 file changed, 58 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index ad7483230090..920548c55c25 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/clk.h>
+#include <linux/clk-provider.h>
 #include <linux/console.h>
 #include <linux/sysrq.h>
 #include <linux/tty_flip.h>
@@ -110,6 +111,7 @@ struct atmel_uart_char {
 struct atmel_uart_port {
 	struct uart_port	uart;		/* uart */
 	struct clk		*clk;		/* uart clock */
+	struct clk		*gclk;		/* uart generic clock */
 	int			may_wakeup;	/* cached value of device_may_wakeup for times we need to disable it */
 	u32			backup_imr;	/* IMR saved during suspend */
 	int			break_active;	/* break being received */
@@ -229,6 +231,11 @@ static inline int atmel_uart_is_half_duplex(struct uart_port *port)
 		(port->iso7816.flags & SER_ISO7816_ENABLED);
 }
 
+static inline int atmel_error_rate(int desired_value, int actual_value)
+{
+	return 100 - (desired_value * 100) / actual_value;
+}
+
 #ifdef CONFIG_SERIAL_ATMEL_PDC
 static bool atmel_use_pdc_rx(struct uart_port *port)
 {
@@ -2117,6 +2124,8 @@ static void atmel_serial_pm(struct uart_port *port, unsigned int state,
 		 * This is called on uart_close() or a suspend event.
 		 */
 		clk_disable_unprepare(atmel_port->clk);
+		if (__clk_is_enabled(atmel_port->gclk))
+			clk_disable_unprepare(atmel_port->gclk);
 		break;
 	default:
 		dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
@@ -2132,7 +2141,9 @@ static void atmel_set_termios(struct uart_port *port,
 {
 	struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
 	unsigned long flags;
-	unsigned int old_mode, mode, imr, quot, baud, div, cd, fp = 0;
+	unsigned int old_mode, mode, imr, quot, div, cd, fp = 0;
+	unsigned int baud, actual_baud, gclk_rate;
+	int ret;
 
 	/* save the current mode register */
 	mode = old_mode = atmel_uart_readl(port, ATMEL_US_MR);
@@ -2302,6 +2313,46 @@ static void atmel_set_termios(struct uart_port *port,
 		cd &= ATMEL_US_CD;
 	}
 
+	/*
+	 * If there is no Fractional Part, there is a high chance that
+	 * we may be able to generate a baudrate closer to the desired one
+	 * if we use the GCLK as the clock source driving the baudrate
+	 * generator.
+	 */
+	if (!atmel_port->has_frac_baudrate) {
+		if (__clk_is_enabled(atmel_port->gclk))
+			clk_disable_unprepare(atmel_port->gclk);
+		gclk_rate = clk_round_rate(atmel_port->gclk, 16 * baud);
+		actual_baud = clk_get_rate(atmel_port->clk) / (16 * cd);
+		if (gclk_rate && abs(atmel_error_rate(baud, actual_baud)) >
+		    abs(atmel_error_rate(baud, gclk_rate / 16))) {
+			clk_set_rate(atmel_port->gclk, 16 * baud);
+			ret = clk_prepare_enable(atmel_port->gclk);
+			if (ret)
+				goto gclk_fail;
+
+			if (atmel_port->is_usart) {
+				mode &= ~ATMEL_US_USCLKS;
+				mode |= ATMEL_US_USCLKS_GCLK;
+			} else {
+				mode &= ~ATMEL_UA_BRSRCCK;
+				mode |= ATMEL_UA_BRSRCCK_GCLK;
+			}
+
+			/*
+			 * Set the Clock Divisor for GCLK to 1.
+			 * Since we were able to generate the smallest
+			 * multiple of the desired baudrate times 16,
+			 * then we surely can generate a bigger multiple
+			 * with the exact error rate for an equally increased
+			 * CD. Thus no need to take into account
+			 * a higher value for CD.
+			 */
+			cd = 1;
+		}
+	}
+
+gclk_fail:
 	quot = cd | fp << ATMEL_US_FP_OFFSET;
 
 	if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
@@ -2897,6 +2948,12 @@ static int atmel_serial_probe(struct platform_device *pdev)
 	if (ret)
 		goto err;
 
+	atmel_port->gclk = devm_clk_get_optional(&pdev->dev, "gclk");
+	if (IS_ERR(atmel_port->gclk)) {
+		ret = PTR_ERR(atmel_port->gclk);
+		goto err_clk_disable_unprepare;
+	}
+
 	ret = atmel_init_port(atmel_port, pdev);
 	if (ret)
 		goto err_clk_disable_unprepare;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 06/14] dt-bindings: serial: atmel,at91-usart: convert to json-schema
  2022-09-13 14:21   ` Sergiu Moga
@ 2022-09-13 14:28     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 52+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 14:28 UTC (permalink / raw)
  To: Sergiu Moga, lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13/09/2022 16:21, Sergiu Moga wrote:
> Convert at91 USART DT Binding for Atmel/Microchip SoCs to
> json-schema format. Furthermore, move this binding to the
> serial directory, since binding directories match hardware,
> unlike the driver subsystems which match Linux convention.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> ---
> 
> 
> v1 -> v2:
> - only do what the commit says, split the addition of other compatibles and
> properties in other patches
> - remove unnecessary "|"'s
> - mention header in `atmel,usart-mode`'s description
> - place `if:` under `allOf:`
> - respect order of spi0's DT properties: compatible, then reg then the reset of properties
> 
> v2 -> v3:
> - Previously [PATCH 5]
> - Check value of `atmel,usart-mode` instead of the node regex
> - Define all properties top level and disallow them explicitly for other type,
> since additionalProperties:false conflicts with referencing other schemas
> - Remove useless else if: after else:
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 06/14] dt-bindings: serial: atmel,at91-usart: convert to json-schema
@ 2022-09-13 14:28     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 52+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 14:28 UTC (permalink / raw)
  To: Sergiu Moga, lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13/09/2022 16:21, Sergiu Moga wrote:
> Convert at91 USART DT Binding for Atmel/Microchip SoCs to
> json-schema format. Furthermore, move this binding to the
> serial directory, since binding directories match hardware,
> unlike the driver subsystems which match Linux convention.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> ---
> 
> 
> v1 -> v2:
> - only do what the commit says, split the addition of other compatibles and
> properties in other patches
> - remove unnecessary "|"'s
> - mention header in `atmel,usart-mode`'s description
> - place `if:` under `allOf:`
> - respect order of spi0's DT properties: compatible, then reg then the reset of properties
> 
> v2 -> v3:
> - Previously [PATCH 5]
> - Check value of `atmel,usart-mode` instead of the node regex
> - Define all properties top level and disallow them explicitly for other type,
> since additionalProperties:false conflicts with referencing other schemas
> - Remove useless else if: after else:
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 07/14] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60
  2022-09-13 14:21   ` Sergiu Moga
@ 2022-09-13 14:28     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 52+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 14:28 UTC (permalink / raw)
  To: Sergiu Moga, lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13/09/2022 16:21, Sergiu Moga wrote:
> Require SAM9260 fallback compatible for SAM9X60, because SAM9X60 is
> fully compatible with SAM9260 and Linux driver requires the latter.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> ---
> 


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 07/14] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60
@ 2022-09-13 14:28     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 52+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 14:28 UTC (permalink / raw)
  To: Sergiu Moga, lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13/09/2022 16:21, Sergiu Moga wrote:
> Require SAM9260 fallback compatible for SAM9X60, because SAM9X60 is
> fully compatible with SAM9260 and Linux driver requires the latter.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> ---
> 


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 08/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding
  2022-09-13 14:22   ` Sergiu Moga
@ 2022-09-13 14:29     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 52+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 14:29 UTC (permalink / raw)
  To: Sergiu Moga, lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13/09/2022 16:22, Sergiu Moga wrote:
> FLEXCOM, among other functionalities, has the ability to offer the USART
> serial communication protocol. To have the FLEXCOM binding properly
> validate its USART children nodes, we must reference the correct binding.
> To differentiate between the SPI of FLEXCOM and the SPI of USART in SPI
> mode, use the compatible string.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 08/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding
@ 2022-09-13 14:29     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 52+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 14:29 UTC (permalink / raw)
  To: Sergiu Moga, lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13/09/2022 16:22, Sergiu Moga wrote:
> FLEXCOM, among other functionalities, has the ability to offer the USART
> serial communication protocol. To have the FLEXCOM binding properly
> validate its USART children nodes, we must reference the correct binding.
> To differentiate between the SPI of FLEXCOM and the SPI of USART in SPI
> mode, use the compatible string.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 09/14] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock
  2022-09-13 14:22   ` Sergiu Moga
@ 2022-09-13 14:29     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 52+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 14:29 UTC (permalink / raw)
  To: Sergiu Moga, lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13/09/2022 16:22, Sergiu Moga wrote:
> The Devicetree nodes for FLEXCOM's USART can also have an alternative
> clock source for the baudrate generator (other than the peripheral
> clock), namely the Generick Clock. Thus make the binding aware of
> this clock that someone may place in the clock related
> properties of the USART node.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 09/14] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock
@ 2022-09-13 14:29     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 52+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 14:29 UTC (permalink / raw)
  To: Sergiu Moga, lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	admin, kavyasree.kotagiri, tudor.ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13/09/2022 16:22, Sergiu Moga wrote:
> The Devicetree nodes for FLEXCOM's USART can also have an alternative
> clock source for the baudrate generator (other than the peripheral
> clock), namely the Generick Clock. Thus make the binding aware of
> this clock that someone may place in the clock related
> properties of the USART node.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
  2022-09-13 14:22   ` Sergiu Moga
@ 2022-09-14 11:01     ` Ilpo Järvinen
  -1 siblings, 0 replies; 52+ messages in thread
From: Ilpo Järvinen @ 2022-09-14 11:01 UTC (permalink / raw)
  To: Sergiu Moga
  Cc: lee, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
	alexandre.belloni, claudiu.beznea, radu_nicolae.pirea,
	richard.genoud, Greg Kroah-Hartman, broonie, mturquette, sboyd,
	Jiri Slaby, admin, kavyasree.kotagiri, tudor.ambarus, devicetree,
	linux-arm-kernel, LKML, linux-spi, linux-serial, linux-clk

On Tue, 13 Sep 2022, Sergiu Moga wrote:

> Make sure that the driver only divides the clock divisor if the
> IP handled at that point is USART, since UART IP's do not support
> implicit peripheral clock division. Instead, in the case of UART,
> go with the highest possible clock divisor.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before and is mainly meant as both cleanup
> and as a way to introduce a new field into struct atmel_uart_port that will be
> used by the last patch to diferentiate between USART and UART regarding the
> location of the Baudrate Clock Source bitmask.
> 
> 
> 
> v2 -> v3:
> - Use ATMEL_US_CD instead of 65535
> - Previously [PATCH 10]


> @@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port,
>  		cd = uart_get_divisor(port, baud);
>  	}
>  
> -	if (cd > 65535) {	/* BRGR is 16-bit, so switch to slower clock */
> +	/*
> +	 * If the current value of the Clock Divisor surpasses the 16 bit
> +	 * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral
> +	 * Clock implicitly divided by 8.
> +	 * If the IP is UART however, keep the highest possible value for
> +	 * the CD and avoid needless division of CD, since UART IP's do not
> +	 * support implicit division of the Peripheral Clock.
> +	 */
> +	if (atmel_port->is_usart && cd > ATMEL_US_CD) {
>  		cd /= 8;
>  		mode |= ATMEL_US_USCLKS_MCK_DIV8;
> +	} else {
> +		cd &= ATMEL_US_CD;

Now that I read the above comment with more thought, would:
		cd = min(cd, ATMEL_US_CD);
be more appropriate here if "the highest possible value" is sought for?


-- 
 i.


^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
@ 2022-09-14 11:01     ` Ilpo Järvinen
  0 siblings, 0 replies; 52+ messages in thread
From: Ilpo Järvinen @ 2022-09-14 11:01 UTC (permalink / raw)
  To: Sergiu Moga
  Cc: alexandre.belloni, mturquette, LKML, admin,
	krzysztof.kozlowski+dt, Jiri Slaby, linux-clk, lee, linux-serial,
	devicetree, tudor.ambarus, radu_nicolae.pirea, robh+dt,
	linux-arm-kernel, richard.genoud, Greg Kroah-Hartman, linux-spi,
	sboyd, broonie, kavyasree.kotagiri, claudiu.beznea

On Tue, 13 Sep 2022, Sergiu Moga wrote:

> Make sure that the driver only divides the clock divisor if the
> IP handled at that point is USART, since UART IP's do not support
> implicit peripheral clock division. Instead, in the case of UART,
> go with the highest possible clock divisor.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before and is mainly meant as both cleanup
> and as a way to introduce a new field into struct atmel_uart_port that will be
> used by the last patch to diferentiate between USART and UART regarding the
> location of the Baudrate Clock Source bitmask.
> 
> 
> 
> v2 -> v3:
> - Use ATMEL_US_CD instead of 65535
> - Previously [PATCH 10]


> @@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port,
>  		cd = uart_get_divisor(port, baud);
>  	}
>  
> -	if (cd > 65535) {	/* BRGR is 16-bit, so switch to slower clock */
> +	/*
> +	 * If the current value of the Clock Divisor surpasses the 16 bit
> +	 * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral
> +	 * Clock implicitly divided by 8.
> +	 * If the IP is UART however, keep the highest possible value for
> +	 * the CD and avoid needless division of CD, since UART IP's do not
> +	 * support implicit division of the Peripheral Clock.
> +	 */
> +	if (atmel_port->is_usart && cd > ATMEL_US_CD) {
>  		cd /= 8;
>  		mode |= ATMEL_US_USCLKS_MCK_DIV8;
> +	} else {
> +		cd &= ATMEL_US_CD;

Now that I read the above comment with more thought, would:
		cd = min(cd, ATMEL_US_CD);
be more appropriate here if "the highest possible value" is sought for?


-- 
 i.


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
  2022-09-14 11:01     ` Ilpo Järvinen
@ 2022-09-14 12:17       ` Sergiu.Moga
  -1 siblings, 0 replies; 52+ messages in thread
From: Sergiu.Moga @ 2022-09-14 12:17 UTC (permalink / raw)
  To: ilpo.jarvinen
  Cc: lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, Claudiu.Beznea, radu_nicolae.pirea,
	richard.genoud, gregkh, broonie, mturquette, sboyd, jirislaby,
	admin, Kavyasree.Kotagiri, Tudor.Ambarus, devicetree,
	linux-arm-kernel, linux-kernel, linux-spi, linux-serial,
	linux-clk

On 14.09.2022 14:01, Ilpo Järvinen wrote:
> On Tue, 13 Sep 2022, Sergiu Moga wrote:
> 
>> Make sure that the driver only divides the clock divisor if the
>> IP handled at that point is USART, since UART IP's do not support
>> implicit peripheral clock division. Instead, in the case of UART,
>> go with the highest possible clock divisor.
>>
>> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
>> ---
>>
>>
>> v1 -> v2:
>> - Nothing, this patch was not here before and is mainly meant as both cleanup
>> and as a way to introduce a new field into struct atmel_uart_port that will be
>> used by the last patch to diferentiate between USART and UART regarding the
>> location of the Baudrate Clock Source bitmask.
>>
>>
>>
>> v2 -> v3:
>> - Use ATMEL_US_CD instead of 65535
>> - Previously [PATCH 10]
> 
> 
>> @@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port,
>>                cd = uart_get_divisor(port, baud);
>>        }
>>
>> -     if (cd > 65535) {       /* BRGR is 16-bit, so switch to slower clock */
>> +     /*
>> +      * If the current value of the Clock Divisor surpasses the 16 bit
>> +      * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral
>> +      * Clock implicitly divided by 8.
>> +      * If the IP is UART however, keep the highest possible value for
>> +      * the CD and avoid needless division of CD, since UART IP's do not
>> +      * support implicit division of the Peripheral Clock.
>> +      */
>> +     if (atmel_port->is_usart && cd > ATMEL_US_CD) {
>>                cd /= 8;
>>                mode |= ATMEL_US_USCLKS_MCK_DIV8;
>> +     } else {
>> +             cd &= ATMEL_US_CD;
> 
> Now that I read the above comment with more thought, would:
>                  cd = min(cd, ATMEL_US_CD);
> be more appropriate here if "the highest possible value" is sought for?
> 
> 
> --
>   i.
> 



Yes, you are right, that would actually be the correct operation. I 
somehow only thought of frequencies lower than ATMEL_US_CD when writing 
that operation, although the commentary does say my intention. Thanks :).


Regards,
	Sergiu

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART
@ 2022-09-14 12:17       ` Sergiu.Moga
  0 siblings, 0 replies; 52+ messages in thread
From: Sergiu.Moga @ 2022-09-14 12:17 UTC (permalink / raw)
  To: ilpo.jarvinen
  Cc: alexandre.belloni, mturquette, linux-kernel, admin,
	krzysztof.kozlowski+dt, jirislaby, linux-clk, lee, linux-serial,
	devicetree, Tudor.Ambarus, radu_nicolae.pirea, robh+dt,
	linux-arm-kernel, richard.genoud, gregkh, linux-spi, sboyd,
	broonie, Kavyasree.Kotagiri, Claudiu.Beznea

On 14.09.2022 14:01, Ilpo Järvinen wrote:
> On Tue, 13 Sep 2022, Sergiu Moga wrote:
> 
>> Make sure that the driver only divides the clock divisor if the
>> IP handled at that point is USART, since UART IP's do not support
>> implicit peripheral clock division. Instead, in the case of UART,
>> go with the highest possible clock divisor.
>>
>> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
>> ---
>>
>>
>> v1 -> v2:
>> - Nothing, this patch was not here before and is mainly meant as both cleanup
>> and as a way to introduce a new field into struct atmel_uart_port that will be
>> used by the last patch to diferentiate between USART and UART regarding the
>> location of the Baudrate Clock Source bitmask.
>>
>>
>>
>> v2 -> v3:
>> - Use ATMEL_US_CD instead of 65535
>> - Previously [PATCH 10]
> 
> 
>> @@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port,
>>                cd = uart_get_divisor(port, baud);
>>        }
>>
>> -     if (cd > 65535) {       /* BRGR is 16-bit, so switch to slower clock */
>> +     /*
>> +      * If the current value of the Clock Divisor surpasses the 16 bit
>> +      * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral
>> +      * Clock implicitly divided by 8.
>> +      * If the IP is UART however, keep the highest possible value for
>> +      * the CD and avoid needless division of CD, since UART IP's do not
>> +      * support implicit division of the Peripheral Clock.
>> +      */
>> +     if (atmel_port->is_usart && cd > ATMEL_US_CD) {
>>                cd /= 8;
>>                mode |= ATMEL_US_USCLKS_MCK_DIV8;
>> +     } else {
>> +             cd &= ATMEL_US_CD;
> 
> Now that I read the above comment with more thought, would:
>                  cd = min(cd, ATMEL_US_CD);
> be more appropriate here if "the highest possible value" is sought for?
> 
> 
> --
>   i.
> 



Yes, you are right, that would actually be the correct operation. I 
somehow only thought of frequencies lower than ATMEL_US_CD when writing 
that operation, although the commentary does say my intention. Thanks :).


Regards,
	Sergiu
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 01/14] ARM: dts: at91: sama7g5: Swap rx and tx for spi11
  2022-09-13 14:21   ` Sergiu Moga
@ 2022-09-16  8:13     ` Claudiu.Beznea
  -1 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:13 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13.09.2022 17:21, Sergiu Moga wrote:
> Swap the rx and tx of the DMA related DT properties of the spi11 node
> in order to maintain consistency across Microchip/Atmel SoC files.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>

Applied to at91-dt, thanks!

> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before
> 
> 
> v2 -> v3:
> - Nothing, this was previously [PATCH 2]
> 
> 
> 
>  arch/arm/boot/dts/sama7g5.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index bb6d71e6dfeb..249f9c640b6c 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -866,9 +866,9 @@ spi11: spi@400 {
>  				#address-cells = <1>;
>  				#size-cells = <0>;
>  				atmel,fifo-size = <32>;
> -				dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>,
> -					    <&dma0 AT91_XDMAC_DT_PERID(28)>;
> -				dma-names = "rx", "tx";
> +				dmas = <&dma0 AT91_XDMAC_DT_PERID(28)>,
> +					    <&dma0 AT91_XDMAC_DT_PERID(27)>;
> +				dma-names = "tx", "rx";
>  				status = "disabled";
>  			};
>  		};


^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 01/14] ARM: dts: at91: sama7g5: Swap rx and tx for spi11
@ 2022-09-16  8:13     ` Claudiu.Beznea
  0 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:13 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13.09.2022 17:21, Sergiu Moga wrote:
> Swap the rx and tx of the DMA related DT properties of the spi11 node
> in order to maintain consistency across Microchip/Atmel SoC files.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>

Applied to at91-dt, thanks!

> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before
> 
> 
> v2 -> v3:
> - Nothing, this was previously [PATCH 2]
> 
> 
> 
>  arch/arm/boot/dts/sama7g5.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index bb6d71e6dfeb..249f9c640b6c 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -866,9 +866,9 @@ spi11: spi@400 {
>  				#address-cells = <1>;
>  				#size-cells = <0>;
>  				atmel,fifo-size = <32>;
> -				dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>,
> -					    <&dma0 AT91_XDMAC_DT_PERID(28)>;
> -				dma-names = "rx", "tx";
> +				dmas = <&dma0 AT91_XDMAC_DT_PERID(28)>,
> +					    <&dma0 AT91_XDMAC_DT_PERID(27)>;
> +				dma-names = "tx", "rx";
>  				status = "disabled";
>  			};
>  		};

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 02/14] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
  2022-09-13 14:21   ` Sergiu Moga
@ 2022-09-16  8:14     ` Claudiu.Beznea
  -1 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:14 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13.09.2022 17:21, Sergiu Moga wrote:
> Maintain consistency among the compatibles of the serial nodes of
> sam9x60ek and highlight the incremental characteristic of its serial
> IP's by making sure that all serial nodes contain both the sam9x60
> and sam9260 usart/dbgu compatibles.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>

Applied to at91-dt, thanks!

> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before
> 
> 
> v2 -> v3:
> - Nothing, previously this was [PATCH 4]
> 
> 
> 
>  arch/arm/boot/dts/at91-sam9x60ek.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
> index 7ade9979e1c6..67bce8d60908 100644
> --- a/arch/arm/boot/dts/at91-sam9x60ek.dts
> +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
> @@ -258,7 +258,7 @@ &flx5 {
>  	status = "okay";
>  
>  	uart1: serial@200 {
> -		compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> +		compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  		reg = <0x200 0x200>;
>  		interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
>  		dmas = <&dma0


^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 02/14] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1
@ 2022-09-16  8:14     ` Claudiu.Beznea
  0 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:14 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13.09.2022 17:21, Sergiu Moga wrote:
> Maintain consistency among the compatibles of the serial nodes of
> sam9x60ek and highlight the incremental characteristic of its serial
> IP's by making sure that all serial nodes contain both the sam9x60
> and sam9260 usart/dbgu compatibles.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>

Applied to at91-dt, thanks!

> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before
> 
> 
> v2 -> v3:
> - Nothing, previously this was [PATCH 4]
> 
> 
> 
>  arch/arm/boot/dts/at91-sam9x60ek.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
> index 7ade9979e1c6..67bce8d60908 100644
> --- a/arch/arm/boot/dts/at91-sam9x60ek.dts
> +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
> @@ -258,7 +258,7 @@ &flx5 {
>  	status = "okay";
>  
>  	uart1: serial@200 {
> -		compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> +		compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  		reg = <0x200 0x200>;
>  		interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
>  		dmas = <&dma0

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 03/14] ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes
  2022-09-13 14:21   ` Sergiu Moga
@ 2022-09-16  8:15     ` Claudiu.Beznea
  -1 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:15 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13.09.2022 17:21, Sergiu Moga wrote:
> Add the missing required DT property `atmel,usart-mode` to the serial
> nodes of Atmel/Microchip DT files.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>

Applied to at91-dt, thanks!

> ---
> 
> 
> v1 -> v3:
> - Nothing, this patch was not here before
> 
> 
> 
>  arch/arm/boot/dts/at91-sam9x60ek.dts     |  1 +
>  arch/arm/boot/dts/at91rm9200.dtsi        |  6 ++++++
>  arch/arm/boot/dts/at91sam9260.dtsi       |  8 ++++++++
>  arch/arm/boot/dts/at91sam9261.dtsi       |  5 +++++
>  arch/arm/boot/dts/at91sam9263.dtsi       |  5 +++++
>  arch/arm/boot/dts/at91sam9g45.dtsi       |  6 ++++++
>  arch/arm/boot/dts/at91sam9n12.dtsi       |  6 ++++++
>  arch/arm/boot/dts/at91sam9rl.dtsi        |  6 ++++++
>  arch/arm/boot/dts/at91sam9x5.dtsi        |  7 +++++++
>  arch/arm/boot/dts/at91sam9x5_usart3.dtsi |  2 ++
>  arch/arm/boot/dts/sam9x60.dtsi           |  2 ++
>  arch/arm/boot/dts/sama5d2.dtsi           | 11 +++++++++++
>  arch/arm/boot/dts/sama5d3.dtsi           |  7 +++++++
>  arch/arm/boot/dts/sama5d3_uart.dtsi      |  3 +++
>  arch/arm/boot/dts/sama5d4.dtsi           |  9 +++++++++
>  arch/arm/boot/dts/sama7g5.dtsi           |  5 +++++
>  16 files changed, 89 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
> index 67bce8d60908..4ba52ba11dc6 100644
> --- a/arch/arm/boot/dts/at91-sam9x60ek.dts
> +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
> @@ -260,6 +260,7 @@ &flx5 {
>  	uart1: serial@200 {
>  		compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  		reg = <0x200 0x200>;
> +		atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  		interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
>  		dmas = <&dma0
>  			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
> index d1181ead18e5..7a113325abb9 100644
> --- a/arch/arm/boot/dts/at91rm9200.dtsi
> +++ b/arch/arm/boot/dts/at91rm9200.dtsi
> @@ -13,6 +13,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -596,6 +597,7 @@ pioD: gpio@fffffa00 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -607,6 +609,7 @@ dbgu: serial@fffff200 {
>  			usart0: serial@fffc0000 {
>  				compatible = "atmel,at91rm9200-usart";
>  				reg = <0xfffc0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -620,6 +623,7 @@ usart0: serial@fffc0000 {
>  			usart1: serial@fffc4000 {
>  				compatible = "atmel,at91rm9200-usart";
>  				reg = <0xfffc4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -633,6 +637,7 @@ usart1: serial@fffc4000 {
>  			usart2: serial@fffc8000 {
>  				compatible = "atmel,at91rm9200-usart";
>  				reg = <0xfffc8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -646,6 +651,7 @@ usart2: serial@fffc8000 {
>  			usart3: serial@fffcc000 {
>  				compatible = "atmel,at91rm9200-usart";
>  				reg = <0xfffcc000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
> index 9d9820db9482..789fe356dbf6 100644
> --- a/arch/arm/boot/dts/at91sam9260.dtsi
> +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -532,6 +533,7 @@ pioC: gpio@fffff800 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -543,6 +545,7 @@ dbgu: serial@fffff200 {
>  			usart0: serial@fffb0000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -556,6 +559,7 @@ usart0: serial@fffb0000 {
>  			usart1: serial@fffb4000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -569,6 +573,7 @@ usart1: serial@fffb4000 {
>  			usart2: serial@fffb8000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -582,6 +587,7 @@ usart2: serial@fffb8000 {
>  			usart3: serial@fffd0000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffd0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -595,6 +601,7 @@ usart3: serial@fffd0000 {
>  			uart0: serial@fffd4000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffd4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -608,6 +615,7 @@ uart0: serial@fffd4000 {
>  			uart1: serial@fffd8000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffd8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
> index 259aca565305..ee0bd1aceb3f 100644
> --- a/arch/arm/boot/dts/at91sam9261.dtsi
> +++ b/arch/arm/boot/dts/at91sam9261.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -179,6 +180,7 @@ i2c0: i2c@fffac000 {
>  			usart0: serial@fffb0000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -192,6 +194,7 @@ usart0: serial@fffb0000 {
>  			usart1: serial@fffb4000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -205,6 +208,7 @@ usart1: serial@fffb4000 {
>  			usart2: serial@fffb8000{
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -301,6 +305,7 @@ aic: interrupt-controller@fffff000 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
> index c080df8c2312..3ce9ea987312 100644
> --- a/arch/arm/boot/dts/at91sam9263.dtsi
> +++ b/arch/arm/boot/dts/at91sam9263.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -540,6 +541,7 @@ pioE: gpio@fffffa00 {
>  			dbgu: serial@ffffee00 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xffffee00 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -551,6 +553,7 @@ dbgu: serial@ffffee00 {
>  			usart0: serial@fff8c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff8c000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -564,6 +567,7 @@ usart0: serial@fff8c000 {
>  			usart1: serial@fff90000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff90000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -577,6 +581,7 @@ usart1: serial@fff90000 {
>  			usart2: serial@fff94000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff94000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
> index 09794561c7ce..95f5d76234db 100644
> --- a/arch/arm/boot/dts/at91sam9g45.dtsi
> +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
> @@ -13,6 +13,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -675,6 +676,7 @@ pioE: gpio@fffffa00 {
>  
>  			dbgu: serial@ffffee00 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				reg = <0xffffee00 0x200>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
> @@ -687,6 +689,7 @@ dbgu: serial@ffffee00 {
>  			usart0: serial@fff8c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff8c000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -700,6 +703,7 @@ usart0: serial@fff8c000 {
>  			usart1: serial@fff90000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff90000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -713,6 +717,7 @@ usart1: serial@fff90000 {
>  			usart2: serial@fff94000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff94000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -726,6 +731,7 @@ usart2: serial@fff94000 {
>  			usart3: serial@fff98000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff98000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
> index 556f35ce49e3..83114d26f10d 100644
> --- a/arch/arm/boot/dts/at91sam9n12.dtsi
> +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -593,6 +594,7 @@ pioD: gpio@fffffa00 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -618,6 +620,7 @@ ssc0: ssc@f0010000 {
>  			usart0: serial@f801c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf801c000 0x4000>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart0>;
> @@ -629,6 +632,7 @@ usart0: serial@f801c000 {
>  			usart1: serial@f8020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8020000 0x4000>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart1>;
> @@ -640,6 +644,7 @@ usart1: serial@f8020000 {
>  			usart2: serial@f8024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8024000 0x4000>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart2>;
> @@ -651,6 +656,7 @@ usart2: serial@f8024000 {
>  			usart3: serial@f8028000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8028000 0x4000>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart3>;
> diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
> index 12c634811820..364a2ff0a763 100644
> --- a/arch/arm/boot/dts/at91sam9rl.dtsi
> +++ b/arch/arm/boot/dts/at91sam9rl.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/pwm/pwm.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -175,6 +176,7 @@ i2c1: i2c@fffac000 {
>  			usart0: serial@fffb0000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -188,6 +190,7 @@ usart0: serial@fffb0000 {
>  			usart1: serial@fffb4000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -201,6 +204,7 @@ usart1: serial@fffb4000 {
>  			usart2: serial@fffb8000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -214,6 +218,7 @@ usart2: serial@fffb8000 {
>  			usart3: serial@fffbc000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffbc000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -322,6 +327,7 @@ aic: interrupt-controller@fffff000 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
> index ea3b11336c79..0c26c925761b 100644
> --- a/arch/arm/boot/dts/at91sam9x5.dtsi
> +++ b/arch/arm/boot/dts/at91sam9x5.dtsi
> @@ -13,6 +13,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -674,6 +675,7 @@ mmc1: mmc@f000c000 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -688,6 +690,7 @@ dbgu: serial@fffff200 {
>  			usart0: serial@f801c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf801c000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart0>;
> @@ -702,6 +705,7 @@ usart0: serial@f801c000 {
>  			usart1: serial@f8020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8020000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart1>;
> @@ -716,6 +720,7 @@ usart1: serial@f8020000 {
>  			usart2: serial@f8024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8024000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart2>;
> @@ -775,6 +780,7 @@ i2c2: i2c@f8018000 {
>  			uart0: serial@f8040000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8040000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart0>;
> @@ -786,6 +792,7 @@ uart0: serial@f8040000 {
>  			uart1: serial@f8044000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8044000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart1>;
> diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
> index 098d3fef5c37..a47c765e1b20 100644
> --- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
> +++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
> @@ -8,6 +8,7 @@
>  
>  #include <dt-bindings/pinctrl/at91.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	aliases {
> @@ -44,6 +45,7 @@ pinctrl_usart3_sck: usart3_sck-0 {
>  			usart3: serial@f8028000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8028000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart3>;
> diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
> index d3f60f6a456d..8f5477e307dd 100644
> --- a/arch/arm/boot/dts/sam9x60.dtsi
> +++ b/arch/arm/boot/dts/sam9x60.dtsi
> @@ -12,6 +12,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  #include <dt-bindings/mfd/atmel-flexcom.h>
>  
>  / {
> @@ -583,6 +584,7 @@ aic: interrupt-controller@fffff100 {
>  			dbgu: serial@fffff200 {
>  				compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <47 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index 2c50a021aa76..14c35c12a115 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/dma/at91.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
>  
>  / {
> @@ -441,6 +442,7 @@ pdmic: pdmic@f8018000 {
>  			uart0: serial@f801c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf801c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> @@ -457,6 +459,7 @@ AT91_XDMAC_DT_PERID(35))>,
>  			uart1: serial@f8020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8020000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> @@ -473,6 +476,7 @@ AT91_XDMAC_DT_PERID(37))>,
>  			uart2: serial@f8024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8024000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> @@ -530,6 +534,7 @@ flx0: flexcom@f8034000 {
>  				uart5: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
>  					clock-names = "usart";
> @@ -600,6 +605,7 @@ flx1: flexcom@f8038000 {
>  				uart6: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
>  					clock-names = "usart";
> @@ -769,6 +775,7 @@ AT91_XDMAC_DT_PERID(8))>,
>  			uart3: serial@fc008000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc008000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma1
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> @@ -785,6 +792,7 @@ AT91_XDMAC_DT_PERID(41))>,
>  			uart4: serial@fc00c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc00c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
>  					 AT91_XDMAC_DT_PERID(43))>,
> @@ -810,6 +818,7 @@ flx2: flexcom@fc010000 {
>  				uart7: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
>  					clock-names = "usart";
> @@ -880,6 +889,7 @@ flx3: flexcom@fc014000 {
>  				uart8: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
>  					clock-names = "usart";
> @@ -951,6 +961,7 @@ flx4: flexcom@fc018000 {
>  				uart9: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
>  					clock-names = "usart";
> diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
> index 2d0935ad2225..bde8e92d60bb 100644
> --- a/arch/arm/boot/dts/sama5d3.dtsi
> +++ b/arch/arm/boot/dts/sama5d3.dtsi
> @@ -12,6 +12,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -194,6 +195,7 @@ i2c1: i2c@f0018000 {
>  			usart0: serial@f001c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf001c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
>  				       <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> @@ -208,6 +210,7 @@ usart0: serial@f001c000 {
>  			usart1: serial@f0020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf0020000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
>  				       <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> @@ -222,6 +225,7 @@ usart1: serial@f0020000 {
>  			uart0: serial@f0024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf0024000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart0>;
> @@ -356,6 +360,7 @@ i2c2: i2c@f801c000 {
>  			usart2: serial@f8020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8020000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
>  				       <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> @@ -370,6 +375,7 @@ usart2: serial@f8020000 {
>  			usart3: serial@f8024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8024000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
>  				       <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> @@ -464,6 +470,7 @@ ramc0: ramc@ffffea00 {
>  			dbgu: serial@ffffee00 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xffffee00 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
>  				       <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
> index a3eaba995cf4..44d1173f2ffb 100644
> --- a/arch/arm/boot/dts/sama5d3_uart.dtsi
> +++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/pinctrl/at91.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	aliases {
> @@ -39,6 +40,7 @@ pinctrl_uart1: uart1-0 {
>  			uart0: serial@f0024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf0024000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart0>;
> @@ -50,6 +52,7 @@ uart0: serial@f0024000 {
>  			uart1: serial@f8028000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8028000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart1>;
> diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
> index 1e5c01898ccf..af62157ae214 100644
> --- a/arch/arm/boot/dts/sama5d4.dtsi
> +++ b/arch/arm/boot/dts/sama5d4.dtsi
> @@ -8,6 +8,7 @@
>  
>  #include <dt-bindings/clock/at91.h>
>  #include <dt-bindings/dma/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  #include <dt-bindings/pinctrl/at91.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
> @@ -278,6 +279,7 @@ mmc0: mmc@f8000000 {
>  			uart0: serial@f8004000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8004000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -437,6 +439,7 @@ sfr: sfr@f8028000 {
>  			usart0: serial@f802c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf802c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -455,6 +458,7 @@ usart0: serial@f802c000 {
>  			usart1: serial@f8030000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8030000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -490,6 +494,7 @@ mmc1: mmc@fc000000 {
>  			uart1: serial@fc004000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc004000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -508,6 +513,7 @@ uart1: serial@fc004000 {
>  			usart2: serial@fc008000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc008000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -526,6 +532,7 @@ usart2: serial@fc008000 {
>  			usart3: serial@fc00c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc00c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -544,6 +551,7 @@ usart3: serial@fc00c000 {
>  			usart4: serial@fc010000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc010000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -770,6 +778,7 @@ rtc@fc0686b0 {
>  			dbgu: serial@fc069000 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfc069000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index 249f9c640b6c..7bd8ae8e8d38 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -14,6 +14,7 @@
>  #include <dt-bindings/clock/at91.h>
>  #include <dt-bindings/dma/at91.h>
>  #include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	model = "Microchip SAMA7G5 family SoC";
> @@ -603,6 +604,7 @@ flx0: flexcom@e1818000 {
>  			uart0: serial@200 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0x200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
>  				clock-names = "usart";
> @@ -651,6 +653,7 @@ flx3: flexcom@e1824000 {
>  			uart3: serial@200 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0x200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
>  				clock-names = "usart";
> @@ -694,6 +697,7 @@ flx4: flexcom@e2018000 {
>  			uart4: serial@200 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0x200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
>  				clock-names = "usart";
> @@ -719,6 +723,7 @@ flx7: flexcom@e2024000 {
>  			uart7: serial@200 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0x200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
>  				clock-names = "usart";


^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 03/14] ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes
@ 2022-09-16  8:15     ` Claudiu.Beznea
  0 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:15 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13.09.2022 17:21, Sergiu Moga wrote:
> Add the missing required DT property `atmel,usart-mode` to the serial
> nodes of Atmel/Microchip DT files.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>

Applied to at91-dt, thanks!

> ---
> 
> 
> v1 -> v3:
> - Nothing, this patch was not here before
> 
> 
> 
>  arch/arm/boot/dts/at91-sam9x60ek.dts     |  1 +
>  arch/arm/boot/dts/at91rm9200.dtsi        |  6 ++++++
>  arch/arm/boot/dts/at91sam9260.dtsi       |  8 ++++++++
>  arch/arm/boot/dts/at91sam9261.dtsi       |  5 +++++
>  arch/arm/boot/dts/at91sam9263.dtsi       |  5 +++++
>  arch/arm/boot/dts/at91sam9g45.dtsi       |  6 ++++++
>  arch/arm/boot/dts/at91sam9n12.dtsi       |  6 ++++++
>  arch/arm/boot/dts/at91sam9rl.dtsi        |  6 ++++++
>  arch/arm/boot/dts/at91sam9x5.dtsi        |  7 +++++++
>  arch/arm/boot/dts/at91sam9x5_usart3.dtsi |  2 ++
>  arch/arm/boot/dts/sam9x60.dtsi           |  2 ++
>  arch/arm/boot/dts/sama5d2.dtsi           | 11 +++++++++++
>  arch/arm/boot/dts/sama5d3.dtsi           |  7 +++++++
>  arch/arm/boot/dts/sama5d3_uart.dtsi      |  3 +++
>  arch/arm/boot/dts/sama5d4.dtsi           |  9 +++++++++
>  arch/arm/boot/dts/sama7g5.dtsi           |  5 +++++
>  16 files changed, 89 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
> index 67bce8d60908..4ba52ba11dc6 100644
> --- a/arch/arm/boot/dts/at91-sam9x60ek.dts
> +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
> @@ -260,6 +260,7 @@ &flx5 {
>  	uart1: serial@200 {
>  		compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  		reg = <0x200 0x200>;
> +		atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  		interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
>  		dmas = <&dma0
>  			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
> index d1181ead18e5..7a113325abb9 100644
> --- a/arch/arm/boot/dts/at91rm9200.dtsi
> +++ b/arch/arm/boot/dts/at91rm9200.dtsi
> @@ -13,6 +13,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -596,6 +597,7 @@ pioD: gpio@fffffa00 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -607,6 +609,7 @@ dbgu: serial@fffff200 {
>  			usart0: serial@fffc0000 {
>  				compatible = "atmel,at91rm9200-usart";
>  				reg = <0xfffc0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -620,6 +623,7 @@ usart0: serial@fffc0000 {
>  			usart1: serial@fffc4000 {
>  				compatible = "atmel,at91rm9200-usart";
>  				reg = <0xfffc4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -633,6 +637,7 @@ usart1: serial@fffc4000 {
>  			usart2: serial@fffc8000 {
>  				compatible = "atmel,at91rm9200-usart";
>  				reg = <0xfffc8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -646,6 +651,7 @@ usart2: serial@fffc8000 {
>  			usart3: serial@fffcc000 {
>  				compatible = "atmel,at91rm9200-usart";
>  				reg = <0xfffcc000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
> index 9d9820db9482..789fe356dbf6 100644
> --- a/arch/arm/boot/dts/at91sam9260.dtsi
> +++ b/arch/arm/boot/dts/at91sam9260.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -532,6 +533,7 @@ pioC: gpio@fffff800 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -543,6 +545,7 @@ dbgu: serial@fffff200 {
>  			usart0: serial@fffb0000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -556,6 +559,7 @@ usart0: serial@fffb0000 {
>  			usart1: serial@fffb4000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -569,6 +573,7 @@ usart1: serial@fffb4000 {
>  			usart2: serial@fffb8000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -582,6 +587,7 @@ usart2: serial@fffb8000 {
>  			usart3: serial@fffd0000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffd0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -595,6 +601,7 @@ usart3: serial@fffd0000 {
>  			uart0: serial@fffd4000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffd4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -608,6 +615,7 @@ uart0: serial@fffd4000 {
>  			uart1: serial@fffd8000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffd8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
> index 259aca565305..ee0bd1aceb3f 100644
> --- a/arch/arm/boot/dts/at91sam9261.dtsi
> +++ b/arch/arm/boot/dts/at91sam9261.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -179,6 +180,7 @@ i2c0: i2c@fffac000 {
>  			usart0: serial@fffb0000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -192,6 +194,7 @@ usart0: serial@fffb0000 {
>  			usart1: serial@fffb4000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -205,6 +208,7 @@ usart1: serial@fffb4000 {
>  			usart2: serial@fffb8000{
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -301,6 +305,7 @@ aic: interrupt-controller@fffff000 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
> index c080df8c2312..3ce9ea987312 100644
> --- a/arch/arm/boot/dts/at91sam9263.dtsi
> +++ b/arch/arm/boot/dts/at91sam9263.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -540,6 +541,7 @@ pioE: gpio@fffffa00 {
>  			dbgu: serial@ffffee00 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xffffee00 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -551,6 +553,7 @@ dbgu: serial@ffffee00 {
>  			usart0: serial@fff8c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff8c000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -564,6 +567,7 @@ usart0: serial@fff8c000 {
>  			usart1: serial@fff90000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff90000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -577,6 +581,7 @@ usart1: serial@fff90000 {
>  			usart2: serial@fff94000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff94000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
> index 09794561c7ce..95f5d76234db 100644
> --- a/arch/arm/boot/dts/at91sam9g45.dtsi
> +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
> @@ -13,6 +13,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -675,6 +676,7 @@ pioE: gpio@fffffa00 {
>  
>  			dbgu: serial@ffffee00 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				reg = <0xffffee00 0x200>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
> @@ -687,6 +689,7 @@ dbgu: serial@ffffee00 {
>  			usart0: serial@fff8c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff8c000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -700,6 +703,7 @@ usart0: serial@fff8c000 {
>  			usart1: serial@fff90000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff90000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -713,6 +717,7 @@ usart1: serial@fff90000 {
>  			usart2: serial@fff94000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff94000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -726,6 +731,7 @@ usart2: serial@fff94000 {
>  			usart3: serial@fff98000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfff98000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
> index 556f35ce49e3..83114d26f10d 100644
> --- a/arch/arm/boot/dts/at91sam9n12.dtsi
> +++ b/arch/arm/boot/dts/at91sam9n12.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -593,6 +594,7 @@ pioD: gpio@fffffa00 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -618,6 +620,7 @@ ssc0: ssc@f0010000 {
>  			usart0: serial@f801c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf801c000 0x4000>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart0>;
> @@ -629,6 +632,7 @@ usart0: serial@f801c000 {
>  			usart1: serial@f8020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8020000 0x4000>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart1>;
> @@ -640,6 +644,7 @@ usart1: serial@f8020000 {
>  			usart2: serial@f8024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8024000 0x4000>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart2>;
> @@ -651,6 +656,7 @@ usart2: serial@f8024000 {
>  			usart3: serial@f8028000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8028000 0x4000>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart3>;
> diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
> index 12c634811820..364a2ff0a763 100644
> --- a/arch/arm/boot/dts/at91sam9rl.dtsi
> +++ b/arch/arm/boot/dts/at91sam9rl.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/pwm/pwm.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -175,6 +176,7 @@ i2c1: i2c@fffac000 {
>  			usart0: serial@fffb0000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb0000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -188,6 +190,7 @@ usart0: serial@fffb0000 {
>  			usart1: serial@fffb4000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb4000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -201,6 +204,7 @@ usart1: serial@fffb4000 {
>  			usart2: serial@fffb8000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffb8000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -214,6 +218,7 @@ usart2: serial@fffb8000 {
>  			usart3: serial@fffbc000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfffbc000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
>  				atmel,use-dma-rx;
>  				atmel,use-dma-tx;
> @@ -322,6 +327,7 @@ aic: interrupt-controller@fffff000 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
> index ea3b11336c79..0c26c925761b 100644
> --- a/arch/arm/boot/dts/at91sam9x5.dtsi
> +++ b/arch/arm/boot/dts/at91sam9x5.dtsi
> @@ -13,6 +13,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -674,6 +675,7 @@ mmc1: mmc@f000c000 {
>  			dbgu: serial@fffff200 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> @@ -688,6 +690,7 @@ dbgu: serial@fffff200 {
>  			usart0: serial@f801c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf801c000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart0>;
> @@ -702,6 +705,7 @@ usart0: serial@f801c000 {
>  			usart1: serial@f8020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8020000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart1>;
> @@ -716,6 +720,7 @@ usart1: serial@f8020000 {
>  			usart2: serial@f8024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8024000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart2>;
> @@ -775,6 +780,7 @@ i2c2: i2c@f8018000 {
>  			uart0: serial@f8040000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8040000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart0>;
> @@ -786,6 +792,7 @@ uart0: serial@f8040000 {
>  			uart1: serial@f8044000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8044000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart1>;
> diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
> index 098d3fef5c37..a47c765e1b20 100644
> --- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
> +++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
> @@ -8,6 +8,7 @@
>  
>  #include <dt-bindings/pinctrl/at91.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	aliases {
> @@ -44,6 +45,7 @@ pinctrl_usart3_sck: usart3_sck-0 {
>  			usart3: serial@f8028000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8028000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_usart3>;
> diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
> index d3f60f6a456d..8f5477e307dd 100644
> --- a/arch/arm/boot/dts/sam9x60.dtsi
> +++ b/arch/arm/boot/dts/sam9x60.dtsi
> @@ -12,6 +12,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  #include <dt-bindings/mfd/atmel-flexcom.h>
>  
>  / {
> @@ -583,6 +584,7 @@ aic: interrupt-controller@fffff100 {
>  			dbgu: serial@fffff200 {
>  				compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfffff200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <47 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index 2c50a021aa76..14c35c12a115 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/dma/at91.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
>  
>  / {
> @@ -441,6 +442,7 @@ pdmic: pdmic@f8018000 {
>  			uart0: serial@f801c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf801c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> @@ -457,6 +459,7 @@ AT91_XDMAC_DT_PERID(35))>,
>  			uart1: serial@f8020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8020000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> @@ -473,6 +476,7 @@ AT91_XDMAC_DT_PERID(37))>,
>  			uart2: serial@f8024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8024000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> @@ -530,6 +534,7 @@ flx0: flexcom@f8034000 {
>  				uart5: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
>  					clock-names = "usart";
> @@ -600,6 +605,7 @@ flx1: flexcom@f8038000 {
>  				uart6: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
>  					clock-names = "usart";
> @@ -769,6 +775,7 @@ AT91_XDMAC_DT_PERID(8))>,
>  			uart3: serial@fc008000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc008000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma1
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
> @@ -785,6 +792,7 @@ AT91_XDMAC_DT_PERID(41))>,
>  			uart4: serial@fc00c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc00c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
>  					 AT91_XDMAC_DT_PERID(43))>,
> @@ -810,6 +818,7 @@ flx2: flexcom@fc010000 {
>  				uart7: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
>  					clock-names = "usart";
> @@ -880,6 +889,7 @@ flx3: flexcom@fc014000 {
>  				uart8: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
>  					clock-names = "usart";
> @@ -951,6 +961,7 @@ flx4: flexcom@fc018000 {
>  				uart9: serial@200 {
>  					compatible = "atmel,at91sam9260-usart";
>  					reg = <0x200 0x200>;
> +					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
>  					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
>  					clock-names = "usart";
> diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
> index 2d0935ad2225..bde8e92d60bb 100644
> --- a/arch/arm/boot/dts/sama5d3.dtsi
> +++ b/arch/arm/boot/dts/sama5d3.dtsi
> @@ -12,6 +12,7 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	#address-cells = <1>;
> @@ -194,6 +195,7 @@ i2c1: i2c@f0018000 {
>  			usart0: serial@f001c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf001c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
>  				       <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> @@ -208,6 +210,7 @@ usart0: serial@f001c000 {
>  			usart1: serial@f0020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf0020000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
>  				       <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> @@ -222,6 +225,7 @@ usart1: serial@f0020000 {
>  			uart0: serial@f0024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf0024000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart0>;
> @@ -356,6 +360,7 @@ i2c2: i2c@f801c000 {
>  			usart2: serial@f8020000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8020000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
>  				       <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> @@ -370,6 +375,7 @@ usart2: serial@f8020000 {
>  			usart3: serial@f8024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8024000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
>  				       <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> @@ -464,6 +470,7 @@ ramc0: ramc@ffffea00 {
>  			dbgu: serial@ffffee00 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xffffee00 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
>  				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
>  				       <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
> diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
> index a3eaba995cf4..44d1173f2ffb 100644
> --- a/arch/arm/boot/dts/sama5d3_uart.dtsi
> +++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/pinctrl/at91.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	aliases {
> @@ -39,6 +40,7 @@ pinctrl_uart1: uart1-0 {
>  			uart0: serial@f0024000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf0024000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart0>;
> @@ -50,6 +52,7 @@ uart0: serial@f0024000 {
>  			uart1: serial@f8028000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8028000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_uart1>;
> diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
> index 1e5c01898ccf..af62157ae214 100644
> --- a/arch/arm/boot/dts/sama5d4.dtsi
> +++ b/arch/arm/boot/dts/sama5d4.dtsi
> @@ -8,6 +8,7 @@
>  
>  #include <dt-bindings/clock/at91.h>
>  #include <dt-bindings/dma/at91.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  #include <dt-bindings/pinctrl/at91.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/gpio/gpio.h>
> @@ -278,6 +279,7 @@ mmc0: mmc@f8000000 {
>  			uart0: serial@f8004000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8004000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -437,6 +439,7 @@ sfr: sfr@f8028000 {
>  			usart0: serial@f802c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf802c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -455,6 +458,7 @@ usart0: serial@f802c000 {
>  			usart1: serial@f8030000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xf8030000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -490,6 +494,7 @@ mmc1: mmc@fc000000 {
>  			uart1: serial@fc004000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc004000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma0
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -508,6 +513,7 @@ uart1: serial@fc004000 {
>  			usart2: serial@fc008000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc008000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -526,6 +532,7 @@ usart2: serial@fc008000 {
>  			usart3: serial@fc00c000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc00c000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -544,6 +551,7 @@ usart3: serial@fc00c000 {
>  			usart4: serial@fc010000 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0xfc010000 0x100>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
>  				dmas = <&dma1
>  					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
> @@ -770,6 +778,7 @@ rtc@fc0686b0 {
>  			dbgu: serial@fc069000 {
>  				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
>  				reg = <0xfc069000 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_dbgu>;
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index 249f9c640b6c..7bd8ae8e8d38 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -14,6 +14,7 @@
>  #include <dt-bindings/clock/at91.h>
>  #include <dt-bindings/dma/at91.h>
>  #include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/mfd/at91-usart.h>
>  
>  / {
>  	model = "Microchip SAMA7G5 family SoC";
> @@ -603,6 +604,7 @@ flx0: flexcom@e1818000 {
>  			uart0: serial@200 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0x200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
>  				clock-names = "usart";
> @@ -651,6 +653,7 @@ flx3: flexcom@e1824000 {
>  			uart3: serial@200 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0x200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
>  				clock-names = "usart";
> @@ -694,6 +697,7 @@ flx4: flexcom@e2018000 {
>  			uart4: serial@200 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0x200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
>  				clock-names = "usart";
> @@ -719,6 +723,7 @@ flx7: flexcom@e2024000 {
>  			uart7: serial@200 {
>  				compatible = "atmel,at91sam9260-usart";
>  				reg = <0x200 0x200>;
> +				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
>  				interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
>  				clock-names = "usart";

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 04/14] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
  2022-09-13 14:21   ` Sergiu Moga
@ 2022-09-16  8:15     ` Claudiu.Beznea
  -1 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:15 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk, krzysztof.kozlowski

On 13.09.2022 17:21, Sergiu Moga wrote:
> The DT nodes of the SPI IP's may contain DMA related properties so
> make sure that the binding is able to properly validate those as
> well by making it aware of these optional properties.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> Acked-by: Mark Brown <broonie@kernel.org>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Applied to at91-dt, thanks!

> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before
> 
> 
> v2 -> v3:
> - added Acked-by tags
> 
> 
> 
> 
> 
>  .../devicetree/bindings/spi/atmel,at91rm9200-spi.yaml  | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
> index d85d54024b2e..4dd973e341e6 100644
> --- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
> +++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
> @@ -34,6 +34,16 @@ properties:
>    clocks:
>      maxItems: 1
>  
> +  dmas:
> +    items:
> +      - description: TX DMA Channel
> +      - description: RX DMA Channel
> +
> +  dma-names:
> +    items:
> +      - const: tx
> +      - const: rx
> +
>    atmel,fifo-size:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      description: |


^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 04/14] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties
@ 2022-09-16  8:15     ` Claudiu.Beznea
  0 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:15 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk, krzysztof.kozlowski

On 13.09.2022 17:21, Sergiu Moga wrote:
> The DT nodes of the SPI IP's may contain DMA related properties so
> make sure that the binding is able to properly validate those as
> well by making it aware of these optional properties.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> Acked-by: Mark Brown <broonie@kernel.org>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Applied to at91-dt, thanks!

> ---
> 
> 
> v1 -> v2:
> - Nothing, this patch was not here before
> 
> 
> v2 -> v3:
> - added Acked-by tags
> 
> 
> 
> 
> 
>  .../devicetree/bindings/spi/atmel,at91rm9200-spi.yaml  | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
> index d85d54024b2e..4dd973e341e6 100644
> --- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
> +++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
> @@ -34,6 +34,16 @@ properties:
>    clocks:
>      maxItems: 1
>  
> +  dmas:
> +    items:
> +      - description: TX DMA Channel
> +      - description: RX DMA Channel
> +
> +  dma-names:
> +    items:
> +      - const: tx
> +      - const: rx
> +
>    atmel,fifo-size:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      description: |

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 13/14] clk: at91: sama5d2: Add Generic Clocks for UART/USART
  2022-09-13 14:22   ` Sergiu Moga
@ 2022-09-16  8:16     ` Claudiu.Beznea
  -1 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:16 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13.09.2022 17:22, Sergiu Moga wrote:
> Add the generic clocks for UART/USART in the sama5d2 driver to allow them
> to be registered in the Common Clock Framework.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

Applied to clk-microchip, thanks!

Hi, Stephen,

I took this patch though clk-microchip and integrated it in the Microchip
clock pull request.

Thank you,
Claudiu Beznea

> ---
> 
> 
> v1 -> v2:
> - Added R-b tag
> 
> 
> v2 -> v3:
> - Nothing
> 
> 
>  drivers/clk/at91/sama5d2.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
> index cfd0f5e23b99..84156dc52bff 100644
> --- a/drivers/clk/at91/sama5d2.c
> +++ b/drivers/clk/at91/sama5d2.c
> @@ -120,6 +120,16 @@ static const struct {
>  	struct clk_range r;
>  	int chg_pid;
>  } sama5d2_gck[] = {
> +	{ .n = "flx0_gclk",   .id = 19, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "flx1_gclk",   .id = 20, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "flx2_gclk",   .id = 21, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "flx3_gclk",   .id = 22, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "flx4_gclk",   .id = 23, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart0_gclk",  .id = 24, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart1_gclk",  .id = 25, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart2_gclk",  .id = 26, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart3_gclk",  .id = 27, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart4_gclk",  .id = 28, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
>  	{ .n = "sdmmc0_gclk", .id = 31, .chg_pid = INT_MIN, },
>  	{ .n = "sdmmc1_gclk", .id = 32, .chg_pid = INT_MIN, },
>  	{ .n = "tcb0_gclk",   .id = 35, .chg_pid = INT_MIN, .r = { .min = 0, .max = 83000000 }, },


^ permalink raw reply	[flat|nested] 52+ messages in thread

* Re: [PATCH v3 13/14] clk: at91: sama5d2: Add Generic Clocks for UART/USART
@ 2022-09-16  8:16     ` Claudiu.Beznea
  0 siblings, 0 replies; 52+ messages in thread
From: Claudiu.Beznea @ 2022-09-16  8:16 UTC (permalink / raw)
  To: Sergiu.Moga, lee, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
	alexandre.belloni, radu_nicolae.pirea, richard.genoud, gregkh,
	broonie, mturquette, sboyd, jirislaby, admin, Kavyasree.Kotagiri,
	Tudor.Ambarus
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-spi,
	linux-serial, linux-clk

On 13.09.2022 17:22, Sergiu Moga wrote:
> Add the generic clocks for UART/USART in the sama5d2 driver to allow them
> to be registered in the Common Clock Framework.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

Applied to clk-microchip, thanks!

Hi, Stephen,

I took this patch though clk-microchip and integrated it in the Microchip
clock pull request.

Thank you,
Claudiu Beznea

> ---
> 
> 
> v1 -> v2:
> - Added R-b tag
> 
> 
> v2 -> v3:
> - Nothing
> 
> 
>  drivers/clk/at91/sama5d2.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
> index cfd0f5e23b99..84156dc52bff 100644
> --- a/drivers/clk/at91/sama5d2.c
> +++ b/drivers/clk/at91/sama5d2.c
> @@ -120,6 +120,16 @@ static const struct {
>  	struct clk_range r;
>  	int chg_pid;
>  } sama5d2_gck[] = {
> +	{ .n = "flx0_gclk",   .id = 19, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "flx1_gclk",   .id = 20, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "flx2_gclk",   .id = 21, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "flx3_gclk",   .id = 22, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "flx4_gclk",   .id = 23, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart0_gclk",  .id = 24, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart1_gclk",  .id = 25, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart2_gclk",  .id = 26, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart3_gclk",  .id = 27, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
> +	{ .n = "uart4_gclk",  .id = 28, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
>  	{ .n = "sdmmc0_gclk", .id = 31, .chg_pid = INT_MIN, },
>  	{ .n = "sdmmc1_gclk", .id = 32, .chg_pid = INT_MIN, },
>  	{ .n = "tcb0_gclk",   .id = 35, .chg_pid = INT_MIN, .r = { .min = 0, .max = 83000000 }, },

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 52+ messages in thread

end of thread, other threads:[~2022-09-16  8:20 UTC | newest]

Thread overview: 52+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-13 14:21 [PATCH v3 00/14] Make atmel serial driver aware of GCLK Sergiu Moga
2022-09-13 14:21 ` Sergiu Moga
2022-09-13 14:21 ` [PATCH v3 01/14] ARM: dts: at91: sama7g5: Swap rx and tx for spi11 Sergiu Moga
2022-09-13 14:21   ` Sergiu Moga
2022-09-16  8:13   ` Claudiu.Beznea
2022-09-16  8:13     ` Claudiu.Beznea
2022-09-13 14:21 ` [PATCH v3 02/14] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 Sergiu Moga
2022-09-13 14:21   ` Sergiu Moga
2022-09-16  8:14   ` Claudiu.Beznea
2022-09-16  8:14     ` Claudiu.Beznea
2022-09-13 14:21 ` [PATCH v3 03/14] ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes Sergiu Moga
2022-09-13 14:21   ` Sergiu Moga
2022-09-16  8:15   ` Claudiu.Beznea
2022-09-16  8:15     ` Claudiu.Beznea
2022-09-13 14:21 ` [PATCH v3 04/14] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties Sergiu Moga
2022-09-13 14:21   ` Sergiu Moga
2022-09-16  8:15   ` Claudiu.Beznea
2022-09-16  8:15     ` Claudiu.Beznea
2022-09-13 14:21 ` [PATCH v3 05/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga
2022-09-13 14:21   ` Sergiu Moga
2022-09-13 14:21 ` [PATCH v3 06/14] dt-bindings: serial: atmel,at91-usart: convert to json-schema Sergiu Moga
2022-09-13 14:21   ` Sergiu Moga
2022-09-13 14:28   ` Krzysztof Kozlowski
2022-09-13 14:28     ` Krzysztof Kozlowski
2022-09-13 14:21 ` [PATCH v3 07/14] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60 Sergiu Moga
2022-09-13 14:21   ` Sergiu Moga
2022-09-13 14:28   ` Krzysztof Kozlowski
2022-09-13 14:28     ` Krzysztof Kozlowski
2022-09-13 14:22 ` [PATCH v3 08/14] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga
2022-09-13 14:22   ` Sergiu Moga
2022-09-13 14:29   ` Krzysztof Kozlowski
2022-09-13 14:29     ` Krzysztof Kozlowski
2022-09-13 14:22 ` [PATCH v3 09/14] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock Sergiu Moga
2022-09-13 14:22   ` Sergiu Moga
2022-09-13 14:29   ` Krzysztof Kozlowski
2022-09-13 14:29     ` Krzysztof Kozlowski
2022-09-13 14:22 ` [PATCH v3 10/14] tty: serial: atmel: Define GCLK as USART baudrate source clock Sergiu Moga
2022-09-13 14:22   ` Sergiu Moga
2022-09-13 14:22 ` [PATCH v3 11/14] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register Sergiu Moga
2022-09-13 14:22   ` Sergiu Moga
2022-09-13 14:22 ` [PATCH v3 12/14] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Sergiu Moga
2022-09-13 14:22   ` Sergiu Moga
2022-09-14 11:01   ` Ilpo Järvinen
2022-09-14 11:01     ` Ilpo Järvinen
2022-09-14 12:17     ` Sergiu.Moga
2022-09-14 12:17       ` Sergiu.Moga
2022-09-13 14:22 ` [PATCH v3 13/14] clk: at91: sama5d2: Add Generic Clocks for UART/USART Sergiu Moga
2022-09-13 14:22   ` Sergiu Moga
2022-09-16  8:16   ` Claudiu.Beznea
2022-09-16  8:16     ` Claudiu.Beznea
2022-09-13 14:22 ` [PATCH v3 14/14] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga
2022-09-13 14:22   ` Sergiu Moga

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