[parisc-linux] L2000/N4000 smp devices/boot compare??

[parisc-linux] L2000/N4000 smp devices/boot compare??

[Joel Soete]

Hi all,

Sorry if annoying with smp but I have an opportunity to test an hypothesis:
2.4 64bits smp capability would work on a L2000 (because it works on a A500)

Yes it works (I just compile a kernel (while a 'top' showing me cc1 switching
from 
pu1 to cpu2 to cpu1...) because I just have it for some hours).

And I compare devices found:

[...]
model 9000/800/L2000-44
[...]
Searching for devices:
Found devices:
1. Rhapsody 440 (0) at 0xfffffffffffa0000 [160], versions 0x5c4, 0x0, 0x4

2. Rhapsody 440 (0) at 0xfffffffffffa6000 [166], versions 0x5c4, 0x0, 0x4
3. Astro BC Runway Port (12) at 0xfffffffffed00000 [0], versions 0x582,
0x0, 0xb
4. Elroy PCI Bridge (13) at 0xfffffffffed30000 [0/0], versions 0x782, 0x0,
0xa
5. Elroy PCI 
ridge (13) at 0xfffffffffed32000 [0/1], versions 0x782, 0x0,
0xa
6. Elroy PCI Bridge (13) at 0xfffffffffed34000 [0/2], versions 0x782, 0x0,
0xa
7. Elroy PCI Bridge (13) at 0xfffffffffed36000 [0/3], versions 0x782, 0x0,
0xa
8. Elroy PCI Bridge (13
 at 0xfffffffffed38000 [0/4], versions 0x782, 0x0,
0xa
9. Elroy PCI Bridge (13) at 0xfffffffffed3a000 [0/5], versions 0x782, 0x0,
0xa
10. Elroy PCI Bridge (13) at 0xfffffffffed3c000 [0/6], versions 0x782, 0x0,
0xa
11. Elroy PCI Bridge (13) at 0xf
fffffffed3e000 [0/7], versions 0x782, 0x0,
0xa
12. Memory (1) at 0xfffffffffed08000 [8], versions 0x95, 0x0, 0x9
CPU(s): 2 x PA8500 (PCX-W) at 440.000000 MHz
SBA found Astro 2.1 at 0xfffffffffed00000
[...]


[...]
model 9000/800/N4000-55
[...

Searching for devices...
Found devices:
1. Memory (1) at 0xfffffffffedc0000 [192], versions 0x90, 0x0, 0x9
2. IKE I/O Bus Converter Merced Port (7) at 0xfffffffffed00000 [0], versions
0x803, 0x0, 0xc
3. Elroy PCI Bridge (13) at 0xffffffffbffe000 [0/0], versions 0x782, 0x0,
0xa
4. Elroy PCI Bridge (13) at 0xffffffffbffe2000 [0/1], versions 0x782, 0x0,
0xa
5. Elroy PCI Bridge (13) at 0xffffffffbffe4000 [0/2], versions 0x782, 0x0,
0xa
6. Elroy PCI Bridge (13) at 0xffffffffbffe8000 [0/4], versions 0x782, 0x0,
0xa
7. Elroy PCI Bridge (13) at 0xffffffffbffea000 [0/5], versions 0x782, 0x0,
0xa
8. Elroy PCI Bridge (13) at 0xffffffffbfff0000 [0/8], versions 0x782, 0x0,
0xa
9. Elroy PCI Bridge (13) at 0xffffffffbfff4000 [0/10], versions 0x782, 0x0,
0xa
10. Elroy PCI Bridge (13) at 0xffffffffbfff8000 [0/12], versions 0x782, 0x0,

0xa
11. IKE I/O Bus Converter Merced Port (7) at 0xfffffffffed40000 [1], versions
0x803, 0x0, 0xc
12. Elroy PCI Bridge (13) at 0xfffffffffece0000 [1/0], versions 0x782, 0x0,
0xa
13. Elroy PCI Bridge (13) at 0xfffffffffece4000 [1/2], versions 0x782, 0x0,
0xa
14. Elroy PCI Bridge (13) at 0xfffffffffece8000 [1/4], versions 0x782, 0x0,
0xa
15. Elroy PCI Bridge (13) at 0xfffffffffecf0000 [1/8], versions 0x782, 0x0,
0xa
16. Elroy PCI Bridge (13) at 0xfffffffffecf4000 [1/10], versions 0x782, 0x0,

0xa
17. Elroy PCI Bridge (13) at 0xfffffffffecf8000 [1/12], versions 0x782, 0x0,

0xa
18. DEW BC Runway Port (7) at 0xfffffffffed24000 [36], versions 0x584, 0x0,
0xc
19. Unknown machine (0) at 0xfffffffffed25000 [37], versions 0x5d3, 0x0,
0x0
20. DEW BC Runway Port (7) at 0xfffffffffed2c000 [44], versions 0x584, 0x0,
0xc
21. Unknown machine (0) at 0xfffffffffed2d000 [45], versions 0x5d3, 0x0,
0x0

CPU(s): 2 x PA8600 (PCX-W+) at 550.000000 MHz
SBA found Ike rev 2 at 0xfffffffffed00000
SBA found Ike rev 2 at 0xfffffffffed40000
[...]

(trust me it exactly the same kernel on the same sys disk)

And so notice some differences (may be some one h
ve no matter, please advise):
on the L2k it first discver CPUs:
1. Rhapsody 440 (0) at 0xfffffffffffa0000 [160], versions 0x5c4, 0x0, 0x4
2. Rhapsody 440 (0) at 0xfffffffffffa6000 [166], versions 0x5c4, 0x0, 0x4

on the N4k latter:
18. DEW BC Runway Port (7) at 0xfffffffffed24000 [36], versions 0x584, 0x0,
0xc
19. Unknown machine (0) at 0xfffffffffed25000 [37], versions 0x5d3, 0x0,
0x0
20. DEW BC Runway Port (7) at 0xfffffffffed2c000 [44], versions 0x584, 0x0,
0xc
21. Unknown machine (0) at 0xfffffffffed2d000 [45], versions 0x5d3, 0x0,
0x0

and there are 'Unknown machine'?

But most _important_ (imho): SBA type and/or number;
on the L2k _ONE_
3. Astro BC Runway Port (12) at 0xfffffffffed00000 [0], versions 0x582,
0x0, 0xb

on the N4k _TWO_
2. IKE I/O Bus Converter Merced Port (7) at 0xfffffffffed00000 [0], versions
0x803, 0x0, 0xc
[...]
11. IKE I/O Bus Converter Merced Port (7) at 0xfffffffffed40000 [1], versions
0x803, 0x0, 0xc

And I trust that it is not the number of SBA which is most important difference
but well the type because iirc Grant mentioned that this is the same pb
on L3000 on which there are only one IKE type of SBA?

Am i wrong/right?

Is there any additional info about this SBA?

Thanks in advance for all advises,
    Joel




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Re: [parisc-linux] L2000/N4000 smp devices/boot compare??

[Derek Engelhaupt]

[-- Attachment #1: Type: text/plain, Size: 6085 bytes --]

Joel,
 
First off, since the N, L, and A class are of the same generation of machines they are similar in some respects.  Different in others.  The L1000 and L2000 have a system card unique to that set of machines.  Being that as it is, the L1000/2000 probably use a different I/O interface chip.  The L1500 and L3000 are in essence an N Class system card cut in half and therefore use the same I/O interface as the N.  The GSP in the L Class resides in the PCI card cage with the GSP in the N Class is a seperate card attaching directly to the system card via the hot swap disk backplane.  The extra unknown system buses probably reside on the GSP of the N Class.  That would be my educated guess of what the unknown system buses are.  The N has two IKEs since it has both a left and a right PCI card cage attached directly to the system board.
 
Derek

Joel Soete <soete.joel@tiscali.be> wrote:
Hi all,

Sorry if annoying with smp but I have an opportunity to test an hypothesis:
2.4 64bits smp capability would work on a L2000 (because it works on a A500)

Yes it works (I just compile a kernel (while a 'top' showing me cc1 switching
from 
pu1 to cpu2 to cpu1...) because I just have it for some hours).

And I compare devices found:

[...]
model 9000/800/L2000-44
[...]
Searching for devices:
Found devices:
1. Rhapsody 440 (0) at 0xfffffffffffa0000 [160], versions 0x5c4, 0x0, 0x4

2. Rhapsody 440 (0) at 0xfffffffffffa6000 [166], versions 0x5c4, 0x0, 0x4
3. Astro BC Runway Port (12) at 0xfffffffffed00000 [0], versions 0x582,
0x0, 0xb
4. Elroy PCI Bridge (13) at 0xfffffffffed30000 [0/0], versions 0x782, 0x0,
0xa
5. Elroy PCI 
ridge (13) at 0xfffffffffed32000 [0/1], versions 0x782, 0x0,
0xa
6. Elroy PCI Bridge (13) at 0xfffffffffed34000 [0/2], versions 0x782, 0x0,
0xa
7. Elroy PCI Bridge (13) at 0xfffffffffed36000 [0/3], versions 0x782, 0x0,
0xa
8. Elroy PCI Bridge (13
at 0xfffffffffed38000 [0/4], versions 0x782, 0x0,
0xa
9. Elroy PCI Bridge (13) at 0xfffffffffed3a000 [0/5], versions 0x782, 0x0,
0xa
10. Elroy PCI Bridge (13) at 0xfffffffffed3c000 [0/6], versions 0x782, 0x0,
0xa
11. Elroy PCI Bridge (13) at 0xf
fffffffed3e000 [0/7], versions 0x782, 0x0,
0xa
12. Memory (1) at 0xfffffffffed08000 [8], versions 0x95, 0x0, 0x9
CPU(s): 2 x PA8500 (PCX-W) at 440.000000 MHz
SBA found Astro 2.1 at 0xfffffffffed00000
[...]


[...]
model 9000/800/N4000-55
[...

Searching for devices...
Found devices:
1. Memory (1) at 0xfffffffffedc0000 [192], versions 0x90, 0x0, 0x9
2. IKE I/O Bus Converter Merced Port (7) at 0xfffffffffed00000 [0], versions
0x803, 0x0, 0xc
3. Elroy PCI Bridge (13) at 0xffffffffbffe000 [0/0], versions 0x782, 0x0,
0xa
4. Elroy PCI Bridge (13) at 0xffffffffbffe2000 [0/1], versions 0x782, 0x0,
0xa
5. Elroy PCI Bridge (13) at 0xffffffffbffe4000 [0/2], versions 0x782, 0x0,
0xa
6. Elroy PCI Bridge (13) at 0xffffffffbffe8000 [0/4], versions 0x782, 0x0,
0xa
7. Elroy PCI Bridge (13) at 0xffffffffbffea000 [0/5], versions 0x782, 0x0,
0xa
8. Elroy PCI Bridge (13) at 0xffffffffbfff0000 [0/8], versions 0x782, 0x0,
0xa
9. Elroy PCI Bridge (13) at 0xffffffffbfff4000 [0/10], versions 0x782, 0x0,
0xa
10. Elroy PCI Bridge (13) at 0xffffffffbfff8000 [0/12], versions 0x782, 0x0,

0xa
11. IKE I/O Bus Converter Merced Port (7) at 0xfffffffffed40000 [1], versions
0x803, 0x0, 0xc
12. Elroy PCI Bridge (13) at 0xfffffffffece0000 [1/0], versions 0x782, 0x0,
0xa
13. Elroy PCI Bridge (13) at 0xfffffffffece4000 [1/2], versions 0x782, 0x0,
0xa
14. Elroy PCI Bridge (13) at 0xfffffffffece8000 [1/4], versions 0x782, 0x0,
0xa
15. Elroy PCI Bridge (13) at 0xfffffffffecf0000 [1/8], versions 0x782, 0x0,
0xa
16. Elroy PCI Bridge (13) at 0xfffffffffecf4000 [1/10], versions 0x782, 0x0,

0xa
17. Elroy PCI Bridge (13) at 0xfffffffffecf8000 [1/12], versions 0x782, 0x0,

0xa
18. DEW BC Runway Port (7) at 0xfffffffffed24000 [36], versions 0x584, 0x0,
0xc
19. Unknown machine (0) at 0xfffffffffed25000 [37], versions 0x5d3, 0x0,
0x0
20. DEW BC Runway Port (7) at 0xfffffffffed2c000 [44], versions 0x584, 0x0,
0xc
21. Unknown machine (0) at 0xfffffffffed2d000 [45], versions 0x5d3, 0x0,
0x0

CPU(s): 2 x PA8600 (PCX-W+) at 550.000000 MHz
SBA found Ike rev 2 at 0xfffffffffed00000
SBA found Ike rev 2 at 0xfffffffffed40000
[...]

(trust me it exactly the same kernel on the same sys disk)

And so notice some differences (may be some one h
ve no matter, please advise):
on the L2k it first discver CPUs:
1. Rhapsody 440 (0) at 0xfffffffffffa0000 [160], versions 0x5c4, 0x0, 0x4
2. Rhapsody 440 (0) at 0xfffffffffffa6000 [166], versions 0x5c4, 0x0, 0x4

on the N4k latter:
18. DEW BC Runway Port (7) at 0xfffffffffed24000 [36], versions 0x584, 0x0,
0xc
19. Unknown machine (0) at 0xfffffffffed25000 [37], versions 0x5d3, 0x0,
0x0
20. DEW BC Runway Port (7) at 0xfffffffffed2c000 [44], versions 0x584, 0x0,
0xc
21. Unknown machine (0) at 0xfffffffffed2d000 [45], versions 0x5d3, 0x0,
0x0

and there are 'Unknown machine'?

But most _important_ (imho): SBA type and/or number;
on the L2k _ONE_
3. Astro BC Runway Port (12) at 0xfffffffffed00000 [0], versions 0x582,
0x0, 0xb

on the N4k _TWO_
2. IKE I/O Bus Converter Merced Port (7) at 0xfffffffffed00000 [0], versions
0x803, 0x0, 0xc
[...]
11. IKE I/O Bus Converter Merced Port (7) at 0xfffffffffed40000 [1], versions
0x803, 0x0, 0xc

And I trust that it is not the number of SBA which is most important difference
but well the type because iirc Grant mentioned that this is the same pb
on L3000 on which there are only one IKE type of SBA?

Am i wrong/right?

Is there any additional info about this SBA?

Thanks in advance for all advises,
Joel




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Re: [parisc-linux] L2000/N4000 smp devices/boot compare??

[Matthew Wilcox]

[Derek, could you possibly wrap your mails around 70 columns?  It's hard
to read/reply to your mails.]

On Thu, Oct 02, 2003 at 04:38:01PM -0700, Derek Engelhaupt wrote:
> First off, since the N, L, and A class are of the same generation
> of machines they are similar in some respects.  Different in others.
> The L1000 and L2000 have a system card unique to that set of machines.
> Being that as it is, the L1000/2000 probably use a different I/O
> interface chip.  The L1500 and L3000 are in essence an N Class system
> card cut in half and therefore use the same I/O interface as the N.
> The GSP in the L Class resides in the PCI card cage with the GSP in the
> N Class is a seperate card attaching directly to the system card via the
> hot swap disk backplane.  The extra unknown system buses probably reside
> on the GSP of the N Class.  That would be my educated guess of what the
> unknown system buses are.  The N has two IKEs since it has both a left
> and a right PCI card cage attached directly to the system board.

According to the IO-ACD, these are actually the processors:

   Prelude W+ 540                        | NPROC  |  00004    91  |   5D3

A500/L1000/L2000 use Astro/Elroy just like the B/C/J class.  L1500/L3000/N
use Ike and Stretch in place of Astro.  I once downloaded an N-class PDF
which I've subsequently lost.  If I remember correctly, it looked like:

     CPU --+-- CPU          RAM          CPU --+-- CPU
          DEW              |||||              DEW
  +--------+--------+---- Stretch ----+--------+------+
 IKE               DEW               DEW             IKE
|||||         CPU --+-- CPU     CPU --+-- CPU       |||||
Ropes                                               Ropes

(Elroys on the end of the ropes, of course).

My understanding is that Stretch is the problem.  We don't follow the
rules for non-coherent aliases and Stretch isn't as lenient as other
memory controllers.

-- 
"It's not Hollywood.  War is real, war is primarily not about defeat or
victory, it is about death.  I've seen thousands and thousands of dead bodies.
Do you think I want to have an academic debate on this subject?" -- Robert Fisk

Re: [parisc-linux] L2000/N4000 smp devices/boot compare??

[Matthew Wilcox]

On Fri, Oct 03, 2003 at 08:15:03AM +0200, Joel Soete wrote:
> Derek, Matthew,
> 
> Thanks a lot for those clarification.
> As I try, without any success :(, to find where 'rules for non-coherent aliases'
> are not respected, I will waiting for a fix.

Well, it's hard.  Consider a page in the page cache.  It has a kernel
address and one-or-more user addresses.  The user addresses all follow the
coherency rules but the kernel address doesn't.  If you look in Appendix F,
we're not allowed to have multiple write-capable translations to the same
address.

I think the only way to solve this is by (ab)using kmap to ensure that
kernel pages are only accessed via coherent mappings.

-- 
"It's not Hollywood.  War is real, war is primarily not about defeat or
victory, it is about death.  I've seen thousands and thousands of dead bodies.
Do you think I want to have an academic debate on this subject?" -- Robert Fisk

Re: [parisc-linux] L2000/N4000 smp devices/boot compare??

[Grant Grundler]

On Fri, Oct 03, 2003 at 01:18:10AM +0100, Matthew Wilcox wrote:
> I once downloaded an N-class PDF which I've subsequently lost.
> If I remember correctly, it looked like:
> 
>      CPU --+-- CPU          RAM          CPU --+-- CPU
>           DEW              |||||              DEW
>   +--------+--------+---- Stretch ----+--------+------+
>  IKE               DEW               DEW             IKE
> |||||         CPU --+-- CPU     CPU --+-- CPU       |||||
> Ropes                                               Ropes
> 
> (Elroys on the end of the ropes, of course).

I thought Ike was hanging off of "Stretch" like this:
   CPU --+-- CPU              RAM             CPU --+-- CPU
        DEW                  |||||                 DEW
         +----------------- Stretch ----------------+
        DEW                  |   |                 DEW
   CPU --+-- CPU           IKE   IKE          CPU --+-- CPU
                       ||...||   ||...||
                      12 ropes   12 ropes

DEW == Runway to Merced bus converter
IKe == I/O Controller (DMA Coherency and IO MMU)

10 PCI slots are "Twin Turbo" (Double Rope) and two are "Turbo" (singl
rope). "Core I/O" gets the remaining two ropes.


However, the original N-class has been replaced with rp7410.
Not sure if when the switchover took place.
rp7410 is now kin to Superdome (HalfDome) and rp8400 (QuarterDome)
and is based on a follow-on chipset.
URL's here:
http://www.hp.com/products1/servers/mid_range/index.html
http://www.hp.com/products1/servers/rackoptimized/rp7410/infolibrary/rp7410_wp.pdf

grant

ps. We are completely under representing the complexity of "RAM" and all
the memory controllers that made this such a hot box 4 years ago.

Re: [parisc-linux] L2000/N4000 smp devices/boot compare??

[Joel Soete]

Hi Matthew,

Just comeback to you on this stuff to be sure I well understand :)

>> As I try, without any success :(, to find where 'rules for non-coherent
>aliases'
>> are not respected, I will waiting for a fix.
>
>Well, it's hard.  Consider a page in the page cache.  It has a kernel
>address and one-or-more user addresses.  The user addresses all follow the
>coherency rules but the kernel address doesn't.  If you look in Appendix
F,
>we're not allowed to have multiple write-capable translations to the same
>address.

If I well understand it means that a same real (absolute) address has a different
virtual addresse for each processor?

>I think the only way to solve this is by (ab)using kmap to ensure that
>kernel pages are only accessed via coherent mappings.

I find back an interesting info into <http://lists.parisc-linux.org/pipermail/parisc-linux/1999-December/008101.html>

where it is mentioned 'ping-pong the translations...'.
Do you think it could be a solution?
(btw Do you have any idea where i can find of the detail way to implement
it?)

thanks again,
    Joel

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Re: [parisc-linux] L2000/N4000 smp devices/boot compare??

[Grant Grundler]

On Tue, Oct 14, 2003 at 06:59:52PM +0200, Joel Soete wrote:
> If I well understand it means that a same real (absolute) address
> has a different virtual addresse for each processor?

multiple translations. It can be across processors but doesn't have to be.

> (btw Do you have any idea where i can find of the detail way to implement
> it?)

If someone had worked it out and provided a patch, we probably
be using it. I think that's what you (or someone) needs to do.

sorry, 
grant

Re: [parisc-linux] L2000/N4000 smp devices/boot compare??

[Joel Soete]

Grant,

Thanks for all (advise, attention, ...)
    Joel

PS: for me it is already a progress: i finaly reach to understand some concept
as 'aliasing' (still have to understand exatly coherent and no-coherent,
... :) )

>-- Original Message --
>Date: Tue, 14 Oct 2003 22:52:42 -0600
>From: Grant Grundler <grundler@parisc-linux.org>
>To: Joel Soete <soete.joel@tiscali.be>
>Cc: Matthew Wilcox <willy@debian.org>, parisc-linux@parisc-linux.org,
>	Derek Engelhaupt <derekengelhaupt@rocketmail.com>
>Subject: Re: [parisc-linux] L2000/N4000 smp devices/boot compare??
>
>
>On Tue, Oct 14, 2003 at 06:59:52PM +0200, Joel Soete wrote:
> If I well understand it means that a same real (absolute) address
> has a different virtual addresse for each processor?

multiple translations. It can be across processors but doesn't h
>ve to be.

> (btw Do you have any idea where i can find of the detail way to implement
> it?)

If someone had worked it out and provided a patch, we probably
be using it. I think that's what you (or someone) needs to do.

sorry, 
grant



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Re: [parisc-linux] L2000/N4000 smp devices/boot compare??

[Joel Soete]

Grant Grundler wrote:

>>
>>Well, when I will ( ;) ) have a more accurate idea of what mean 
>>_(ab)use_ kmpa() (i thinks it is to write a parisc specific kmpa() as 
>>for some other platform?) and the work it would require, I will so ask 
>>on the list. But before all, I still need to learn a lot on vm and so 
>>read A. Tananenbaum book on vm as well as the (excelent) Mel Gorman thesis.
> 
Grant,

Well, the 'Operating systems design and implementation' of Andrew S. 
Tanenbaum & Albert S. Woodhull (2d edition) is available near Prentice 
Hall (I don't know if another format (pdf, html) is available, sorry).

OTC the thesis of Mel Gorman 'Understanding The Linux Virtual Memory 
Manager' and 'Code Commentary On The Linux Virtual Memory Manager' is 
available as html and pdf format at:

<http://www.csn.ul.ie/~mel/projects/vm/>

as well as many interesting material (but I will let you read).

hth,
	Joel