[PATCH v1 1/2] clk: socfpga: Read the clock parent's register base in probe function

[Marek Vasut <marex@denx.de>]

On 3/9/20 1:52 PM, Ang, Chee Hong wrote:
>> On 3/9/20 9:21 AM, chee.hong.ang at intel.com wrote:
>>> From: Chee Hong Ang <chee.hong.ang@intel.com>
>>>
>>> This commit (82de42fa14682d408da935adfb0f935354c5008f) calls child's
>>> ofdata_to_platdata() method before the parent is probed in dm core.
>>> This has caused the driver no longer able to get the correct parent
>>> clock's register base in the ofdata_to_platdata() method because the
>>> parent clocks will only be probed after the child's ofdata_to_platdata().
>>> To resolve this, the clock parent's register base will only be
>>> retrieved by the child in probe() method instead of ofdata_to_platdata().
>>
>> You should be able to bind the drivers and resolve their register offsets without
>> probing them, so this look more like a bug in the driver core ?
> The problem is the children clock driver need to resolve/derive their register base
> from their clock parents. With this new change, clock parents are still not yet
> being initialized when the children clock drivers need to resolve their register base
> from their parent.
> A10 is not booting in mainline due to this issue.
> I can't think of a better way to fix this. Should we fix the clock driver itself or the
> DM core ?

It seems more like a bug in the later, since the register offsets are in
the DT and reading out the DT information should be possible before
.probe() is called for any of the clock.