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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [PATCH v1 1/2] clk: socfpga: Read the clock parent's register base in probe function
Date: Wed, 11 Mar 2020 12:54:58 +0100	[thread overview]
Message-ID: <ffcbd24c-f3d7-4d70-f040-8161fb76ac7e@denx.de> (raw)
In-Reply-To: <CAPnjgZ3+SbR=_gk3ibQE_EE0u7jxMsO3pcMy8rKdiX5tp_zQEA@mail.gmail.com>

On 3/11/20 12:50 PM, Simon Glass wrote:
> Hi,

Hi,

> On Mon, 9 Mar 2020 at 02:22, <chee.hong.ang@intel.com> wrote:
>>
>> From: Chee Hong Ang <chee.hong.ang@intel.com>
>>
>> This commit (82de42fa14682d408da935adfb0f935354c5008f) calls child's
>> ofdata_to_platdata() method before the parent is probed in dm core.
>> This has caused the driver no longer able to get the correct parent
>> clock's register base in the ofdata_to_platdata() method because the
>> parent clocks will only be probed after the child's ofdata_to_platdata().
>> To resolve this, the clock parent's register base will only be retrieved
>> by the child in probe() method instead of ofdata_to_platdata().
> 
> I think one thing that is going on here is that DM allows ofdata to be
> read for a device before its parent devices have been read, but it
> requires that parent devices be probed before their children.

This seems wrong. The clock driver should be able to instantiate devices
and read their ofdata without probing them. That is one of the core
design principles of the DM.

> The idea is that it should be possible to read the ofdata for a node
> without needing to have done so for parents. But perhaps this
> assumption is too brave?

Why is it brave ? That's how it always was, the DT is already there, so
why wouldn't you be able to read it.

> I suspect we could change this, so that device_ofdata_to_platdata()
> first calls itself on its parent.
> 
> I can think of various reasons why this change might be desirable.

I think this is how it worked before already.

-- 
Best regards,
Marek Vasut

  reply	other threads:[~2020-03-11 11:54 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-09  8:21 [PATCH v1 0/2] Fix A10 clock driver crash after changes in DM core chee.hong.ang at intel.com
2020-03-09  8:21 ` [PATCH v1 1/2] clk: socfpga: Read the clock parent's register base in probe function chee.hong.ang at intel.com
2020-03-09  9:05   ` Tan, Ley Foon
2020-03-09 12:28   ` Marek Vasut
2020-03-09 12:52     ` Ang, Chee Hong
2020-03-09 12:53       ` Marek Vasut
2020-03-11 11:50   ` Simon Glass
2020-03-11 11:54     ` Marek Vasut [this message]
2020-03-11 12:27       ` Simon Glass
2020-04-01  2:33         ` Ang, Chee Hong
2020-04-02  2:34           ` Simon Glass
2020-04-02  2:40             ` Marek Vasut
2020-04-02  2:44               ` Ang, Chee Hong
2020-04-02 18:50                 ` Simon Glass
2020-04-02 19:45                   ` Marek Vasut
2020-04-02 19:49                     ` Simon Glass
2020-04-02 19:50                       ` Marek Vasut
2020-04-02 19:53                       ` Simon Goldschmidt
2020-04-02 19:54                         ` Marek Vasut
2020-04-02 19:56                           ` Simon Glass
2020-04-02 19:58                           ` Simon Goldschmidt
2020-04-02 20:54                     ` Tom Rini
2020-04-02 21:07                       ` Marek Vasut
2020-04-02 21:52                         ` Simon Glass
2020-04-02 22:10                         ` Tom Rini
2020-04-02 22:47                           ` Marek Vasut
2020-04-03  3:52                             ` Tan, Ley Foon
2020-04-03 12:21                               ` Tom Rini
2020-04-06  8:57                                 ` Tan, Ley Foon
2020-04-06 11:28   ` Tom Rini
2020-04-06 11:34     ` Marek Vasut
2020-03-09  8:22 ` [PATCH v1 2/2] clk: socfpga: Switch to use ofnode API chee.hong.ang at intel.com
2020-03-09  9:05   ` Tan, Ley Foon

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