From: Michal Simek <michal.simek@xilinx.com>
To: Michael Tretter <m.tretter@pengutronix.de>,
<linux-arm-kernel@lists.infradead.org>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>
Cc: <rajanv@xilinx.com>, <tejasp@xilinx.com>, <dshah@xilinx.com>,
<rvisaval@xilinx.com>, <kernel@pengutronix.de>,
<robh+dt@kernel.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>
Subject: Re: [PATCH 09/12] soc: xilinx: vcu: make pll post divider explicit
Date: Wed, 2 Dec 2020 15:51:25 +0100 [thread overview]
Message-ID: <3b0308e6-6b34-4e6e-fd7f-f3df54da98c7@xilinx.com> (raw)
In-Reply-To: <20201116075532.4019252-10-m.tretter@pengutronix.de>
On 16. 11. 20 8:55, Michael Tretter wrote:
> According to the downstream driver documentation due to timing
> constraints the output divider of the PLL has to be set to 1/2. Add a
> helper function for that check instead of burying the code in one large
> setup function.
>
> The bit is undocumented and marked as reserved in the register
> reference.
>
> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
> ---
> drivers/soc/xilinx/xlnx_vcu.c | 51 ++++++++++++++++++++++++-----------
> 1 file changed, 35 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/soc/xilinx/xlnx_vcu.c b/drivers/soc/xilinx/xlnx_vcu.c
> index cedc8b7859f7..cf8456b4ef78 100644
> --- a/drivers/soc/xilinx/xlnx_vcu.c
> +++ b/drivers/soc/xilinx/xlnx_vcu.c
> @@ -79,6 +79,7 @@ struct xvcu_device {
> struct regmap *logicore_reg_ba;
> void __iomem *vcu_slcr_ba;
> struct clk_hw *pll;
> + struct clk_hw *pll_post;
kernel doc again.
M
WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <michal.simek@xilinx.com>
To: Michael Tretter <m.tretter@pengutronix.de>,
<linux-arm-kernel@lists.infradead.org>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>
Cc: dshah@xilinx.com, tejasp@xilinx.com, sboyd@kernel.org,
mturquette@baylibre.com, rajanv@xilinx.com, robh+dt@kernel.org,
kernel@pengutronix.de, rvisaval@xilinx.com
Subject: Re: [PATCH 09/12] soc: xilinx: vcu: make pll post divider explicit
Date: Wed, 2 Dec 2020 15:51:25 +0100 [thread overview]
Message-ID: <3b0308e6-6b34-4e6e-fd7f-f3df54da98c7@xilinx.com> (raw)
In-Reply-To: <20201116075532.4019252-10-m.tretter@pengutronix.de>
On 16. 11. 20 8:55, Michael Tretter wrote:
> According to the downstream driver documentation due to timing
> constraints the output divider of the PLL has to be set to 1/2. Add a
> helper function for that check instead of burying the code in one large
> setup function.
>
> The bit is undocumented and marked as reserved in the register
> reference.
>
> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
> ---
> drivers/soc/xilinx/xlnx_vcu.c | 51 ++++++++++++++++++++++++-----------
> 1 file changed, 35 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/soc/xilinx/xlnx_vcu.c b/drivers/soc/xilinx/xlnx_vcu.c
> index cedc8b7859f7..cf8456b4ef78 100644
> --- a/drivers/soc/xilinx/xlnx_vcu.c
> +++ b/drivers/soc/xilinx/xlnx_vcu.c
> @@ -79,6 +79,7 @@ struct xvcu_device {
> struct regmap *logicore_reg_ba;
> void __iomem *vcu_slcr_ba;
> struct clk_hw *pll;
> + struct clk_hw *pll_post;
kernel doc again.
M
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-12-02 14:52 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 7:55 [PATCH 00/12] soc: xilinx: vcu: Convert driver to clock provider Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 01/12] ARM: dts: define indexes for output clocks Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:33 ` Michal Simek
2020-12-02 14:33 ` Michal Simek
2020-12-07 19:21 ` Rob Herring
2020-12-07 19:21 ` Rob Herring
2020-12-13 5:44 ` Stephen Boyd
2020-12-13 5:44 ` Stephen Boyd
2020-11-16 7:55 ` [PATCH 02/12] clk: divider: fix initialization with parent_hw Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:28 ` Michal Simek
2020-12-02 14:28 ` Michal Simek
2020-12-13 5:42 ` Stephen Boyd
2020-12-13 5:42 ` Stephen Boyd
2020-11-16 7:55 ` [PATCH 03/12] soc: xilinx: vcu: drop coreclk from struct xlnx_vcu Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 04/12] soc: xilinx: vcu: add helper to wait for PLL locked Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 05/12] soc: xilinx: vcu: add helpers for configuring PLL Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 06/12] soc: xilinx: vcu: implement PLL disable Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 07/12] soc: xilinx: vcu: register PLL as fixed rate clock Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:41 ` Michal Simek
2020-12-02 14:41 ` Michal Simek
2020-11-16 7:55 ` [PATCH 08/12] soc: xilinx: vcu: implement clock provider for output clocks Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:49 ` Michal Simek
2020-12-02 14:49 ` Michal Simek
2020-12-13 5:55 ` Stephen Boyd
2020-12-13 5:55 ` Stephen Boyd
2020-12-15 11:38 ` Michael Tretter
2020-12-15 11:38 ` Michael Tretter
2020-12-16 1:09 ` Stephen Boyd
2020-12-16 1:09 ` Stephen Boyd
2020-12-21 9:18 ` Michael Tretter
2020-12-21 9:18 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 09/12] soc: xilinx: vcu: make pll post divider explicit Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:51 ` Michal Simek [this message]
2020-12-02 14:51 ` Michal Simek
2020-11-16 7:55 ` [PATCH 10/12] soc: xilinx: vcu: make the PLL configurable Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:54 ` Michal Simek
2020-12-02 14:54 ` Michal Simek
2020-11-16 7:55 ` [PATCH 11/12] soc: xilinx: vcu: remove calculation of PLL configuration Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 12/12] soc: xilinx: vcu: use bitfields for register definition Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-13 5:47 ` Stephen Boyd
2020-12-13 5:47 ` Stephen Boyd
2020-12-03 7:46 ` [PATCH 00/12] soc: xilinx: vcu: Convert driver to clock provider Michal Simek
2020-12-03 7:46 ` Michal Simek
2020-12-03 9:00 ` Michael Tretter
2020-12-03 9:00 ` Michael Tretter
2020-12-03 9:14 ` Michal Simek
2020-12-03 9:14 ` Michal Simek
2020-12-13 5:50 ` Stephen Boyd
2020-12-13 5:50 ` Stephen Boyd
2020-12-15 11:56 ` Michael Tretter
2020-12-15 11:56 ` Michael Tretter
2020-12-16 2:37 ` Stephen Boyd
2020-12-16 2:37 ` Stephen Boyd
2020-12-21 9:19 ` Michael Tretter
2020-12-21 9:19 ` Michael Tretter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3b0308e6-6b34-4e6e-fd7f-f3df54da98c7@xilinx.com \
--to=michal.simek@xilinx.com \
--cc=devicetree@vger.kernel.org \
--cc=dshah@xilinx.com \
--cc=kernel@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=m.tretter@pengutronix.de \
--cc=mturquette@baylibre.com \
--cc=rajanv@xilinx.com \
--cc=robh+dt@kernel.org \
--cc=rvisaval@xilinx.com \
--cc=sboyd@kernel.org \
--cc=tejasp@xilinx.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.