From: Michal Simek <michal.simek@xilinx.com>
To: Michael Tretter <m.tretter@pengutronix.de>,
<linux-arm-kernel@lists.infradead.org>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>
Cc: <rajanv@xilinx.com>, <tejasp@xilinx.com>, <dshah@xilinx.com>,
<rvisaval@xilinx.com>, <kernel@pengutronix.de>,
<robh+dt@kernel.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>
Subject: Re: [PATCH 01/12] ARM: dts: define indexes for output clocks
Date: Wed, 2 Dec 2020 15:33:36 +0100 [thread overview]
Message-ID: <8534d394-0ead-e17b-f70f-597cb307ae1f@xilinx.com> (raw)
In-Reply-To: <20201116075532.4019252-2-m.tretter@pengutronix.de>
On 16. 11. 20 8:55, Michael Tretter wrote:
> The VCU System-Level Control has 4 output clocks. Define indexes for
> these clocks to allow to reference them in the device tree.
>
> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
> ---
> include/dt-bindings/clock/xlnx-vcu.h | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
> create mode 100644 include/dt-bindings/clock/xlnx-vcu.h
>
> diff --git a/include/dt-bindings/clock/xlnx-vcu.h b/include/dt-bindings/clock/xlnx-vcu.h
> new file mode 100644
> index 000000000000..1ed76b9563b6
> --- /dev/null
> +++ b/include/dt-bindings/clock/xlnx-vcu.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2020 Pengutronix, Michael Tretter <kernel@pengutronix.de>
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_XLNX_VCU_H
> +#define _DT_BINDINGS_CLOCK_XLNX_VCU_H
> +
> +#define CLK_XVCU_ENC_CORE 0
> +#define CLK_XVCU_ENC_MCU 1
> +#define CLK_XVCU_DEC_CORE 2
> +#define CLK_XVCU_DEC_MCU 3
> +#define CLK_XVCU_NUM_CLOCKS 4
> +
> +#endif /* _DT_BINDINGS_CLOCK_XLNX_VCU_H */
>
Missing vcu in subject but I can handle it myself if others patches are
fine. If not please fix it in v2.
Thanks,
Michal
WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <michal.simek@xilinx.com>
To: Michael Tretter <m.tretter@pengutronix.de>,
<linux-arm-kernel@lists.infradead.org>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>
Cc: dshah@xilinx.com, tejasp@xilinx.com, sboyd@kernel.org,
mturquette@baylibre.com, rajanv@xilinx.com, robh+dt@kernel.org,
kernel@pengutronix.de, rvisaval@xilinx.com
Subject: Re: [PATCH 01/12] ARM: dts: define indexes for output clocks
Date: Wed, 2 Dec 2020 15:33:36 +0100 [thread overview]
Message-ID: <8534d394-0ead-e17b-f70f-597cb307ae1f@xilinx.com> (raw)
In-Reply-To: <20201116075532.4019252-2-m.tretter@pengutronix.de>
On 16. 11. 20 8:55, Michael Tretter wrote:
> The VCU System-Level Control has 4 output clocks. Define indexes for
> these clocks to allow to reference them in the device tree.
>
> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
> ---
> include/dt-bindings/clock/xlnx-vcu.h | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
> create mode 100644 include/dt-bindings/clock/xlnx-vcu.h
>
> diff --git a/include/dt-bindings/clock/xlnx-vcu.h b/include/dt-bindings/clock/xlnx-vcu.h
> new file mode 100644
> index 000000000000..1ed76b9563b6
> --- /dev/null
> +++ b/include/dt-bindings/clock/xlnx-vcu.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2020 Pengutronix, Michael Tretter <kernel@pengutronix.de>
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_XLNX_VCU_H
> +#define _DT_BINDINGS_CLOCK_XLNX_VCU_H
> +
> +#define CLK_XVCU_ENC_CORE 0
> +#define CLK_XVCU_ENC_MCU 1
> +#define CLK_XVCU_DEC_CORE 2
> +#define CLK_XVCU_DEC_MCU 3
> +#define CLK_XVCU_NUM_CLOCKS 4
> +
> +#endif /* _DT_BINDINGS_CLOCK_XLNX_VCU_H */
>
Missing vcu in subject but I can handle it myself if others patches are
fine. If not please fix it in v2.
Thanks,
Michal
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next prev parent reply other threads:[~2020-12-02 14:34 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 7:55 [PATCH 00/12] soc: xilinx: vcu: Convert driver to clock provider Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 01/12] ARM: dts: define indexes for output clocks Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:33 ` Michal Simek [this message]
2020-12-02 14:33 ` Michal Simek
2020-12-07 19:21 ` Rob Herring
2020-12-07 19:21 ` Rob Herring
2020-12-13 5:44 ` Stephen Boyd
2020-12-13 5:44 ` Stephen Boyd
2020-11-16 7:55 ` [PATCH 02/12] clk: divider: fix initialization with parent_hw Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:28 ` Michal Simek
2020-12-02 14:28 ` Michal Simek
2020-12-13 5:42 ` Stephen Boyd
2020-12-13 5:42 ` Stephen Boyd
2020-11-16 7:55 ` [PATCH 03/12] soc: xilinx: vcu: drop coreclk from struct xlnx_vcu Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 04/12] soc: xilinx: vcu: add helper to wait for PLL locked Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 05/12] soc: xilinx: vcu: add helpers for configuring PLL Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 06/12] soc: xilinx: vcu: implement PLL disable Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 07/12] soc: xilinx: vcu: register PLL as fixed rate clock Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:41 ` Michal Simek
2020-12-02 14:41 ` Michal Simek
2020-11-16 7:55 ` [PATCH 08/12] soc: xilinx: vcu: implement clock provider for output clocks Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:49 ` Michal Simek
2020-12-02 14:49 ` Michal Simek
2020-12-13 5:55 ` Stephen Boyd
2020-12-13 5:55 ` Stephen Boyd
2020-12-15 11:38 ` Michael Tretter
2020-12-15 11:38 ` Michael Tretter
2020-12-16 1:09 ` Stephen Boyd
2020-12-16 1:09 ` Stephen Boyd
2020-12-21 9:18 ` Michael Tretter
2020-12-21 9:18 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 09/12] soc: xilinx: vcu: make pll post divider explicit Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:51 ` Michal Simek
2020-12-02 14:51 ` Michal Simek
2020-11-16 7:55 ` [PATCH 10/12] soc: xilinx: vcu: make the PLL configurable Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-02 14:54 ` Michal Simek
2020-12-02 14:54 ` Michal Simek
2020-11-16 7:55 ` [PATCH 11/12] soc: xilinx: vcu: remove calculation of PLL configuration Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 12/12] soc: xilinx: vcu: use bitfields for register definition Michael Tretter
2020-11-16 7:55 ` Michael Tretter
2020-12-13 5:47 ` Stephen Boyd
2020-12-13 5:47 ` Stephen Boyd
2020-12-03 7:46 ` [PATCH 00/12] soc: xilinx: vcu: Convert driver to clock provider Michal Simek
2020-12-03 7:46 ` Michal Simek
2020-12-03 9:00 ` Michael Tretter
2020-12-03 9:00 ` Michael Tretter
2020-12-03 9:14 ` Michal Simek
2020-12-03 9:14 ` Michal Simek
2020-12-13 5:50 ` Stephen Boyd
2020-12-13 5:50 ` Stephen Boyd
2020-12-15 11:56 ` Michael Tretter
2020-12-15 11:56 ` Michael Tretter
2020-12-16 2:37 ` Stephen Boyd
2020-12-16 2:37 ` Stephen Boyd
2020-12-21 9:19 ` Michael Tretter
2020-12-21 9:19 ` Michael Tretter
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