Re: [PATCH 0/4] Enable gigadevice and add new part #s

[Michal Simek <monstr@monstr.eu>]

On 12/19/22 23:48, Victor Lim wrote:
> Enabling gigadevice part #s.
> These are the part #s added,
> gd25b256: 3V QSPI, QE=1, 256Mbit
> gd25b512: 3V QSPI, QE=1, 512Mbit
> gd55b01g: 3V QSPI, QE=1, 1Gbit
> gd55b02g: 3V QSPI, QE=1, 2Gbit
> gd25f64: 3V QSPI, QE=1, 64Mbit, high performance
> gd25f128: 3V QSPI, QE=1, 128Mbit, high performance
> gd25f256: 3V QSPI, QE=1, 256Mbit, high performance
> gd55f512: 3V QSPI, QE=1, 512Mbit, high performance
> gd25t512: 3V QSPI, 512Mbit, ultra high performance
> gd55t01g: 3V QSPI, 1Gbit, ultra high performance
> gd55t02g: 3V QSPI, 2Gbit, ultra high performance
> gd25x512: 3V OSPI, 512Mbit, ultra high performance
> gd55x01g: 3V OSPI, 1Gbit, ultra high performance
> gd55x02g: 3V OSPI, 2Gbit, ultra high performance
> gd25lb256: 1.8V QSPI, QE=1, 256Mbit
> gd25lb512: 1.8V QSPI, QE=1, 512Mbit
> gd55lb01g: 1.8V QSPI, QE=1, 1Gbit
> gd55lb02g: 1.8V QSPI, QE=1, 2Gbit
> gd25lf64: 1.8V QSPI, QE=1, 64Mbit, high performance
> gd25lf128: 1.8V QSPI, QE=1, 128Mbit, high performance
> gd25lf256: 1.8V QSPI, QE=1, 256Mbit, high performance
> gd55lf512: 1.8V QSPI, QE=1, 512Mbit, high performance
> gd25lt512: 1.8V QSPI, 512Mbit, ultra high performance
> gd55lt01g: 1.8V QSPI, 1Gbit, ultra high performance
> gd55lt02g: 1.8V QSPI, 2Gbit, ultra high performance
> gd25lx512: 1.8V OSPI, 512Mbit, ultra high performance
> gd55lx01g: 1.8V OSPI, 1Gbit, ultra high performance
> gd55lx02g: 1.8V OSPI, 2Gbit, ultra high performance
> 
> This is the link to the datasheet.
> https://www.gigadevice.com/products/memory/flash/spi-nor/
> 
 >> Victor Lim (4):
>    xilinx: zynq: Enable gigadevice
>    arm64: zynqmp: Enable gigadevice
>    xilinx: versal: Enable gigadevice parts
>    mtd: spi-nor-ids: add gigadevice part #
> 
>   configs/xilinx_versal_mini_qspi_defconfig |  1 +
>   configs/xilinx_zynq_virt_defconfig        |  1 +
>   configs/xilinx_zynqmp_mini_qspi_defconfig |  1 +
>   configs/xilinx_zynqmp_virt_defconfig      |  1 +
>   configs/zynq_cse_qspi_defconfig           |  1 +
>   drivers/mtd/spi/spi-nor-ids.c             | 68 +++++++++++++++++++++++
>   6 files changed, 73 insertions(+)
> 

First of all this should be v3 series.

Second. When I run this

for i in `ls configs/xilinx_*`; do NAME=`basename $i`; echo $NAME; make $NAME; 
make savedefconfig; cp defconfig $i; done

I see that locations your added entries are not correct.

Third b4 am -g is showing that base is not upstream version.
Please use next branch as base.

Definitely this series is better then previous one.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs