From: Sai Prakash Ranjan <quic_saipraka@quicinc.com> To: Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Marc Zyngier <maz@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Steven Rostedt <rostedt@goodmis.org> Cc: gregkh <gregkh@linuxfoundation.org>, <quic_psodagud@quicinc.com>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-arm-msm@vger.kernel.org>, Sai Prakash Ranjan <quic_saipraka@quicinc.com>, Neil Armstrong <narmstrong@baylibre.com>, kernel test robot <lkp@intel.com> Subject: [PATCHv6 3/5] drm/meson: Fix overflow implicit truncation warnings Date: Tue, 7 Dec 2021 12:24:47 +0530 [thread overview] Message-ID: <4850d7fd105dfb46cabada697907da0c03c7f492.1638858747.git.quic_saipraka@quicinc.com> (raw) In-Reply-To: <cover.1638858746.git.quic_saipraka@quicinc.com> Fix -Woverflow warnings for drm/meson driver which is a result of moving arm64 custom MMIO accessor macros to asm-generic function implementations giving a bonus type-checking now and uncovering these overflow warnings. drivers/gpu/drm/meson/meson_viu.c: In function ‘meson_viu_init’: drivers/gpu/drm/meson/meson_registers.h:1826:48: error: large integer implicitly truncated to unsigned type [-Werror=overflow] #define VIU_OSD_BLEND_REORDER(dest, src) ((src) << (dest * 4)) ^ drivers/gpu/drm/meson/meson_viu.c:472:18: note: in expansion of macro ‘VIU_OSD_BLEND_REORDER’ writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) | ^~~~~~~~~~~~~~~~~~~~~ Cc: Arnd Bergmann <arnd@arndb.de> Cc: Neil Armstrong <narmstrong@baylibre.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> --- drivers/gpu/drm/meson/meson_viu.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c index 259f3e6bec90..bb7e109534de 100644 --- a/drivers/gpu/drm/meson/meson_viu.c +++ b/drivers/gpu/drm/meson/meson_viu.c @@ -469,17 +469,17 @@ void meson_viu_init(struct meson_drm *priv) priv->io_base + _REG(VD2_IF0_LUMA_FIFO_SIZE)); if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) { - writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) | - VIU_OSD_BLEND_REORDER(1, 0) | - VIU_OSD_BLEND_REORDER(2, 0) | - VIU_OSD_BLEND_REORDER(3, 0) | - VIU_OSD_BLEND_DIN_EN(1) | - VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 | - VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 | - VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 | - VIU_OSD_BLEND_BLEN2_PREMULT_EN(1) | - VIU_OSD_BLEND_HOLD_LINES(4), - priv->io_base + _REG(VIU_OSD_BLEND_CTRL)); + u32 val = (u32)VIU_OSD_BLEND_REORDER(0, 1) | + (u32)VIU_OSD_BLEND_REORDER(1, 0) | + (u32)VIU_OSD_BLEND_REORDER(2, 0) | + (u32)VIU_OSD_BLEND_REORDER(3, 0) | + (u32)VIU_OSD_BLEND_DIN_EN(1) | + (u32)VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 | + (u32)VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 | + (u32)VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 | + (u32)VIU_OSD_BLEND_BLEN2_PREMULT_EN(1) | + (u32)VIU_OSD_BLEND_HOLD_LINES(4); + writel_relaxed(val, priv->io_base + _REG(VIU_OSD_BLEND_CTRL)); writel_relaxed(OSD_BLEND_PATH_SEL_ENABLE, priv->io_base + _REG(OSD1_BLEND_SRC_CTRL)); -- 2.33.1
WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <quic_saipraka@quicinc.com> To: Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Marc Zyngier <maz@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Steven Rostedt <rostedt@goodmis.org> Cc: gregkh <gregkh@linuxfoundation.org>, <quic_psodagud@quicinc.com>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-arm-msm@vger.kernel.org>, Sai Prakash Ranjan <quic_saipraka@quicinc.com>, Neil Armstrong <narmstrong@baylibre.com>, kernel test robot <lkp@intel.com> Subject: [PATCHv6 3/5] drm/meson: Fix overflow implicit truncation warnings Date: Tue, 7 Dec 2021 12:24:47 +0530 [thread overview] Message-ID: <4850d7fd105dfb46cabada697907da0c03c7f492.1638858747.git.quic_saipraka@quicinc.com> (raw) In-Reply-To: <cover.1638858746.git.quic_saipraka@quicinc.com> Fix -Woverflow warnings for drm/meson driver which is a result of moving arm64 custom MMIO accessor macros to asm-generic function implementations giving a bonus type-checking now and uncovering these overflow warnings. drivers/gpu/drm/meson/meson_viu.c: In function ‘meson_viu_init’: drivers/gpu/drm/meson/meson_registers.h:1826:48: error: large integer implicitly truncated to unsigned type [-Werror=overflow] #define VIU_OSD_BLEND_REORDER(dest, src) ((src) << (dest * 4)) ^ drivers/gpu/drm/meson/meson_viu.c:472:18: note: in expansion of macro ‘VIU_OSD_BLEND_REORDER’ writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) | ^~~~~~~~~~~~~~~~~~~~~ Cc: Arnd Bergmann <arnd@arndb.de> Cc: Neil Armstrong <narmstrong@baylibre.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> --- drivers/gpu/drm/meson/meson_viu.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c index 259f3e6bec90..bb7e109534de 100644 --- a/drivers/gpu/drm/meson/meson_viu.c +++ b/drivers/gpu/drm/meson/meson_viu.c @@ -469,17 +469,17 @@ void meson_viu_init(struct meson_drm *priv) priv->io_base + _REG(VD2_IF0_LUMA_FIFO_SIZE)); if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) { - writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) | - VIU_OSD_BLEND_REORDER(1, 0) | - VIU_OSD_BLEND_REORDER(2, 0) | - VIU_OSD_BLEND_REORDER(3, 0) | - VIU_OSD_BLEND_DIN_EN(1) | - VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 | - VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 | - VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 | - VIU_OSD_BLEND_BLEN2_PREMULT_EN(1) | - VIU_OSD_BLEND_HOLD_LINES(4), - priv->io_base + _REG(VIU_OSD_BLEND_CTRL)); + u32 val = (u32)VIU_OSD_BLEND_REORDER(0, 1) | + (u32)VIU_OSD_BLEND_REORDER(1, 0) | + (u32)VIU_OSD_BLEND_REORDER(2, 0) | + (u32)VIU_OSD_BLEND_REORDER(3, 0) | + (u32)VIU_OSD_BLEND_DIN_EN(1) | + (u32)VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 | + (u32)VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 | + (u32)VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 | + (u32)VIU_OSD_BLEND_BLEN2_PREMULT_EN(1) | + (u32)VIU_OSD_BLEND_HOLD_LINES(4); + writel_relaxed(val, priv->io_base + _REG(VIU_OSD_BLEND_CTRL)); writel_relaxed(OSD_BLEND_PATH_SEL_ENABLE, priv->io_base + _REG(OSD1_BLEND_SRC_CTRL)); -- 2.33.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-12-07 6:55 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-07 6:54 [PATCHv6 0/5] tracing/rwmmio/arm64: Add support to trace register reads/writes Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2021-12-07 6:54 ` [PATCHv6 1/5] arm64: io: Use asm-generic high level MMIO accessors Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2021-12-10 18:16 ` Catalin Marinas 2021-12-10 18:16 ` Catalin Marinas 2021-12-10 18:23 ` Catalin Marinas 2021-12-10 18:23 ` Catalin Marinas 2021-12-07 6:54 ` [PATCHv6 2/5] irqchip/tegra: Fix overflow implicit truncation warnings Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan [this message] 2021-12-07 6:54 ` [PATCHv6 3/5] drm/meson: " Sai Prakash Ranjan 2021-12-07 6:54 ` [PATCHv6 4/5] tracing: Add register read/write tracing support Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2022-01-06 18:18 ` Steven Rostedt 2022-01-06 18:18 ` Steven Rostedt 2022-01-07 5:10 ` Sai Prakash Ranjan 2022-01-07 5:10 ` Sai Prakash Ranjan 2022-01-07 14:56 ` Steven Rostedt 2022-01-07 14:56 ` Steven Rostedt 2022-01-08 5:34 ` Sai Prakash Ranjan 2022-01-08 5:34 ` Sai Prakash Ranjan 2022-01-15 13:18 ` Sai Prakash Ranjan 2022-01-15 13:18 ` Sai Prakash Ranjan 2021-12-07 6:54 ` [PATCHv6 5/5] asm-generic/io: Add logging support for MMIO accessors Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2021-12-13 3:28 ` [PATCHv6 0/5] tracing/rwmmio/arm64: Add support to trace register reads/writes Sai Prakash Ranjan 2021-12-13 3:28 ` Sai Prakash Ranjan 2022-01-03 5:41 ` Sai Prakash Ranjan 2022-01-03 5:41 ` Sai Prakash Ranjan
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